int bladerf_init_device(struct bladerf *dev)
{
int status;
unsigned int actual;
uint32_t val;
/* Readback the GPIO values to see if they are default or already set */
status = bladerf_config_gpio_read( dev, &val );
if (status != 0) {
log_warning("Failed to read GPIO config, skipping device initialization: %s\n",
bladerf_strerror(status));
return 0;
}
if ((val&0x7f) == 0) {
log_verbose( "Default GPIO value found - initializing device\n" );
/* Set the GPIO pins to enable the LMS and select the low band */
bladerf_config_gpio_write( dev, 0x57 );
/* Disable the front ends */
lms_enable_rffe(dev, BLADERF_MODULE_TX, false);
lms_enable_rffe(dev, BLADERF_MODULE_RX, false);
/* Set the internal LMS register to enable RX and TX */
bladerf_lms_write( dev, 0x05, 0x3e );
/* LMS FAQ: Improve TX spurious emission performance */
bladerf_lms_write( dev, 0x47, 0x40 );
/* LMS FAQ: Improve ADC performance */
bladerf_lms_write( dev, 0x59, 0x29 );
/* LMS FAQ: Common mode voltage for ADC */
bladerf_lms_write( dev, 0x64, 0x36 );
/* LMS FAQ: Higher LNA Gain */
bladerf_lms_write( dev, 0x79, 0x37 );
/* Set a default saplerate */
bladerf_set_sample_rate( dev, BLADERF_MODULE_TX, 1000000, &actual );
bladerf_set_sample_rate( dev, BLADERF_MODULE_RX, 1000000, &actual );
/* Set a default frequency of 1GHz */
bladerf_set_frequency( dev, BLADERF_MODULE_TX, 1000000000 );
bladerf_set_frequency( dev, BLADERF_MODULE_RX, 1000000000 );
/* Set the calibrated VCTCXO DAC value */
bladerf_dac_write( dev, dev->dac_trim );
}
/* TODO: Read this return from the SPI calls */
return 0;
}
int bladerf_enable_module(struct bladerf *dev,
bladerf_module m, bool enable)
{
int status;
if (m != BLADERF_MODULE_RX && m != BLADERF_MODULE_TX) {
return BLADERF_ERR_INVAL;
}
log_debug("Enable Module: %s - %s\n",
(m == BLADERF_MODULE_RX) ? "RX" : "TX",
enable ? "True" : "False") ;
#ifdef ENABLE_LIBBLADERF_SYNC
if (enable == false) {
sync_deinit(dev->sync[m]);
dev->sync[m] = NULL;
}
#endif
lms_enable_rffe(dev, m, enable);
status = dev->fn->enable_module(dev, m, enable);
return status;
}
int bladerf_enable_module(struct bladerf *dev,
bladerf_module m, bool enable)
{
int status;
if (m != BLADERF_MODULE_RX && m != BLADERF_MODULE_TX) {
return BLADERF_ERR_INVAL;
}
log_debug("Enable Module: %s - %s\n",
(m == BLADERF_MODULE_RX) ? "RX" : "TX",
enable ? "True" : "False") ;
MUTEX_LOCK(&dev->ctrl_lock);
if (enable == false) {
sync_deinit(dev->sync[m]);
dev->sync[m] = NULL;
}
lms_enable_rffe(dev, m, enable);
status = dev->fn->enable_module(dev, m, enable);
MUTEX_UNLOCK(&dev->ctrl_lock);
return status;
}
int init_device(struct bladerf *dev)
{
int status;
uint32_t val;
/* Readback the GPIO values to see if they are default or already set */
status = CONFIG_GPIO_READ( dev, &val );
if (status != 0) {
log_debug("Failed to read GPIO config %s\n", bladerf_strerror(status));
return status;
}
if ((val & 0x7f) == 0) {
log_verbose( "Default GPIO value found - initializing device\n" );
/* Set the GPIO pins to enable the LMS and select the low band */
status = CONFIG_GPIO_WRITE(dev, 0x57);
if (status != 0) {
return status;
}
/* Disable the front ends */
status = lms_enable_rffe(dev, BLADERF_MODULE_TX, false);
if (status != 0) {
return status;
}
status = lms_enable_rffe(dev, BLADERF_MODULE_RX, false);
if (status != 0) {
return status;
}
/* Set the internal LMS register to enable RX and TX */
status = LMS_WRITE(dev, 0x05, 0x3e);
if (status != 0) {
return status;
}
/* LMS FAQ: Improve TX spurious emission performance */
status = LMS_WRITE(dev, 0x47, 0x40);
if (status != 0) {
return status;
}
/* LMS FAQ: Improve ADC performance */
status = LMS_WRITE(dev, 0x59, 0x29);
if (status != 0) {
return status;
}
/* LMS FAQ: Common mode voltage for ADC */
status = LMS_WRITE(dev, 0x64, 0x36);
if (status != 0) {
return status;
}
/* LMS FAQ: Higher LNA Gain */
status = LMS_WRITE(dev, 0x79, 0x37);
if (status != 0) {
return status;
}
/* Set a default samplerate */
status = si5338_set_sample_rate(dev, BLADERF_MODULE_TX, 1000000, NULL);
if (status != 0) {
return status;
}
status = si5338_set_sample_rate(dev, BLADERF_MODULE_RX, 1000000, NULL);
if (status != 0) {
return status;
}
/* Set a default frequency of 1GHz */
status = tuning_set_freq(dev, BLADERF_MODULE_TX, 1000000000);
if (status != 0) {
return status;
}
status = tuning_set_freq(dev, BLADERF_MODULE_RX, 1000000000);
if (status != 0) {
return status;
}
/* Set the calibrated VCTCXO DAC value */
status = DAC_WRITE(dev, dev->dac_trim);
if (status != 0) {
return status;
}
/* Set up LMS DC offset register calibration and initial IQ settings,
* if any tables have been loaded already */
status = apply_lms_dc_cals(dev);
}
return status;
}
