unsigned m68020_get_reg(int regnum)
{
switch( regnum )
{
case M68K_PC: return m68k_get_reg(NULL, M68K_REG_PC);
case REG_PREVIOUSPC: return m68k_get_reg(NULL, M68K_REG_PPC);
}
return m68ec020_get_reg(regnum);
}
unsigned m68010_get_reg(int regnum)
{
switch( regnum )
{
case M68K_VBR: return m68k_get_reg(NULL, M68K_REG_VBR);
case M68K_SFC: return m68k_get_reg(NULL, M68K_REG_SFC);
case M68K_DFC: return m68k_get_reg(NULL, M68K_REG_DFC);
default: return m68000_get_reg(regnum);
}
return 0;
}
unsigned m68ec020_get_reg(int regnum)
{
switch( regnum )
{
case M68K_MSP: return m68k_get_reg(NULL, M68K_REG_MSP);
case M68K_CACR: return m68k_get_reg(NULL, M68K_REG_CACR);
case M68K_CAAR: return m68k_get_reg(NULL, M68K_REG_CAAR);
default: return m68010_get_reg(regnum);
}
return 0;
}
/*-------------------------------------------------------------------------
Watchdog timer callback.
Input: Timer Pointer to the timer that triggered the callback.
Data Data associated with the timer.
---------------------------------------------------------------------------*/
void neogeo_watchdog_callback ( TIMER *Timer, Uint32 Data )
{
LOG ( "WARNING: Watchdog timer triggered (PC=%06X, SR=%04X); Machine reset.\n",
m68k_get_reg ( NULL, M68K_REG_PPC ),
m68k_get_reg ( NULL, M68K_REG_SR ) );
debugger_log ( "WARNING: Watchdog timer triggered (PC=%06X, SR=%04X); Machine reset.\n",
m68k_get_reg ( NULL, M68K_REG_PPC ),
m68k_get_reg ( NULL, M68K_REG_SR ) );
neogeo_cold_reset();
neogeo_show_debugger = 1;
}
uint32 GetStackAddr(RegistersHandle _Register)
{
switch ((uint32)_Register)
{
case kRegister_Z80:
return gRegisterZ80[5]->d;
case kRegister_M68000:
return m68k_get_reg(M68K_REG_SP);
case kRegister_S68000:
return m68k_get_reg(M68K_REG_SP);
default:
return 0;
}
}
uint32 GetRunningAddr(RegistersHandle _Register)
{
switch ((uint32)_Register)
{
case kRegister_Z80:
return gRegisterZ80[0]->d;
case kRegister_M68000:
return m68k_get_reg(M68K_REG_PC);
case kRegister_S68000:
return m68k_get_reg(M68K_REG_PC);
default:
return 0;
}
}
unsigned int m68k_read_bus_16(unsigned int address)
{
#ifdef LOGERROR
error("Unused read16 %08X (%08X)\n", address, m68k_get_reg (NULL, M68K_REG_PC));
#endif
return m68k_read_pcrelative_16(REG_PC);
}
static void write_memory_8(unsigned int address, unsigned int data)
{
if (address < 0x004000)
workram[address] = data;
else if ((address >= 0x4000) && (address < 0x8000))
workram[0x10000 + (address & 0x3fff)] = data;
else if (address == 0x400001)
ym2151_last_adr = data;
else if (address == 0x400003)
YM2151WriteReg(0, ym2151_last_adr, data);
else if (address == 0x400005)
OKIM6295_data_0_w(0, data);
else if ((address >= 0xc00000) && (address < 0xc08000))
workram[address & 0x7fff] = data;
else if ((address >= 0xfe0000) && (address < 0xffffff))
workram[0x10000 + (address & 0x1ffff)] = data;
else
printf("W8: %x @ %x (PC=%x)\n", data, address, m68k_get_reg(NULL, M68K_REG_PC));
}
void DACWriteWord(uint32_t offset, uint16_t data, uint32_t who/*= UNKNOWN*/)
{
if (offset == LTXD + 2)
*ltxd = data;
else if (offset == RTXD + 2)
*rtxd = data;
else if (offset == SCLK + 2) // Sample rate
{
WriteLog("DAC: Writing %u to SCLK (by %s)...\n", data, whoName[who]);
*sclk = data & 0xFF;
JERRYI2SInterruptTimer = -1;
RemoveCallback(JERRYI2SCallback);
JERRYI2SCallback();
}
else if (offset == SMODE + 2)
{
// serialMode = data;
*smode = data;
WriteLog("DAC: %s writing to SMODE. Bits: %s%s%s%s%s%s [68K PC=%08X]\n", whoName[who],
(data & 0x01 ? "INTERNAL " : ""), (data & 0x02 ? "MODE " : ""),
(data & 0x04 ? "WSEN " : ""), (data & 0x08 ? "RISING " : ""),
(data & 0x10 ? "FALLING " : ""), (data & 0x20 ? "EVERYWORD" : ""),
m68k_get_reg(NULL, M68K_REG_PC));
}
}
void DACWriteWord(uint32 offset, uint16 data, uint32 who/*= UNKNOWN*/)
{
if (offset == LTXD + 2)
{
ltxd = data;
}
else if (offset == RTXD + 2)
{
rtxd = data;
}
else if (offset == SCLK + 2) // Sample rate
{
WriteLog("DAC: Writing %u to SCLK...\n", data);
if ((uint8)data != SCLKFrequencyDivider)
SCLKFrequencyDivider = (uint8)data;
}
else if (offset == SMODE + 2)
{
serialMode = data;
WriteLog("DAC: %s writing to SMODE. Bits: %s%s%s%s%s%s [68K PC=%08X]\n", whoName[who],
(data & 0x01 ? "INTERNAL " : ""), (data & 0x02 ? "MODE " : ""),
(data & 0x04 ? "WSEN " : ""), (data & 0x08 ? "RISING " : ""),
(data & 0x10 ? "FALLING " : ""), (data & 0x20 ? "EVERYWORD" : ""),
m68k_get_reg(NULL, M68K_REG_PC));
}
}
void m68000_set_reg(int regnum, unsigned val)
{
switch( regnum )
{
case M68K_PC: m68k_set_reg(M68K_REG_PC, val); break;
case M68K_SP: m68k_set_reg(M68K_REG_SP, val); break;
case M68K_ISP: m68k_set_reg(M68K_REG_ISP, val); break;
case M68K_USP: m68k_set_reg(M68K_REG_USP, val); break;
case M68K_SR: m68k_set_reg(M68K_REG_SR, val); break;
case M68K_D0: m68k_set_reg(M68K_REG_D0, val); break;
case M68K_D1: m68k_set_reg(M68K_REG_D1, val); break;
case M68K_D2: m68k_set_reg(M68K_REG_D2, val); break;
case M68K_D3: m68k_set_reg(M68K_REG_D3, val); break;
case M68K_D4: m68k_set_reg(M68K_REG_D4, val); break;
case M68K_D5: m68k_set_reg(M68K_REG_D5, val); break;
case M68K_D6: m68k_set_reg(M68K_REG_D6, val); break;
case M68K_D7: m68k_set_reg(M68K_REG_D7, val); break;
case M68K_A0: m68k_set_reg(M68K_REG_A0, val); break;
case M68K_A1: m68k_set_reg(M68K_REG_A1, val); break;
case M68K_A2: m68k_set_reg(M68K_REG_A2, val); break;
case M68K_A3: m68k_set_reg(M68K_REG_A3, val); break;
case M68K_A4: m68k_set_reg(M68K_REG_A4, val); break;
case M68K_A5: m68k_set_reg(M68K_REG_A5, val); break;
case M68K_A6: m68k_set_reg(M68K_REG_A6, val); break;
case M68K_A7: m68k_set_reg(M68K_REG_A7, val); break;
/* TODO: set contents of [SP + wordsize * (REG_SP_CONTENTS-regnum)] */
default:
if( regnum < REG_SP_CONTENTS )
{
unsigned offset = m68k_get_reg(NULL, M68K_REG_SP) + 4 * (REG_SP_CONTENTS - regnum);
if( offset < 0xfffffd )
m68k_write_memory_16( offset, val );
}
}
}
unsigned int m68k_read_bus_16(unsigned int address)
{
#ifdef LOGERROR
error("Unused read16 %08X (%08X)\n", address, m68k_get_reg(M68K_REG_PC));
#endif
address = m68k.pc;
return *(uint16 *)(m68k.memory_map[((address)>>16)&0xff].base + ((address) & 0xffff));
}
unsigned int m68k_read_bus_8(unsigned int address)
{
#ifdef LOGERROR
error("Unused read8 %08X (%08X)\n", address, m68k_get_reg(M68K_REG_PC));
#endif
address = m68k.pc | (address & 1);
return READ_BYTE(m68k.memory_map[((address)>>16)&0xff].base, (address) & 0xffff);
}
inline u32 M68K_GetAReg(u32 num)
{
#ifdef CPU68K_USE_MUSASHI
return m68k_get_reg(NULL, M68K_REG_A0 + num);
#endif
#ifdef CPU68K_USE_C68K
return C68k_Get_AReg(&C68K, num);
#endif
}
inline u32 M68K_GetUSP(void)
{
#ifdef CPU68K_USE_MUSASHI
return m68k_get_reg(NULL, M68K_REG_USP);
#endif
#ifdef CPU68K_USE_C68K
return C68k_Get_USP(&C68K);
#endif
}
void m68k_lockup_w_16 (unsigned int address, unsigned int data)
{
#ifdef LOGERROR
error ("Lockup %08X = %04X (%08X)\n", address, data, m68k_get_reg (NULL, M68K_REG_PC));
#endif
if (!config.force_dtack)
{
m68k_pulse_halt();
}
}
void m68k_lockup_w_8 (unsigned int address, unsigned int data)
{
#ifdef LOGERROR
error ("Lockup %08X = %02X (%08X)\n", address, data, m68k_get_reg(M68K_REG_PC));
#endif
if (!config.force_dtack)
{
m68k_pulse_halt();
m68k.cycles = m68k.cycle_end;
}
}
unsigned int m68k_lockup_r_16 (unsigned int address)
{
#ifdef LOGERROR
error ("Lockup %08X.w (%08X)\n", address, m68k_get_reg (NULL, M68K_REG_PC));
#endif
if (!config.force_dtack)
{
m68k_pulse_halt();
}
return m68k_read_pcrelative_16(REG_PC);
}
unsigned int m68k_lockup_r_16 (unsigned int address)
{
#ifdef LOGERROR
error ("Lockup %08X.w (%08X)\n", address, m68k_get_reg(M68K_REG_PC));
#endif
if (!config.force_dtack)
{
m68k_pulse_halt();
m68k.cycles = m68k.cycle_end;
}
address = m68k.pc;
return *(uint16 *)(m68k.memory_map[((address)>>16)&0xff].base + ((address) & 0xffff));
}
unsigned int m68k_lockup_r_8 (unsigned int address)
{
#ifdef LOGERROR
error ("Lockup %08X.b (%08X)\n", address, m68k_get_reg(M68K_REG_PC));
#endif
if (!config.force_dtack)
{
m68k_pulse_halt();
m68k.cycles = m68k.cycle_end;
}
address = m68k.pc | (address & 1);
return READ_BYTE(m68k.memory_map[((address)>>16)&0xff].base, (address) & 0xffff);
}
void gentrace(void)
{
return;
if (TRACE_COUNT > 0 || VDP.vcounter() == 33)
{
uint32_t pc = m68k_get_reg(NULL, M68K_REG_PC);
char buf[2048];
int oplen = m68k_disassemble(buf, pc, M68K_CPU_TYPE_68000);
fprintf(stdout, "%06x\t%s\t\t[HC=%x]\n", pc, buf, VDP.hcounter());
--TRACE_COUNT;
}
}
static unsigned int csd_read_memory_32(unsigned int address)
{
address &= 0xffffff;
if (address < 0x8000)
{
return mem_readlong_swap((unsigned int *)(prgrom+address));
}
if ((address >= 0x1c000) && (address <= 0x1cfff))
{
return mem_readlong_swap((unsigned int *)(workram+address));
}
printf("Unknown read 32 at %x PC=%x\n", address, m68k_get_reg(NULL, M68K_REG_PC));
return 0;
}
const char* GetRegisterValue(RegistersHandle _Register, int _iRegisterIndex)
{
static char szRegisters[128];
szRegisters[0] = '\0';
switch ((uint32)_Register)
{
case kRegister_Z80:
sprintf(szRegisters, gszRegisterFormatZ80[_iRegisterIndex], gRegisterZ80[_iRegisterIndex]->d);
break;
case kRegister_M68000:
sprintf(szRegisters, gszRegisterFormat68000[_iRegisterIndex], m68k_get_reg(guiConv68000DebugToEmu[_iRegisterIndex]));
break;
case kRegister_S68000:
sprintf(szRegisters, gszRegisterFormat68000[_iRegisterIndex], s68k_get_reg(guiConv68000DebugToEmu[_iRegisterIndex]));
break;
}
return szRegisters;
}
static unsigned int csd_read_memory_8(unsigned int address)
{
address &= 0xffffff;
if (address < 0x8000)
{
return prgrom[address];
}
if (address >= 0x18000 && address <= 0x18007)
{
return pia_0_r((address&0xf)>>1);
}
if (address >= 0x1c000 && address <= 0x1cfff)
{
return workram[address];
}
printf("Unknown read 8 at %x PC=%x\n", address, m68k_get_reg(NULL, M68K_REG_PC));
return 0;
}
// Pack the cpu into a common format:
// XXX: rename
PICO_INTERNAL void SekPackCpu(unsigned char *cpu, int is_sub)
{
unsigned int pc=0;
#if defined(EMU_C68K)
struct Cyclone *context = is_sub ? &PicoCpuCS68k : &PicoCpuCM68k;
memcpy(cpu,context->d,0x40);
pc=context->pc-context->membase;
*(unsigned int *)(cpu+0x44)=CycloneGetSr(context);
*(unsigned int *)(cpu+0x48)=context->osp;
cpu[0x4c] = context->irq;
cpu[0x4d] = context->state_flags & 1;
#elif defined(EMU_M68K)
void *oldcontext = m68ki_cpu_p;
m68k_set_context(is_sub ? &PicoCpuMS68k : &PicoCpuMM68k);
memcpy(cpu,m68ki_cpu_p->dar,0x40);
pc=m68ki_cpu_p->pc;
*(unsigned int *)(cpu+0x44)=m68k_get_reg(NULL, M68K_REG_SR);
*(unsigned int *)(cpu+0x48)=m68ki_cpu_p->sp[m68ki_cpu_p->s_flag^SFLAG_SET];
cpu[0x4c] = CPU_INT_LEVEL>>8;
cpu[0x4d] = CPU_STOPPED;
m68k_set_context(oldcontext);
#elif defined(EMU_F68K)
M68K_CONTEXT *context = is_sub ? &PicoCpuFS68k : &PicoCpuFM68k;
memcpy(cpu,context->dreg,0x40);
pc=context->pc;
*(unsigned int *)(cpu+0x44)=context->sr;
*(unsigned int *)(cpu+0x48)=context->asp;
cpu[0x4c] = context->interrupts[0];
cpu[0x4d] = (context->execinfo & FM68K_HALTED) ? 1 : 0;
#endif
*(unsigned int *)(cpu+0x40) = pc;
*(unsigned int *)(cpu+0x50) =
is_sub ? SekCycleCntS68k : SekCycleCnt;
}
// Use the Genecyst format
//
void savestate(const char *fn)
{
uint32_t val;
FILE *f = fopen(fn, "wb");
assert(f);
fprintf(f, "GST");
assert(ftell(f) == 3);
pad(f, 3);
assert(ftell(f) == 6);
fprintf(f, "\xE0\x40");
pad(f, 0x80-8);
assert(ftell(f) == 0x80);
for (int i=0;i<16;i++)
{
val = m68k_get_reg(NULL, (m68k_register_t)i);
fwrite(&val, 1, 4, f);
}
assert(ftell(f) == 0xC0);
pad(f, 8);
assert(ftell(f) == 0xC8);
val = m68k_get_reg(NULL, M68K_REG_PC);
fwrite(&val, 1, 4, f);
pad(f, 4);
assert(ftell(f) == 0xD0);
val = m68k_get_reg(NULL, M68K_REG_SR);
fwrite(&val, 1, 2, f);
val = m68k_get_reg(NULL, M68K_REG_USP);
fwrite(&val, 1, 4, f);
val = m68k_get_reg(NULL, M68K_REG_ISP);
fwrite(&val, 1, 4, f);
assert(ftell(f) == 0xDA);
pad(f, 0xFA-0xDA);
assert(ftell(f) == 0xFA);
fwrite(VDP.regs, 1, 24, f);
fwrite(VDP.CRAM, 1, 128, f);
fwrite(VDP.VSRAM, 1, 80, f);
pad(f, 2);
assert(ftell(f) == 0x1E4);
uint8_t opnregs[512];
YM2612SaveRegs(opnregs);
fwrite(opnregs, 1, 512, f);
assert(ftell(f) == 0x3E4);
pad(f, 0x404-0x3E4);
assert(ftell(f) == 0x404);
fwrite(&CPU_Z80._cpu.AF.W, 1, 4, f);
fwrite(&CPU_Z80._cpu.BC.W, 1, 4, f);
fwrite(&CPU_Z80._cpu.DE.W, 1, 4, f);
fwrite(&CPU_Z80._cpu.HL.W, 1, 4, f);
fwrite(&CPU_Z80._cpu.IX.W, 1, 4, f);
fwrite(&CPU_Z80._cpu.IY.W, 1, 4, f);
fwrite(&CPU_Z80._cpu.PC.W, 1, 4, f);
fwrite(&CPU_Z80._cpu.SP.W, 1, 4, f);
fwrite(&CPU_Z80._cpu.AF1.W, 1, 4, f);
fwrite(&CPU_Z80._cpu.BC1.W, 1, 4, f);
fwrite(&CPU_Z80._cpu.DE1.W, 1, 4, f);
fwrite(&CPU_Z80._cpu.HL1.W, 1, 4, f);
fwrite(&CPU_Z80._cpu.I, 1, 1, f);
pad(f, 1);
fwrite(&CPU_Z80._cpu.IFF, 1, 1, f);
pad(f, 1);
fwrite(&CPU_Z80._reset_line, 1, 1, f);
fwrite(&CPU_Z80._busreq_line, 1, 1, f);
pad(f, 1);
pad(f, 1);
fwrite(&Z80_BANK, 1, 4, f);
assert(ftell(f) == 0x440);
pad(f, 0x474-0x440);
assert(ftell(f) == 0x474);
fwrite(ZRAM, 1, sizeof(ZRAM), f);
pad(f, 4);
fwrite(RAM, 1, sizeof(RAM), f);
fwrite(VDP.VRAM, 1, sizeof(VDP.VRAM), f);
assert(ftell(f) == 0x22478);
fclose(f);
}
void CPUBrowserWindow::RefreshContents(void)
{
char string[1024], buf[64];
QString s;
// 68K
uint32_t m68kPC = m68k_get_reg(NULL, M68K_REG_PC);
uint32_t m68kSR = m68k_get_reg(NULL, M68K_REG_SR);
sprintf(string, "PC: %06X SR: %04X<br><br>", m68kPC, m68kSR);
s += QString(string);
uint32_t m68kA0 = m68k_get_reg(NULL, M68K_REG_A0);
uint32_t m68kA1 = m68k_get_reg(NULL, M68K_REG_A1);
uint32_t m68kA2 = m68k_get_reg(NULL, M68K_REG_A2);
uint32_t m68kA3 = m68k_get_reg(NULL, M68K_REG_A3);
sprintf(string, "A0: %08X A1: %08X A2: %08X A3: %08X<br>", m68kA0, m68kA1, m68kA2, m68kA3);
s += QString(string);
uint32_t m68kA4 = m68k_get_reg(NULL, M68K_REG_A4);
uint32_t m68kA5 = m68k_get_reg(NULL, M68K_REG_A5);
uint32_t m68kA6 = m68k_get_reg(NULL, M68K_REG_A6);
uint32_t m68kA7 = m68k_get_reg(NULL, M68K_REG_A7);
sprintf(string, "A4: %08X A5: %08X A6: %08X A7: %08X<br><br>", m68kA4, m68kA5, m68kA6, m68kA7);
s += QString(string);
uint32_t m68kD0 = m68k_get_reg(NULL, M68K_REG_D0);
uint32_t m68kD1 = m68k_get_reg(NULL, M68K_REG_D1);
uint32_t m68kD2 = m68k_get_reg(NULL, M68K_REG_D2);
uint32_t m68kD3 = m68k_get_reg(NULL, M68K_REG_D3);
sprintf(string, "D0: %08X D1: %08X D2: %08X D3: %08X<br>", m68kD0, m68kD1, m68kD2, m68kD3);
s += QString(string);
uint32_t m68kD4 = m68k_get_reg(NULL, M68K_REG_D4);
uint32_t m68kD5 = m68k_get_reg(NULL, M68K_REG_D5);
uint32_t m68kD6 = m68k_get_reg(NULL, M68K_REG_D6);
uint32_t m68kD7 = m68k_get_reg(NULL, M68K_REG_D7);
sprintf(string, "D4: %08X D5: %08X D6: %08X D7: %08X<br><br>", m68kD4, m68kD5, m68kD6, m68kD7);
s += QString(string);
// GPU
sprintf(string, "GPU PC: %06X FLAGS: %08X<br><br>", GPUReadLong(0xF02010), GPUReadLong(0xF02000));
s += QString(string);
// DSP
sprintf(string, "DSP PC: %06X FLAGS: %08X<br><br>", DSPReadLong(0xF1A110), DSPReadLong(0xF1A100));
s += QString(string);
text->clear();
text->setText(s);
}
unsigned m68000_get_reg(int regnum)
{
switch( regnum )
{
case M68K_PC: return m68k_get_reg(NULL, M68K_REG_PC);
case M68K_SP: return m68k_get_reg(NULL, M68K_REG_SP);
case M68K_ISP: return m68k_get_reg(NULL, M68K_REG_ISP);
case M68K_USP: return m68k_get_reg(NULL, M68K_REG_USP);
case M68K_SR: return m68k_get_reg(NULL, M68K_REG_SR);
case M68K_D0: return m68k_get_reg(NULL, M68K_REG_D0);
case M68K_D1: return m68k_get_reg(NULL, M68K_REG_D1);
case M68K_D2: return m68k_get_reg(NULL, M68K_REG_D2);
case M68K_D3: return m68k_get_reg(NULL, M68K_REG_D3);
case M68K_D4: return m68k_get_reg(NULL, M68K_REG_D4);
case M68K_D5: return m68k_get_reg(NULL, M68K_REG_D5);
case M68K_D6: return m68k_get_reg(NULL, M68K_REG_D6);
case M68K_D7: return m68k_get_reg(NULL, M68K_REG_D7);
case M68K_A0: return m68k_get_reg(NULL, M68K_REG_A0);
case M68K_A1: return m68k_get_reg(NULL, M68K_REG_A1);
case M68K_A2: return m68k_get_reg(NULL, M68K_REG_A2);
case M68K_A3: return m68k_get_reg(NULL, M68K_REG_A3);
case M68K_A4: return m68k_get_reg(NULL, M68K_REG_A4);
case M68K_A5: return m68k_get_reg(NULL, M68K_REG_A5);
case M68K_A6: return m68k_get_reg(NULL, M68K_REG_A6);
case M68K_A7: return m68k_get_reg(NULL, M68K_REG_A7);
case M68K_PREF_ADDR: return m68k_get_reg(NULL, M68K_REG_PREF_ADDR);
case M68K_PREF_DATA: return m68k_get_reg(NULL, M68K_REG_PREF_DATA);
case REG_PREVIOUSPC: return m68k_get_reg(NULL, M68K_REG_PPC);
/* TODO: return contents of [SP + wordsize * (REG_SP_CONTENTS-regnum)] */
default:
if( regnum < REG_SP_CONTENTS )
{
unsigned offset = m68k_get_reg(NULL, M68K_REG_SP) + 4 * (REG_SP_CONTENTS - regnum);
if( offset < 0xfffffd )
return m68k_read_memory_32( offset );
}
}
return 0;
}
int state_save(unsigned char *buffer)
{
/* buffer size */
int bufferptr = 0;
/* version string */
char version[16];
strncpy(version,STATE_VERSION,16);
save_param(version, 16);
// GENESIS
save_param(work_ram, sizeof(work_ram));
save_param(zram, sizeof(zram));
save_param(&zbusreq, sizeof(zbusreq));
save_param(&zreset, sizeof(zreset));
save_param(&zbank, sizeof(zbank));
// IO
save_param(io_reg, sizeof(io_reg));
// VDP
save_param(sat, sizeof(sat));
save_param(vram, sizeof(vram));
save_param(cram, sizeof(cram));
save_param(vsram, sizeof(vsram));
save_param(reg, sizeof(reg));
save_param(&addr, sizeof(addr));
save_param(&addr_latch, sizeof(addr_latch));
save_param(&code, sizeof(code));
save_param(&pending, sizeof(pending));
save_param(&status, sizeof(status));
save_param(&dmafill, sizeof(dmafill));
save_param(&hint_pending, sizeof(hint_pending));
save_param(&vint_pending, sizeof(vint_pending));
save_param(&irq_status, sizeof(irq_status));
// FM
save_param(YM2612GetContextPtr(),YM2612GetContextSize());
// PSG
save_param(SN76489_GetContextPtr(),SN76489_GetContextSize());
// 68000
uint16 tmp16;
uint32 tmp32;
tmp32 = m68k_get_reg(NULL, M68K_REG_D0); save_param(&tmp32, 4);
tmp32 = m68k_get_reg(NULL, M68K_REG_D1); save_param(&tmp32, 4);
tmp32 = m68k_get_reg(NULL, M68K_REG_D2); save_param(&tmp32, 4);
tmp32 = m68k_get_reg(NULL, M68K_REG_D3); save_param(&tmp32, 4);
tmp32 = m68k_get_reg(NULL, M68K_REG_D4); save_param(&tmp32, 4);
tmp32 = m68k_get_reg(NULL, M68K_REG_D5); save_param(&tmp32, 4);
tmp32 = m68k_get_reg(NULL, M68K_REG_D6); save_param(&tmp32, 4);
tmp32 = m68k_get_reg(NULL, M68K_REG_D7); save_param(&tmp32, 4);
tmp32 = m68k_get_reg(NULL, M68K_REG_A0); save_param(&tmp32, 4);
tmp32 = m68k_get_reg(NULL, M68K_REG_A1); save_param(&tmp32, 4);
tmp32 = m68k_get_reg(NULL, M68K_REG_A2); save_param(&tmp32, 4);
tmp32 = m68k_get_reg(NULL, M68K_REG_A3); save_param(&tmp32, 4);
tmp32 = m68k_get_reg(NULL, M68K_REG_A4); save_param(&tmp32, 4);
tmp32 = m68k_get_reg(NULL, M68K_REG_A5); save_param(&tmp32, 4);
tmp32 = m68k_get_reg(NULL, M68K_REG_A6); save_param(&tmp32, 4);
tmp32 = m68k_get_reg(NULL, M68K_REG_A7); save_param(&tmp32, 4);
tmp32 = m68k_get_reg(NULL, M68K_REG_PC); save_param(&tmp32, 4);
tmp16 = m68k_get_reg(NULL, M68K_REG_SR); save_param(&tmp16, 2);
tmp32 = m68k_get_reg(NULL, M68K_REG_USP); save_param(&tmp32, 4);
// Z80
save_param(&Z80, sizeof(Z80_Regs));
/* compress state file */
unsigned long inbytes = bufferptr;
unsigned long outbytes = STATE_SIZE;
compress2 ((Bytef *)(buffer + 4), &outbytes, (Bytef *)state, inbytes, 9);
memcpy(buffer, &outbytes, 4);
/* return total size */
return (outbytes + 4);
}
void m68k_unused_16_w(unsigned int address, unsigned int data)
{
#ifdef LOGERROR
error("Unused write16 %08X = %04X (%08X)\n", address, data, m68k_get_reg(M68K_REG_PC));
#endif
}
