static void _fw_reset_dma_fifo()
{
io8_set(0x100ae, 0x10);
io8_set(0x100af, 0x10);
A_PRINTF("_fw_reset_dma_fifo\n");
// disable ep3 int enable, so that resume back won't send wdt magic pattern out!!!
mUSB_STATUS_IN_INT_DISABLE();
/* update magic pattern to indicate this is a suspend */
iowrite32(WATCH_DOG_MAGIC_PATTERN_ADDR, SUS_MAGIC_PATTERN);
A_PRINTF("org 0x4048 0x%x ......\n", ioread32(0x10ff4048));
A_PRINTF("org 0x404C 0x%x ......\n", ioread32(0x10ff404C));
A_PRINTF("org 0x4088 0x%x ......\n", ioread32(0x10ff4088));
/* 1010.1010.1010.0110.1010 for UB94 */
iowrite32(0x10ff4088, 0xaaa6a);
iowrite32(0x10ff404C, 0x0);
A_DELAY_USECS(1000);
A_PRINTF("0x4048 0x%x ......\n", ioread32(0x10ff4048));
A_PRINTF("0x404C 0x%x ......\n", ioread32(0x10ff404C));
A_PRINTF("0x4088 0x%x ......\n", ioread32(0x10ff4088));
// turn off merlin
turn_off_merlin();
// pcie ep
A_PRINTF("turn_off_magpie_ep_start ......\n");
A_DELAY_USECS(measure_time);
io32_set(0x40040, BIT0 | BIT1);
turn_off_phy();
io32_clr(0x40040, BIT0 | BIT1);
A_PRINTF("turn_off_magpie_ep_end ......\n");
// pcie rc
A_PRINTF("turn_off_magpie_rc_start ......\n");
A_DELAY_USECS(measure_time);
io32_clr(0x40040, BIT0);
turn_off_phy_rc();
A_PRINTF("turn_off_magpie_rc_end ......down\n");
A_DELAY_USECS(measure_time);
A_PRINTF("0x4001C %p ......\n", ioread32(0x4001c));
A_PRINTF("0x40040 %p ......\n", ioread32(0x40040));
/* turn off pcie_pll - power down (bit16) */
A_PRINTF(" before pwd PCIE PLL CFG:0x5601C: 0x%08x\n",
ioread32(0x5601C));
io32_set(0x5601C, BIT18);
A_PRINTF(" after pwd PCIE PLL CFG:0x5601C: 0x%08x\n",
ioread32(0x5601C));
/* set everything to reset state?, requested by Oligo */
io32_set(0x50010, BIT13 | BIT12
| BIT11 | BIT9 | BIT7 | BIT6);
iowrite32(0x5C000, 0);
A_DELAY_USECS(10);
/* reset usb DMA controller */
iowrite32_usb(ZM_SOC_USB_DMA_RESET_OFFSET, 0x0);
io32_set(0x50010, BIT4);
A_DELAY_USECS(5);
io32_clr(0x50010, BIT4);
iowrite32_usb(ZM_SOC_USB_DMA_RESET_OFFSET, BIT0);
}
/*
* support more than 64 bytes command on ep3
*/
void usb_status_in_patch(void)
{
uint16_t count;
uint16_t remainder;
uint16_t reg_buf_len;
static uint16_t buf_len;
static VBUF *evntbuf = NULL;
static volatile uint32_t *regaddr;
static BOOLEAN cmd_is_new = TRUE;
BOOLEAN cmd_end = FALSE;
if (cmd_is_new) {
evntbuf = usbFifoConf.get_event_buf();
if (evntbuf != NULL) {
regaddr = (uint32_t *)VBUF_GET_DATA_ADDR(evntbuf);
buf_len = evntbuf->buf_length;
} else {
mUSB_STATUS_IN_INT_DISABLE();
return;
}
cmd_is_new = FALSE;
}
if (buf_len > USB_EP3_MAX_PKT_SIZE) {
reg_buf_len = USB_EP3_MAX_PKT_SIZE;
buf_len -= USB_EP3_MAX_PKT_SIZE;
}
/* TODO: 64 bytes...
* controller supposed will take care of zero-length? */
else {
reg_buf_len = buf_len;
cmd_end = TRUE;
}
/* INT use EP3 */
for (count = 0; count < (reg_buf_len / 4); count++)
{
USB_WORD_REG_WRITE(ZM_EP3_DATA_OFFSET, *regaddr);
regaddr++;
}
remainder = reg_buf_len % 4;
if (remainder) {
switch(remainder) {
case 3:
USB_WORD_REG_WRITE(ZM_CBUS_FIFO_SIZE_OFFSET, 0x7);
break;
case 2:
USB_WORD_REG_WRITE(ZM_CBUS_FIFO_SIZE_OFFSET, 0x3);
break;
case 1:
USB_WORD_REG_WRITE(ZM_CBUS_FIFO_SIZE_OFFSET, 0x1);
break;
}
USB_WORD_REG_WRITE(ZM_EP3_DATA_OFFSET, *regaddr);
/* Restore CBus FIFO size to word size */
USB_WORD_REG_WRITE(ZM_CBUS_FIFO_SIZE_OFFSET, 0xF);
}
mUSB_EP3_XFER_DONE();
if (evntbuf != NULL && cmd_end) {
usbFifoConf.send_event_done(evntbuf);
cmd_is_new = TRUE;
}
}
