static void __init msm7x30_init(void)
{
wake_lock_init(&vbus_wake_lock, WAKE_LOCK_SUSPEND, "board-vbus");
#ifdef CONFIG_DEBUG_LL
{
/* HACK: get a fake clock request for uart2 for debug_ll */
struct clk *uart2_clk;
uart2_clk = clk_get(&msm_device_uart2.dev, "uart_clk");
if (IS_ERR(uart2_clk))
uart2_clk = NULL;
else
clk_enable(uart2_clk);
}
#endif
#if defined(CONFIG_MSM_SERIAL_DEBUGGER)
msm_serial_debug_init(MSM_UART2_PHYS, INT_UART2,
&msm_device_uart2.dev, 23, MSM_GPIO_TO_INT(51));
#endif
if (machine_is_msm7x30_fluid())
msm7x30_pmic_keypad_pdata.keymap = msm7x30_fluid_pmic_keymap;
else
msm7x30_pmic_keypad_pdata.keymap = msm7x30_surf_pmic_keymap;
msm7x30_ssbi_pmic_init();
msm7x30_i2c_0_init();
msm7x30_spi_init();
/* set the gpu power rail to manual mode so clk en/dis will not
* turn off gpu power, and hang it on resume */
msm7x30_kgsl_power_rail_mode(0);
msm7x30_kgsl_power(true);
msm_device_hsusb.dev.platform_data = &msm_hsusb_pdata;
msm_device_spi.dev.platform_data = &msm7x30_spi_pdata;
platform_add_devices(devices, ARRAY_SIZE(devices));
if (machine_is_msm7x30_fluid()) {
fluid_cyttsp_init();
i2c_register_board_info(0, fluid_i2c_0_board_info,
ARRAY_SIZE(fluid_i2c_0_board_info));
}
i2c_register_board_info(1, surf_i2c_devices,
ARRAY_SIZE(surf_i2c_devices));
if (machine_is_msm7x30_fluid())
fluid_board_props_init();
msm7x30_board_audio_init();
msm_hsusb_set_vbus_state(1);
msm_hsusb_set_vbus_state(0);
msm_hsusb_set_vbus_state(1);
}
static void __init msm7x30_allocate_memory_regions(void)
{
void *addr;
unsigned long size;
/*
Request allocation of Hardware accessible PMEM regions
at the beginning to make sure they are allocated in EBI-0.
This will allow 7x30 with two mem banks enter the second
mem bank into Self-Refresh State during Idle Power Collapse.
The current HW accessible PMEM regions are
1. Frame Buffer.
LCDC HW can access msm_fb_resources during Idle-PC.
2. Audio
LPA HW can access android_pmem_audio_pdata during Idle-PC.
*/
size = fb_size ? : MSM_FB_SIZE;
addr = alloc_bootmem(size);
msm_fb_resources[0].start = __pa(addr);
msm_fb_resources[0].end = msm_fb_resources[0].start + size - 1;
pr_info("allocating %lu bytes at %p (%lx physical) for fb\n",
size, addr, __pa(addr));
size = pmem_audio_size;
if (size) {
addr = alloc_bootmem(size);
android_pmem_audio_pdata.start = __pa(addr);
android_pmem_audio_pdata.size = size;
pr_info("allocating %lu bytes at %p (%lx physical) for audio "
"pmem arena\n", size, addr, __pa(addr));
}
size = pmem_kernel_ebi1_size;
if (size) {
addr = alloc_bootmem_aligned(size, 0x100000);
android_pmem_kernel_ebi1_pdata.start = __pa(addr);
android_pmem_kernel_ebi1_pdata.size = size;
pr_info("allocating %lu bytes at %p (%lx physical) for kernel"
" ebi1 pmem arena\n", size, addr, __pa(addr));
}
size = pmem_sf_size;
if (size) {
addr = alloc_bootmem(size);
android_pmem_pdata.start = __pa(addr);
android_pmem_pdata.size = size;
pr_info("allocating %lu bytes at %p (%lx physical) for sf "
"pmem arena\n", size, addr, __pa(addr));
}
if machine_is_msm7x30_fluid()
size = fluid_pmem_adsp_size;
else
static int msm_fb_detect_panel(const char *name)
{
if (machine_is_msm7x30_fluid()) {
if (!strcmp(name, "lcdc_sharp_wvga_pt"))
return 0;
} else {
if (!strncmp(name, "mddi_toshiba_wvga_pt", 20))
return -EPERM;
else if (!strncmp(name, "lcdc_toshiba_wvga_pt", 20))
return 0;
else if (!strcmp(name, "mddi_orise"))
return -EPERM;
else if (!strcmp(name, "mddi_quickvx"))
return -EPERM;
}
return -ENODEV;
}
static void msm_camera_vreg_enable(void)
{
/* FIHTDC, Div2-SW2-BSP, Ming, LCM { */
/* TODO: enable correct vreg to avoid damaging other components */
#if 0
vreg_gp2 = vreg_get(NULL, "gp2");
if (IS_ERR(vreg_gp2)) {
pr_err("%s: VREG GP2 get failed %ld\n", __func__,
PTR_ERR(vreg_gp2));
vreg_gp2 = NULL;
return;
}
if (vreg_set_level(vreg_gp2, 2600)) {
pr_err("%s: VREG GP2 set failed\n", __func__);
goto gp2_put;
}
if (vreg_enable(vreg_gp2)) {
pr_err("%s: VREG GP2 enable failed\n", __func__);
goto gp2_put;
}
vreg_lvsw1 = vreg_get(NULL, "lvsw1");
if (IS_ERR(vreg_lvsw1)) {
pr_err("%s: VREG LVSW1 get failed %ld\n", __func__,
PTR_ERR(vreg_lvsw1));
vreg_lvsw1 = NULL;
goto gp2_disable;
}
if (vreg_set_level(vreg_lvsw1, 1800)) {
pr_err("%s: VREG LVSW1 set failed\n", __func__);
goto lvsw1_put;
}
if (vreg_enable(vreg_lvsw1)) {
pr_err("%s: VREG LVSW1 enable failed\n", __func__);
goto lvsw1_put;
}
if (machine_is_msm7x30_fluid()) {
vreg_gp6 = vreg_get(NULL, "gp6");
if (IS_ERR(vreg_gp6)) {
pr_err("%s: VREG GP6 get failed %ld\n", __func__,
PTR_ERR(vreg_gp6));
vreg_gp6 = NULL;
goto lvsw1_disable;
}
if (vreg_set_level(vreg_gp6, 3050)) {
pr_err("%s: VREG GP6 set failed\n", __func__);
goto gp6_put;
}
if (vreg_enable(vreg_gp6)) {
pr_err("%s: VREG GP6 enable failed\n", __func__);
goto gp6_put;
}
vreg_gp16 = vreg_get(NULL, "gp16");
if (IS_ERR(vreg_gp16)) {
pr_err("%s: VREG GP16 get failed %ld\n", __func__,
PTR_ERR(vreg_gp16));
vreg_gp16 = NULL;
goto gp6_disable;
}
if (vreg_set_level(vreg_gp16, 1200)) {
pr_err("%s: VREG GP16 set failed\n", __func__);
goto gp6_disable;
}
if (vreg_enable(vreg_gp16)) {
pr_err("%s: VREG GP16 enable failed\n", __func__);
goto gp16_put;
}
}
return;
gp16_put:
vreg_put(vreg_gp16);
gp6_disable:
/* Voting off gp6 causes touchscreen i2c issues */
/* vreg_disable(vreg_gp6); */
gp6_put:
vreg_put(vreg_gp6);
lvsw1_disable:
vreg_disable(vreg_lvsw1);
lvsw1_put:
vreg_put(vreg_lvsw1);
gp2_disable:
vreg_disable(vreg_gp2);
gp2_put:
vreg_put(vreg_gp2);
#endif
/* } FIHTDC, Div2-SW2-BSP, Ming, LCM */
}
void __init msm7x30_allocate_memory_regions(void)
{
void *addr;
unsigned long size;
/*
Request allocation of Hardware accessible PMEM regions
at the beginning to make sure they are allocated in EBI-0.
This will allow 7x30 with two mem banks enter the second
mem bank into Self-Refresh State during Idle Power Collapse.
The current HW accessible PMEM regions are
1. Frame Buffer.
LCDC HW can access msm_fb_resources during Idle-PC.
2. Audio
LPA HW can access android_pmem_audio_pdata during Idle-PC.
*/
size = fb_size ? : MSM_FB_SIZE;
addr = alloc_bootmem(size);
msm_fb_resources[0].start = __pa(addr);
msm_fb_resources[0].end = msm_fb_resources[0].start + size - 1;
pr_info("allocating %lu bytes at %p (%lx physical) for fb\n",
size, addr, __pa(addr));
#ifdef CONFIG_LGE_HIDDEN_RESET_PATCH
fb_phys_addr = __pa(addr);
#endif
#ifdef CONFIG_FB_MSM_LCDC_LGDISPLAY_WVGA_OLED
/* LGE_CHANGE
* Copy the oled display screen to oled frame buffer
* 2011-03-22, [email protected]
*/
#ifdef CONFIG_FB_MSM_DEFAULT_DEPTH_RGB565
memcpy(addr, __va(0x2FD00000), 480*800*2);
#elif defined (CONFIG_FB_MSM_DEFAULT_DEPTH_RGBA8888) \
| defined (CONFIG_FB_MSM_DEFAULT_DEPTH_ARGB8888)
// memcpy(addr, __va(0x2FD00000), 480*800*4);
#endif
#endif
size = pmem_audio_size;
if (size) {
addr = alloc_bootmem(size);
android_pmem_audio_pdata.start = __pa(addr);
android_pmem_audio_pdata.size = size;
pr_info("allocating %lu bytes at %p (%lx physical) for audio "
"pmem arena\n", size, addr, __pa(addr));
}
size = pmem_kernel_ebi1_size;
if (size) {
addr = alloc_bootmem_aligned(size, 0x100000);
android_pmem_kernel_ebi1_pdata.start = __pa(addr);
android_pmem_kernel_ebi1_pdata.size = size;
pr_info("allocating %lu bytes at %p (%lx physical) for kernel"
" ebi1 pmem arena\n", size, addr, __pa(addr));
}
size = pmem_sf_size;
if (size) {
addr = alloc_bootmem(size);
android_pmem_pdata.start = __pa(addr);
android_pmem_pdata.size = size;
pr_info("allocating %lu bytes at %p (%lx physical) for sf "
"pmem arena\n", size, addr, __pa(addr));
}
if machine_is_msm7x30_fluid()
size = fluid_pmem_adsp_size;
else
