static void
add_group_to_closure (GtkSizeGroup *group,
GtkSizeGroupMode mode,
GSList **groups,
GSList **widgets)
{
GSList *tmp_widgets;
*groups = g_slist_prepend (*groups, group);
mark_visited (group);
tmp_widgets = group->widgets;
while (tmp_widgets)
{
GtkWidget *tmp_widget = tmp_widgets->data;
if (!is_visited (tmp_widget))
add_widget_to_closure (tmp_widget, mode, groups, widgets);
tmp_widgets = tmp_widgets->next;
}
}
static void
add_widget_to_closure (GtkWidget *widget,
GtkSizeGroupMode mode,
GSList **groups,
GSList **widgets)
{
GSList *tmp_groups;
*widgets = g_slist_prepend (*widgets, widget);
mark_visited (widget);
tmp_groups = get_size_groups (widget);
while (tmp_groups)
{
GtkSizeGroup *tmp_group = tmp_groups->data;
if ((tmp_group->mode == GTK_SIZE_GROUP_BOTH || tmp_group->mode == mode) &&
!is_visited (tmp_group))
add_group_to_closure (tmp_group, mode, groups, widgets);
tmp_groups = tmp_groups->next;
}
}
void mark_visited(struct p_tree *c_node)
{
c_node->visited = true;
if( c_node->left != NULL ) mark_visited(c_node->left);
if( c_node->right != NULL ) mark_visited(c_node->right);
}
void
insert_probe_code( CFG* cfg, InstrNode* instr, int num_of_bb_instrs )
{
//
// The probe code is as follows :
// bg GREATER
// nop
// be EQUAL
// nop
//LESS :
// sethi %hi(&num_of_executed_risc_instrs), %g1
// or %g1, %lo(&num_of_executed_risc_instrs), %g1
// ldd [%g1], %g2
// addcc %g3, num_of_bb_instrs, %g3
// addx %g2, 0, %g2
// std %g2, [%g1]
// subcc %g0, 1, %g0
// ba END
// nop
//GREATER :
// sethi %hi(&num_of_executed_risc_instrs), %g1
// or %g1, %lo(&num_of_executed_risc_instrs), %g1
// ldd [%g1], %g2
// addcc %g3, num_of_bb_instrs, %g3
// addx %g2, 0, %g2
// std %g2, [%g1]
// subcc %g0, -1, %g0
// ba END
// nop
//EQUAL :
// sethi %hi(&num_of_executed_risc_instrs), %g1
// or %g1, %lo(&num_of_executed_risc_instrs), %g1
// ldd [%g1], %g2
// addcc %g3, num_of_bb_instrs, %g3
// addx %g2, 0, %g2
// std %g2, [%g1]
// subcc %g0, %g0, %g0
// ba END
// nop
//END :
//
#ifdef COUNT_RISC_INSTR
InstrNode* new_instr;
InstrNode *branch_instr1, *branch_instr2, *branch_instr3, *branch_instr4, *branch_instr5;
assert( num_of_bb_instrs >= 0 );
branch_instr1 = create_format3_instruction(BG, -5);
insert_instruction_as_single_predecessor(cfg, instr, branch_instr1);
disconnect_instruction(branch_instr1, instr);
add_new_resolve_instr(cfg, branch_instr1, NULL);
mark_visited(branch_instr1);
new_instr = create_format2_instruction(SETHI, g0, 0, -5);
insert_instruction_as_single_predecessor(cfg, branch_instr1, new_instr);
set_delay_slot_instr( new_instr );
mark_visited( new_instr );
branch_instr2 = register_format3_instruction(cfg, branch_instr1, -5, BE);
add_new_resolve_instr(cfg, branch_instr2, NULL);
mark_visited(branch_instr2);
new_instr = create_format2_instruction(SETHI, g0, 0, -5);
insert_instruction_as_single_predecessor(cfg, branch_instr2, new_instr);
set_delay_slot_instr(new_instr);
mark_visited(new_instr);
// LESS :
new_instr = register_format2_instruction(cfg, branch_instr2, -5, SETHI, g1, \
((unsigned) &num_of_executed_risc_instrs[risc_count_method_num]) >> 10);
mark_visited(new_instr);
new_instr = register_format5_instruction(cfg, new_instr, -5, OR, g1, g1, \
((unsigned) &num_of_executed_risc_instrs[risc_count_method_num]) & 0x3ff);
mark_visited(new_instr);
new_instr = register_format4_instruction(cfg, new_instr, -5, LDD, g2, g1, g0);
mark_visited(new_instr);
new_instr = register_format2_instruction(cfg, new_instr, -5, SETHI, g4, ((unsigned) num_of_bb_instrs) >> 10);
mark_visited(new_instr);
new_instr = register_format5_instruction(cfg, new_instr, -5, OR, g4, g4, ((unsigned) num_of_bb_instrs) & 0x3ff);
mark_visited(new_instr);
new_instr = register_format6_instruction(cfg, new_instr, -5, ADDCC, g3, g3, g4);
mark_visited(new_instr);
new_instr = register_format5_instruction(cfg, new_instr, -5, ADDX, g2, g2, 0);
mark_visited(new_instr);
new_instr = register_format7_instruction(cfg, new_instr, -5, STD, g2, g1, g0);
mark_visited(new_instr);
new_instr = register_format5_instruction(cfg, new_instr, -5, SUBCC, g0, g0, 1);
mark_visited(new_instr);
branch_instr3 = register_format3_instruction(cfg, new_instr, -5, BA);
add_new_resolve_instr(cfg, branch_instr3, NULL);
connect_instruction(branch_instr3, instr);
mark_visited(branch_instr3);
new_instr = create_format2_instruction(SETHI, g0, 0, -5);
insert_instruction_as_single_predecessor(cfg, branch_instr3, new_instr);
set_delay_slot_instr(new_instr);
mark_visited(new_instr);
// GREATER :
new_instr = register_format2_instruction(cfg, branch_instr1, -5, SETHI, g1, \
((unsigned) &num_of_executed_risc_instrs[risc_count_method_num]) >> 10);
mark_visited(new_instr);
new_instr = register_format5_instruction(cfg, new_instr, -5, OR, g1, g1, \
((unsigned) &num_of_executed_risc_instrs[risc_count_method_num]) & 0x3ff);
mark_visited(new_instr);
new_instr = register_format4_instruction(cfg, new_instr, -5, LDD, g2, g1, g0);
mark_visited(new_instr);
new_instr = register_format2_instruction(cfg, new_instr, -5, SETHI, g4, ((unsigned) num_of_bb_instrs) >> 10);
mark_visited(new_instr);
new_instr = register_format5_instruction(cfg, new_instr, -5, OR, g4, g4, ((unsigned) num_of_bb_instrs) & 0x3ff);
mark_visited(new_instr);
new_instr = register_format6_instruction(cfg, new_instr, -5, ADDCC, g3, g3, g4);
mark_visited(new_instr);
new_instr = register_format5_instruction(cfg, new_instr, -5, ADDX, g2, g2, 0);
mark_visited(new_instr);
new_instr = register_format7_instruction(cfg, new_instr, -5, STD, g2, g1, g0);
mark_visited(new_instr);
new_instr = register_format5_instruction(cfg, new_instr, -5, SUBCC, g0, g0, -1);
mark_visited(new_instr);
branch_instr4 = register_format3_instruction(cfg, new_instr, -5, BA);
add_new_resolve_instr(cfg, branch_instr4, NULL);
connect_instruction(branch_instr4, instr);
mark_visited(branch_instr4);
new_instr = create_format2_instruction(SETHI, g0, 0, -5);
insert_instruction_as_single_predecessor(cfg, branch_instr4, new_instr);
set_delay_slot_instr(new_instr);
mark_visited(new_instr);
// EQUAL :
new_instr = register_format2_instruction(cfg, branch_instr2, -5, SETHI, g1, \
((unsigned) &num_of_executed_risc_instrs[risc_count_method_num]) >> 10);
mark_visited(new_instr);
new_instr = register_format5_instruction(cfg, new_instr, -5, OR, g1, g1, \
((unsigned) &num_of_executed_risc_instrs[risc_count_method_num]) & 0x3ff);
mark_visited(new_instr);
new_instr = register_format4_instruction(cfg, new_instr, -5, LDD, g2, g1, g0);
mark_visited(new_instr);
new_instr = register_format2_instruction(cfg, new_instr, -5, SETHI, g4, ((unsigned) num_of_bb_instrs) >> 10);
mark_visited(new_instr);
new_instr = register_format5_instruction(cfg, new_instr, -5, OR, g4, g4, ((unsigned) num_of_bb_instrs) & 0x3ff);
mark_visited(new_instr);
new_instr = register_format6_instruction(cfg, new_instr, -5, ADDCC, g3, g3, g4);
mark_visited(new_instr);
new_instr = register_format5_instruction(cfg, new_instr, -5, ADDX, g2, g2, 0);
mark_visited(new_instr);
new_instr = register_format7_instruction(cfg, new_instr, -5, STD, g2, g1, g0);
mark_visited(new_instr);
new_instr = register_format5_instruction(cfg, new_instr, -5, SUBCC, g0, g0, 0);
mark_visited(new_instr);
branch_instr5 = register_format3_instruction(cfg, new_instr, -5, BA);
add_new_resolve_instr(cfg, branch_instr5, NULL);
connect_instruction(branch_instr5, instr);
mark_visited(branch_instr5);
new_instr = create_format2_instruction(SETHI, g0, 0, -5);
insert_instruction_as_single_predecessor(cfg, branch_instr5, new_instr);
set_delay_slot_instr(new_instr);
mark_visited(new_instr);
#endif COUNT_RISC_INSTR
}
void
insert_probe_code( CFG *cfg, InstrNode *instr, int instrNO ) {
// generated code as below
// save sp, -96, sp
// add g1, g0, l0
// add g2, g0, l1
// add g3, g0, l2
// add g4, g0, l3
// add g5, g0, l4
// add g6, g0, l5
// add g7, g0, l6
// rd %ccr, l7
// sethi %hi(method), o0
// or o0, %lo(method), o0
// rd %pc, o1
// sethi %hi(instrNO), o2
// or o2, %lo(instrNO), o2
// call ProfileRISCInstr
// nop
// wr l7, %ccr
// add l0, g0, g1
// add l1, g0, g2
// add l2, g0, g3
// add l3, g0, g4
// add l4, g0, g5
// add l5, g0, g6
// add l6, g0, g7
// restore
InstrNode *c_instr = instr;
Method *method = IG_get_method( CFG_get_IG_root( cfg ) );
c_instr = create_format5_instruction( SPARC_SAVE, SP, SP, -96, -23 );
insert_instruction_as_single_predecessor( cfg, instr, c_instr );
mark_visited( c_instr );
c_instr = create_format6_instruction( ADD, l0, g1, g0, -23 );
insert_instruction_as_single_predecessor( cfg, instr, c_instr );
mark_visited( c_instr );
c_instr = create_format6_instruction( ADD, l1, g2, g0, -23 );
insert_instruction_as_single_predecessor( cfg, instr, c_instr );
mark_visited( c_instr );
c_instr = create_format6_instruction( ADD, l2, g3, g0, -23 );
insert_instruction_as_single_predecessor( cfg, instr, c_instr );
mark_visited( c_instr );
c_instr = create_format6_instruction( ADD, l3, g4, g0, -23 );
insert_instruction_as_single_predecessor( cfg, instr, c_instr );
mark_visited( c_instr );
c_instr = create_format6_instruction( ADD, l4, g5, g0, -23 );
insert_instruction_as_single_predecessor( cfg, instr, c_instr );
mark_visited( c_instr );
c_instr = create_format6_instruction( ADD, l5, g6, g0, -23 );
insert_instruction_as_single_predecessor( cfg, instr, c_instr );
mark_visited( c_instr );
c_instr = create_format6_instruction( ADD, l6, g7, g0, -23 );
insert_instruction_as_single_predecessor( cfg, instr, c_instr );
mark_visited( c_instr );
c_instr = create_format6_instruction( RDY, l7, 2, 0, -23 );
insert_instruction_as_single_predecessor( cfg, instr, c_instr );
mark_visited( c_instr );
c_instr = create_format2_instruction( SETHI, o0, HI( method ), -23 );
insert_instruction_as_single_predecessor( cfg, instr, c_instr );
mark_visited( c_instr );
c_instr = create_format5_instruction( OR, o0, o0, LO( method ), -23 );
insert_instruction_as_single_predecessor( cfg, instr, c_instr );
mark_visited( c_instr );
c_instr = create_format6_instruction( RDY, o1, 5, 0, -23 );
insert_instruction_as_single_predecessor( cfg, instr, c_instr );
mark_visited( c_instr );
c_instr = create_format2_instruction( SETHI, o2, HI( instrNO ), -23 );
insert_instruction_as_single_predecessor( cfg, instr, c_instr );
mark_visited( c_instr );
c_instr = create_format5_instruction( OR, o2, o2, LO( instrNO ), -23 );
insert_instruction_as_single_predecessor( cfg, instr, c_instr );
mark_visited( c_instr );
c_instr = create_format1_instruction( CALL,
(int) ProfileRISCInstr, -23);
insert_instruction_as_single_predecessor( cfg, instr, c_instr );
add_new_resolve_instr( cfg, c_instr, (void *) ProfileRISCInstr );
mark_visited( c_instr );
c_instr = create_format2_instruction( SETHI, g0, 0, -23 );
insert_instruction_as_single_predecessor( cfg, instr, c_instr );
set_delay_slot_instr( c_instr );
mark_visited( c_instr );
c_instr = create_format6_instruction( ADD, g1, l0, g0, -23 );
insert_instruction_as_single_predecessor( cfg, instr, c_instr );
mark_visited( c_instr );
c_instr = create_format6_instruction( ADD, g2, l1, g0, -23 );
insert_instruction_as_single_predecessor( cfg, instr, c_instr );
mark_visited( c_instr );
c_instr = create_format6_instruction( ADD, g3, l2, g0, -23 );
insert_instruction_as_single_predecessor( cfg, instr, c_instr );
mark_visited( c_instr );
c_instr = create_format6_instruction( ADD, g4, l3, g0, -23 );
insert_instruction_as_single_predecessor( cfg, instr, c_instr );
mark_visited( c_instr );
c_instr = create_format6_instruction( ADD, g5, l4, g0, -23 );
insert_instruction_as_single_predecessor( cfg, instr, c_instr );
mark_visited( c_instr );
c_instr = create_format6_instruction( ADD, g6, l5, g0, -23 );
insert_instruction_as_single_predecessor( cfg, instr, c_instr );
mark_visited( c_instr );
c_instr = create_format6_instruction( ADD, g7, l6, g0, -23 );
insert_instruction_as_single_predecessor( cfg, instr, c_instr );
mark_visited( c_instr );
c_instr = create_format6_instruction( WRY, 2, l7, 0, -23 );
insert_instruction_as_single_predecessor( cfg, instr, c_instr );
mark_visited( c_instr );
c_instr = create_format6_instruction( RESTORE, g0, g0, g0, -23 );
insert_instruction_as_single_predecessor( cfg, instr, c_instr );
mark_visited( c_instr );
}
