static u32 mdss_mdp_smp_mmb_reserve(struct mdss_mdp_pipe_smp_map *smp_map,
size_t n)
{
u32 i, mmb;
u32 fixed_cnt = bitmap_weight(smp_map->fixed, SMP_MB_CNT);
struct mdss_data_type *mdata = mdss_mdp_get_mdata();
if (n <= fixed_cnt)
return fixed_cnt;
else
n -= fixed_cnt;
i = bitmap_weight(smp_map->allocated, SMP_MB_CNT);
if (i != 0 && n != i) {
pr_debug("Can't change mmb config, num_blks: %d alloc: %d\n",
n, i);
return 0;
}
mdss_mdp_smp_mmb_free(smp_map->reserved, false);
for (; i < n; i++) {
if (bitmap_full(mdata->mmb_alloc_map, SMP_MB_CNT))
break;
mmb = find_first_zero_bit(mdata->mmb_alloc_map, SMP_MB_CNT);
set_bit(mmb, smp_map->reserved);
set_bit(mmb, mdata->mmb_alloc_map);
}
return i + fixed_cnt;
}
static u32 mdss_mdp_smp_mmb_reserve(struct mdss_mdp_pipe_smp_map *smp_map,
size_t n, bool force_alloc)
{
u32 i, mmb;
u32 fixed_cnt = bitmap_weight(smp_map->fixed, SMP_MB_CNT);
struct mdss_data_type *mdata = mdss_mdp_get_mdata();
if (n <= fixed_cnt)
return fixed_cnt;
else
n -= fixed_cnt;
i = bitmap_weight(smp_map->allocated, SMP_MB_CNT);
/*
* SMP programming is not double buffered. Fail the request,
* that calls for change in smp configuration (addition/removal
* of smp blocks), so that fallback solution happens.
*/
#if defined(CONFIG_ARCH_MSM8226) || (CONFIG_ARCH_MSM8974)
if (i != 0 && n != i && !force_alloc) {
pr_debug("Can't change mmb config, num_blks: %d alloc: %d\n",
n, i);
pr_debug("Can't change mmb configuration in set call\n");
return 0;
}
#else
if (i != 0 && n != i) {
pr_debug("Can't change mmb config, num_blks: %d alloc: %d\n",
n, i);
pr_debug("Can't change mmb configuration in set call\n");
return 0;
}
#endif
/*
* Clear previous SMP reservations and reserve according to the
* latest configuration
*/
mdss_mdp_smp_mmb_free(smp_map->reserved, false);
/* Reserve mmb blocks*/
for (; i < n; i++) {
if (bitmap_full(mdata->mmb_alloc_map, SMP_MB_CNT))
break;
mmb = find_first_zero_bit(mdata->mmb_alloc_map, SMP_MB_CNT);
set_bit(mmb, smp_map->reserved);
set_bit(mmb, mdata->mmb_alloc_map);
}
return i + fixed_cnt;
}
static inline bool is_unused_smp_allowed(void)
{
struct mdss_data_type *mdata = mdss_mdp_get_mdata();
switch (MDSS_GET_MAJOR_MINOR(mdata->mdp_rev)) {
case MDSS_GET_MAJOR_MINOR(MDSS_MDP_HW_REV_103):
case MDSS_GET_MAJOR_MINOR(MDSS_MDP_HW_REV_105):
case MDSS_GET_MAJOR_MINOR(MDSS_MDP_HW_REV_109):
return true;
default:
return false;
}
}
static bool mdss_mdp_kcal_is_panel_on(void)
{
int i;
struct mdss_mdp_ctl *ctl;
struct mdss_data_type *mdata = mdss_mdp_get_mdata();
for (i = 0; i < mdata->nctl; i++) {
ctl = mdata->ctl_off + i;
if (ctl->power_on)
return true;
}
return false;
}
void mdss_mdp_footswitch_ctrl_splash(int on)
{
struct mdss_data_type *mdata = mdss_mdp_get_mdata();
if (mdata != NULL) {
if (on) {
pr_debug("Enable MDP FS for splash.\n");
regulator_enable(mdata->fs);
mdss_hw_init(mdata);
} else {
pr_debug("Disable MDP FS for splash.\n");
regulator_disable(mdata->fs);
}
} else {
pr_warn("mdss mdata not initialized\n");
}
}
/*
* poll_panel_status() - Reads panel register.
* @work : driver ic status data
*/
static void poll_panel_status(struct work_struct *work)
{
int rc = 0;
struct mdss_data_type *mdata = mdss_mdp_get_mdata();
struct mdss_mdp_ctl *ctl = mdata->ctl_off;
rc = check_poll_status();
if (rc)
return;
rc = check_esd_status();
if (rc)
send_panel_on_seq(ctl,
polling->ctrl_pdata);
else
schedule_delayed_work(&polling->poll_working,
msecs_to_jiffies(polling->intervals));
}
static u32 mdss_mdp_smp_mmb_reserve(struct mdss_mdp_pipe *pipe, struct mdss_mdp_pipe_smp_map *smp_map,
size_t n)
{
u32 i, mmb;
u32 fixed_cnt = bitmap_weight(smp_map->fixed, SMP_MB_CNT);
struct mdss_data_type *mdata = mdss_mdp_get_mdata();
if (n <= fixed_cnt)
return fixed_cnt;
else
n -= fixed_cnt;
i = bitmap_weight(smp_map->allocated, SMP_MB_CNT);
/*
* SMP programming is not double buffered. Fail the request,
* that calls for change in smp configuration (addition/removal
* of smp blocks), so that fallback solution happens.
*/
if (pipe->src_fmt->is_yuv || (pipe->flags & MDP_BACKEND_COMPOSITION)) {
if (i != 0 && n != i) {
pr_debug("Can't change mmb configuration in set call\n");
return 0;
}
}
/*
* Clear previous SMP reservations and reserve according to the
* latest configuration
*/
mdss_mdp_smp_mmb_free(smp_map->reserved, false);
/* reserve more blocks if needed, but can't free mmb at this point */
for (; i < n; i++) {
if (bitmap_full(mdata->mmb_alloc_map, SMP_MB_CNT))
break;
mmb = find_first_zero_bit(mdata->mmb_alloc_map, SMP_MB_CNT);
set_bit(mmb, smp_map->reserved);
set_bit(mmb, mdata->mmb_alloc_map);
}
return i + fixed_cnt;
}
void mdss_mdp_clk_ctrl(int enable, int isr)
{
struct mdss_data_type *mdata = mdss_mdp_get_mdata();
static int mdp_clk_cnt;
int changed = 0;
mutex_lock(&mdp_clk_lock);
if (enable) {
if (mdp_clk_cnt == 0)
changed++;
mdp_clk_cnt++;
} else {
if (mdp_clk_cnt) {
mdp_clk_cnt--;
if (mdp_clk_cnt == 0)
changed++;
} else {
pr_err("Can not be turned off\n");
}
}
pr_debug("%s: clk_cnt=%d changed=%d enable=%d\n",
__func__, mdp_clk_cnt, changed, enable);
if (changed) {
mdata->clk_ena = enable;
if (enable)
pm_runtime_get_sync(&mdata->pdev->dev);
mdss_mdp_clk_update(MDSS_CLK_AHB, enable);
mdss_mdp_clk_update(MDSS_CLK_AXI, enable);
mdss_mdp_clk_update(MDSS_CLK_MDP_CORE, enable);
mdss_mdp_clk_update(MDSS_CLK_MDP_LUT, enable);
if (mdata->vsync_ena)
mdss_mdp_clk_update(MDSS_CLK_MDP_VSYNC, enable);
mdss_bus_bandwidth_ctrl(enable);
if (!enable)
pm_runtime_put(&mdata->pdev->dev);
}
mutex_unlock(&mdp_clk_lock);
}
static int mdss_mdp_kcal_display_commit(void)
{
int i;
int ret = 0;
struct mdss_mdp_ctl *ctl;
struct mdss_data_type *mdata = mdss_mdp_get_mdata();
for (i = 0; i < mdata->nctl; i++) {
ctl = mdata->ctl_off + i;
/* pp setup requires mfd */
if ((ctl->power_on) && (ctl->mfd)) {
ret = mdss_mdp_pp_setup(ctl);
if (ret)
pr_err("%s: setup failed: %d\n", __func__, ret);
}
}
return ret;
}
void mdss_mdp_secure_vote(int enable)
{
struct mdss_data_type *mdata = mdss_mdp_get_mdata();
int rc;
if (enable) {
if (!mdata->secure_mode) {
kref_init(&mdata->sec_kref);
rc = __mdss_mdp_set_secure(mdata, 1);
WARN(rc, "Secure MDSS failed=%d\n", rc);
} else {
kref_get(&mdss_res->sec_kref);
}
} else {
WARN(!mdata->secure_mode, "Unbalanced secure mode ref count\n");
kref_put(&mdata->sec_kref, __mdss_mdp_end_secure);
}
}
static void mdss_mdp_kcal_update_pa(struct kcal_lut_data *lut_data)
{
u32 copyback = 0;
struct mdp_pa_cfg_data pa_config;
struct mdp_pa_v2_cfg_data pa_v2_config;
struct mdss_data_type *mdata = mdss_mdp_get_mdata();
if (mdata->mdp_rev < MDSS_MDP_HW_REV_103) {
memset(&pa_config, 0, sizeof(struct mdp_pa_cfg_data));
pa_config.block = MDP_LOGICAL_BLOCK_DISP_0;
pa_config.pa_data.flags = lut_data->enable ?
MDP_PP_OPS_WRITE | MDP_PP_OPS_ENABLE :
MDP_PP_OPS_WRITE | MDP_PP_OPS_DISABLE;
pa_config.pa_data.hue_adj = lut_data->hue;
pa_config.pa_data.sat_adj = lut_data->sat;
pa_config.pa_data.val_adj = lut_data->val;
pa_config.pa_data.cont_adj = lut_data->cont;
mdss_mdp_pa_config(&pa_config, ©back);
} else {
memset(&pa_v2_config, 0, sizeof(struct mdp_pa_v2_cfg_data));
pa_v2_config.block = MDP_LOGICAL_BLOCK_DISP_0;
pa_v2_config.pa_v2_data.flags = lut_data->enable ?
MDP_PP_OPS_WRITE | MDP_PP_OPS_ENABLE :
MDP_PP_OPS_WRITE | MDP_PP_OPS_DISABLE;
pa_v2_config.pa_v2_data.flags |= MDP_PP_PA_HUE_ENABLE;
pa_v2_config.pa_v2_data.flags |= MDP_PP_PA_HUE_MASK;
pa_v2_config.pa_v2_data.flags |= MDP_PP_PA_SAT_ENABLE;
pa_v2_config.pa_v2_data.flags |= MDP_PP_PA_SAT_MASK;
pa_v2_config.pa_v2_data.flags |= MDP_PP_PA_VAL_ENABLE;
pa_v2_config.pa_v2_data.flags |= MDP_PP_PA_VAL_MASK;
pa_v2_config.pa_v2_data.flags |= MDP_PP_PA_CONT_ENABLE;
pa_v2_config.pa_v2_data.flags |= MDP_PP_PA_CONT_MASK;
pa_v2_config.pa_v2_data.global_hue_adj = lut_data->hue;
pa_v2_config.pa_v2_data.global_sat_adj = lut_data->sat;
pa_v2_config.pa_v2_data.global_val_adj = lut_data->val;
pa_v2_config.pa_v2_data.global_cont_adj = lut_data->cont;
mdss_mdp_pa_v2_config(&pa_v2_config, ©back);
}
}
static int mdss_mdp_smp_mmb_set(int client_id, unsigned long *smp)
{
u32 mmb, off, data, s;
int cnt = 0;
struct mdss_data_type *mdata = mdss_mdp_get_mdata();
for_each_set_bit(mmb, smp, SMP_MB_CNT) {
off = (mmb / 3) * 4;
s = (mmb % 3) * 8;
data = readl_relaxed(mdata->mdp_base +
MDSS_MDP_REG_SMP_ALLOC_W0 + off);
data &= ~(0xFF << s);
data |= client_id << s;
writel_relaxed(data, mdata->mdp_base +
MDSS_MDP_REG_SMP_ALLOC_W0 + off);
writel_relaxed(data, mdata->mdp_base +
MDSS_MDP_REG_SMP_ALLOC_R0 + off);
cnt++;
}
int mdss_mdp_pipe_panic_signal_ctrl(struct mdss_mdp_pipe *pipe, bool enable)
{
uint32_t panic_robust_ctrl;
struct mdss_data_type *mdata = mdss_mdp_get_mdata();
if (!mdata->has_panic_ctrl)
goto end;
mdss_mdp_clk_ctrl(MDP_BLOCK_POWER_ON);
panic_robust_ctrl = readl_relaxed(mdata->mdp_base +
MMSS_MDP_PANIC_ROBUST_CTRL);
if (enable)
panic_robust_ctrl |= BIT(pipe->panic_ctrl_ndx);
else
panic_robust_ctrl &= ~BIT(pipe->panic_ctrl_ndx);
writel_relaxed(panic_robust_ctrl,
mdata->mdp_base + MMSS_MDP_PANIC_ROBUST_CTRL);
mdss_mdp_clk_ctrl(MDP_BLOCK_POWER_OFF);
end:
return 0;
}
/**
* mdss_bus_bandwidth_ctrl() -- place bus bandwidth request
* @enable: value of enable or disable
*
* Function place bus bandwidth request to allocate saved bandwidth
* if enabled or free bus bandwidth allocation if disabled.
* Bus bandwidth is required by mdp.For dsi, it only requires to send
* dcs coammnd.
*/
void mdss_bus_bandwidth_ctrl(int enable)
{
struct mdss_data_type *mdata = mdss_mdp_get_mdata();
static int bus_bw_cnt;
int changed = 0;
mutex_lock(&bus_bw_lock);
if (enable) {
if (bus_bw_cnt == 0)
changed++;
bus_bw_cnt++;
} else {
if (bus_bw_cnt) {
bus_bw_cnt--;
if (bus_bw_cnt == 0)
changed++;
} else {
pr_err("Can not be turned off\n");
}
}
pr_debug("bw_cnt=%d changed=%d enable=%d\n",
bus_bw_cnt, changed, enable);
if (changed) {
if (!enable) {
msm_bus_scale_client_update_request(
mdata->bus_hdl, 0);
pm_runtime_put(&mdata->pdev->dev);
} else {
pm_runtime_get_sync(&mdata->pdev->dev);
msm_bus_scale_client_update_request(
mdata->bus_hdl, mdata->current_bus_idx);
}
}
mutex_unlock(&bus_bw_lock);
}
int mdss_mdp_pipe_panic_signal_ctrl(struct mdss_mdp_pipe *pipe, bool enable)
{
uint32_t panic_robust_ctrl;
struct mdss_data_type *mdata = mdss_mdp_get_mdata();
if (!mdata->has_panic_ctrl)
goto end;
switch (mdss_mdp_panic_signal_support_mode(mdata, pipe)) {
case MDSS_MDP_PANIC_COMMON_REG_CFG:
mdss_mdp_clk_ctrl(MDP_BLOCK_POWER_ON);
panic_robust_ctrl = readl_relaxed(mdata->mdp_base +
MMSS_MDP_PANIC_ROBUST_CTRL);
if (enable)
panic_robust_ctrl |= BIT(pipe->panic_ctrl_ndx);
else
panic_robust_ctrl &= ~BIT(pipe->panic_ctrl_ndx);
writel_relaxed(panic_robust_ctrl,
mdata->mdp_base + MMSS_MDP_PANIC_ROBUST_CTRL);
mdss_mdp_clk_ctrl(MDP_BLOCK_POWER_OFF);
break;
case MDSS_MDP_PANIC_PER_PIPE_CFG:
mdss_mdp_clk_ctrl(MDP_BLOCK_POWER_ON);
panic_robust_ctrl = mdss_mdp_pipe_read(pipe,
MDSS_MDP_REG_SSPP_QOS_CTRL);
if (enable)
panic_robust_ctrl |= BIT(0);
else
panic_robust_ctrl &= ~BIT(0);
mdss_mdp_pipe_write(pipe, MDSS_MDP_REG_SSPP_QOS_CTRL,
panic_robust_ctrl);
mdss_mdp_clk_ctrl(MDP_BLOCK_POWER_OFF);
break;
}
end:
return 0;
}
static u32 mdss_mdp_smp_mmb_reserve(struct mdss_mdp_pipe_smp_map *smp_map,
size_t n)
{
u32 i, mmb;
u32 fixed_cnt = bitmap_weight(smp_map->fixed, SMP_MB_CNT);
struct mdss_data_type *mdata = mdss_mdp_get_mdata();
if (n <= fixed_cnt)
return fixed_cnt;
else
n -= fixed_cnt;
/* reserve more blocks if needed, but can't free mmb at this point */
for (i = bitmap_weight(smp_map->allocated, SMP_MB_CNT); i < n; i++) {
if (bitmap_full(mdata->mmb_alloc_map, SMP_MB_CNT))
break;
mmb = find_first_zero_bit(mdata->mmb_alloc_map, SMP_MB_CNT);
set_bit(mmb, smp_map->reserved);
set_bit(mmb, mdata->mmb_alloc_map);
}
return i + fixed_cnt;
}
void htc_set_pp_pa(struct mdss_mdp_ctl *ctl)
{
struct mdss_data_type *mdata;
struct mdss_mdp_mixer *mixer;
u32 base = 0, opmode;
char __iomem *basel;
if (htc_mdss_pp_pa[HUE_INDEX].req_value == htc_mdss_pp_pa[HUE_INDEX].cur_value)
return;
if (htc_mdss_pp_pa[HUE_INDEX].req_value >= HUE_MAX)
return;
mdata = mdss_mdp_get_mdata();
mixer = mdata->mixer_intf;
base = MDSS_MDP_REG_DSPP_OFFSET(0);
basel = mixer->dspp_base;
mdss_mdp_clk_ctrl(MDP_BLOCK_POWER_ON, false);
MDSS_MDP_REG_WRITE(base + MDSS_MDP_REG_DSPP_PA_BASE, htc_mdss_pp_pa[HUE_INDEX].req_value);
opmode = MDSS_MDP_REG_READ(base);
opmode |= (1 << 20);
writel_relaxed(opmode, basel + MDSS_MDP_REG_DSPP_OP_MODE);
ctl->flush_bits |= BIT(13);
wmb();
mdss_mdp_clk_ctrl(MDP_BLOCK_POWER_OFF, false);
htc_mdss_pp_pa[HUE_INDEX].cur_value = htc_mdss_pp_pa[HUE_INDEX].req_value;
PR_DISP_INFO("%s pp_hue = 0x%x\n", __func__, htc_mdss_pp_pa[HUE_INDEX].req_value);
}
int mdss_dsi_on(struct mdss_panel_data *pdata)
{
int ret = 0;
struct mdss_panel_info *pinfo;
struct mipi_panel_info *mipi;
struct mdss_dsi_ctrl_pdata *ctrl_pdata = NULL;
struct mdss_data_type *mdata = mdss_mdp_get_mdata();
if (pdata == NULL) {
pr_err("%s: Invalid input data\n", __func__);
return -EINVAL;
}
if (pdata->panel_info.panel_power_on) {
pr_warn("%s:%d Panel already on.\n", __func__, __LINE__);
return 0;
}
ctrl_pdata = container_of(pdata, struct mdss_dsi_ctrl_pdata,
panel_data);
pr_info("%s+: ctrl=%p ndx=%d\n",
__func__, ctrl_pdata, ctrl_pdata->ndx);
pinfo = &pdata->panel_info;
mipi = &pdata->panel_info.mipi;
if (ctrl_pdata->partial_mode_enabled
&& !pdata->panel_info.panel_dead) {
mdss_dsi_ulps_config_sub(ctrl_pdata, 0, 1);
mdata->ulps = false;
pdata->panel_info.panel_power_on = 1;
mdss_dsi_clk_ctrl(ctrl_pdata, DSI_ALL_CLKS, 1);
} else {
if (ctrl_pdata->partial_mode_enabled
&& pdata->panel_info.panel_dead)
pr_warn("%s: Panel is dead, bring up DSI\n", __func__);
ret = mdss_dsi_panel_power_on(pdata, 1);
if (ret) {
pr_err("%s:Panel power on failed. rc=%d\n", __func__, ret);
return ret;
}
mdss_dsi_clk_ctrl(ctrl_pdata, DSI_BUS_CLKS, 1);
if (ret) {
pr_err("%s: failed to enable bus clocks. rc=%d\n", __func__,
ret);
ret = mdss_dsi_panel_power_on(pdata, 0);
if (ret) {
pr_err("%s: Panel reset failed. rc=%d\n",
__func__, ret);
return ret;
}
pdata->panel_info.panel_power_on = 0;
return ret;
}
pdata->panel_info.panel_power_on = 1;
mdss_dsi_phy_sw_reset((ctrl_pdata->ctrl_base));
mdss_dsi_phy_init(pdata);
mdss_dsi_clk_ctrl(ctrl_pdata, DSI_BUS_CLKS, 0);
mdss_dsi_clk_ctrl(ctrl_pdata, DSI_ALL_CLKS, 1);
__mdss_dsi_ctrl_setup(pdata);
mdss_dsi_sw_reset(pdata);
mdss_dsi_host_init(pdata);
}
/*
* Issue hardware reset line after enabling the DSI clocks and data
* data lanes for LP11 init
*/
if (mipi->lp11_init)
mdss_dsi_panel_reset(pdata, 1);
if (mipi->init_delay)
usleep(mipi->init_delay);
if (mipi->force_clk_lane_hs) {
u32 tmp;
tmp = MIPI_INP((ctrl_pdata->ctrl_base) + 0xac);
tmp |= (1<<28);
MIPI_OUTP((ctrl_pdata->ctrl_base) + 0xac, tmp);
wmb();
}
if (pdata->panel_info.type == MIPI_CMD_PANEL)
mdss_dsi_clk_ctrl(ctrl_pdata, DSI_ALL_CLKS, 0);
pr_info("%s-:\n", __func__);
return 0;
}
static int mdss_dsi_off(struct mdss_panel_data *pdata)
{
int ret = 0;
struct mdss_dsi_ctrl_pdata *ctrl_pdata = NULL;
struct mdss_panel_info *panel_info = NULL;
struct mdss_data_type *mdata = mdss_mdp_get_mdata();
if (pdata == NULL) {
pr_err("%s: Invalid input data\n", __func__);
return -EINVAL;
}
if (!pdata->panel_info.panel_power_on) {
pr_warn("%s:%d Panel already off.\n", __func__, __LINE__);
return -EPERM;
}
pdata->panel_info.panel_power_on = 0;
ctrl_pdata = container_of(pdata, struct mdss_dsi_ctrl_pdata,
panel_data);
panel_info = &ctrl_pdata->panel_data.panel_info;
pr_info("%s+: ctrl=%p ndx=%d\n", __func__,
ctrl_pdata, ctrl_pdata->ndx);
if (ctrl_pdata->partial_mode_enabled
&& !pdata->panel_info.panel_dead) {
mdss_dsi_ulps_config_sub(ctrl_pdata, 1, 1);
mdata->ulps = true;
} else {
if (ctrl_pdata->partial_mode_enabled
&& pdata->panel_info.panel_dead)
pr_warn("%s: Panel is dead, shut down DSI\n", __func__);
if (pdata->panel_info.type == MIPI_CMD_PANEL)
mdss_dsi_clk_ctrl(ctrl_pdata, DSI_ALL_CLKS, 1);
/* disable DSI controller */
mdss_dsi_controller_cfg(0, pdata);
/* disable DSI phy */
mdss_dsi_phy_disable(ctrl_pdata);
mdss_dsi_clk_ctrl(ctrl_pdata, DSI_ALL_CLKS, 0);
ret = mdss_dsi_panel_power_on(pdata, 0);
if (ret) {
pr_err("%s: Panel power off failed\n", __func__);
return ret;
}
}
if (panel_info->dynamic_fps
&& (panel_info->dfps_update == DFPS_SUSPEND_RESUME_MODE)
&& (panel_info->new_fps != panel_info->mipi.frame_rate))
panel_info->mipi.frame_rate = panel_info->new_fps;
pr_info("%s-:\n", __func__);
return ret;
}
void klog(void)
{
int i;
static u32 *buff = NULL;
int mdp_reg_count = 0;
struct mdss_panel_data *pdata = NULL;
struct mdss_dsi_ctrl_pdata *ctrl_pdata = NULL;
struct mdss_data_type *mdata = mdss_mdp_get_mdata();
int mdp_reg_dump_en;
unsigned long flags;
/* NULL Checks */
if(mdata == NULL) return;
if(mdata->ctl_off == NULL) return;
pdata = (mdata->ctl_off+0)->panel_data;
if(pdata ==NULL) return;
ctrl_pdata = container_of(pdata, struct mdss_dsi_ctrl_pdata,
panel_data);
mdp_reg_dump_en = (ctrl_pdata->ctrl_state & CTRL_STATE_PANEL_INIT);
if(debug_mdp->reg_log.last*4 >= debug_mdp->reg_log.len ) return;
if(debug_mdp->reg_log.len == 0) return;
pr_debug("KK: -----------> Inside %s",__func__);
#ifdef __KERNEL__
mdss_mdp_clk_ctrl(MDP_BLOCK_POWER_ON, false);
spin_lock_irqsave(&xlock, flags);
#else
if((readl_relaxed(HWIO_MMSS_MDSS_AHB_CBCR_ADDR) & 0x80000000) != 0x0) {
pr_info("AHB Clock not ON, Cannot Read MDP Regs\n");
}
//Switch on clcok
#endif
if(debug_mdp && buff == NULL){
buff = (u32 *)((char *)debug_mdp + (sizeof(struct debug_mdp) + debug_mdp->reg_log.offset));
}
else if(!debug_mdp){
pr_info("Debug module not Initialized\n");
return ;
}
pr_debug("KK:------------------->(%s)::>> first: %x \t last: %x buff:%p-%p\n", __func__, debug_mdp->reg_log.first, debug_mdp->reg_log.last,buff,buff+debug_mdp->reg_log.len);
if(!mdp_reg_dump_en)
i = sizeof(mdss_reg_desc)/sizeof(struct reg_desc) -1;
else
i = 1;
for(; i < sizeof(mdss_reg_desc)/sizeof(struct reg_desc) ; i++){
buff[debug_mdp->reg_log.last++] = START_MAGIC;
buff[debug_mdp->reg_log.last++] = mdss_reg_desc[i].base;
#if defined(__KERNEL__)
if(fill_reg_log(buff, mdss_reg_desc[i].vaddr, mdss_reg_desc[i].len))
pr_info("failed to dump lcd regs at %x ----------> KK\n",mdss_reg_desc[i].base);
#else
if(fill_reg_log(buff, base, len*4))
pr_info("failed to dump lcd regs at %x ----------> KK\n",base);
#endif
}
#if defined(CONFIG_ARCH_MSM8974) || defined(CONFIG_ARCH_MSM8226)
if(mdp_reg_dump_en){
buff[debug_mdp->reg_log.last++] = START_MAGIC;
buff[debug_mdp->reg_log.last++] = mdss_reg_desc[0].base;
for(i = 0; i < sizeof(mdp_reg_info)/sizeof(u32); i++){
int len;
u32 base;
len = mdp_reg_info[i] & 0xfff00000;
len = len >> 20;
len += 1;
mdp_reg_count += len;
base = mdp_reg_info[i] & 0x000fffff;
base = base | mdss_reg_desc[0].base;
#if defined(__KERNEL__)
if(fill_reg_log(buff, mdp_reg_vaddr[i], len*4))
pr_info("failed to dump lcd regs at %x ----------> KK\n",base);
#else
if(fill_reg_log(buff, base, len*4))
pr_info("failed to dump lcd regs at %x ----------> KK\n",base);
#endif
}
}
#endif
#ifdef __KERNEL__
spin_unlock_irqrestore(&xlock, flags);
mdss_mdp_clk_ctrl(MDP_BLOCK_POWER_OFF, false);
#else
//Switch off clock
#endif
pr_debug("total mdp regs: %d\n",mdp_reg_count);
}
