char* cpu_get_disassembly(memory_t *mem, uword_t addr) {
instruction_t instruction;
if (memory_read_byte(mem, addr) == CPU_EXTENDED_OPCODE)
instruction = cpu_get_extended_instruction(mem, addr);
else
instruction = cpu_get_instruction(mem, addr);
char *disassembly;
// Create the disassembly
switch (instruction.operand_length) {
case 0:
asprintf(&disassembly, instruction.disassembly, NULL);
break;
case 1:
asprintf(&disassembly, instruction.disassembly, memory_read_byte(mem, addr+1));
break;
case 2:
asprintf(&disassembly, instruction.disassembly, memory_read_word(mem, addr+1));
}
return disassembly;
}
static CPU_RESET( lh5801 )
{
lh5801_state *cpustate = get_safe_token(device);
P = (memory_read_byte(cpustate->program, 0xfffe)<<8) | memory_read_byte(cpustate->program, 0xffff);
cpustate->idle=0;
}
static void galpani2_write_kaneko(running_device *device)
{
const address_space *dstspace = cpu_get_address_space(device, ADDRESS_SPACE_PROGRAM);
int i,x,tpattidx;
unsigned char testpattern[] = {0xFF,0x55,0xAA,0xDD,0xBB,0x99};
/* Write "KANEKO" to 100000-100005, but do not clash with ram test */
x = 0;
for (i = 0x100000; i < 0x100007; i++)
{
for (tpattidx = 0; tpattidx < 6; tpattidx++)
{
if (memory_read_byte(dstspace,i) == testpattern[tpattidx]) x = 1; //ram test fragment present
}
}
if ( x == 0 )
{
memory_write_byte(dstspace,0x100000,0x4b); //K
memory_write_byte(dstspace,0x100001,0x41); //A
memory_write_byte(dstspace,0x100002,0x4e); //N
memory_write_byte(dstspace,0x100003,0x45); //E
memory_write_byte(dstspace,0x100004,0x4b); //K
memory_write_byte(dstspace,0x100005,0x4f); //O
}
}
static READ8_HANDLER( pc_dma_read_byte )
{
offs_t page_offset = (((offs_t) dma_offset[0][dma_channel]) << 16)
& 0xFF0000;
return memory_read_byte(space, page_offset + offset);
}
static uint8_t disasm_fetch_byte(void) {
uint8_t value = memory_read_byte(disasm.new_address++);
sprintf(tmpbuf,"%02X",value);
disasm.instruction.data += std::string(tmpbuf);
disasm.instruction.size++;
return value;
}
INLINE UINT8 READ8(hc11_state *cpustate, UINT32 address)
{
if(address >= cpustate->reg_position && address < cpustate->reg_position+(cpustate->has_extended_io ? 0x100 : 0x40))
{
return hc11_regs_r(cpustate, address);
}
else if(address >= cpustate->ram_position && address < cpustate->ram_position+cpustate->internal_ram_size)
{
return cpustate->internal_ram[address-cpustate->ram_position];
}
return memory_read_byte(cpustate->program, address);
}
static WRITE8_HANDLER( galpani2_mcu_init_w )
{
running_machine *machine = space->machine;
const address_space *srcspace = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
const address_space *dstspace = cputag_get_address_space(machine, "sub", ADDRESS_SPACE_PROGRAM);
UINT32 mcu_address, mcu_data;
for ( mcu_address = 0x100010; mcu_address < (0x100010 + 6); mcu_address += 1 )
{
mcu_data = memory_read_byte(srcspace, mcu_address );
memory_write_byte(dstspace, mcu_address-0x10, mcu_data);
}
cputag_set_input_line(machine, "sub", INPUT_LINE_IRQ7, HOLD_LINE); //MCU Initialised
}
int cpu_interpret_next_instruction(memory_t *mem, registers_t *regs) {
// Current instruction to interpret
instruction_t curr;
// Fetch current instruction
if (memory_read_byte(mem, regs->PC) == CPU_EXTENDED_OPCODE)
curr = cpu_get_extended_instruction(mem, regs->PC);
else
curr = cpu_get_instruction(mem, regs->PC);
// Check if implemented
if (curr.function == NULL)
return CPU_UNIMPLEMENTED_INSTRUCTION;
// Execute the instruction
curr.function(mem, regs);
return 0;
}
/*===========================================================
* This ftn outputs a byte via the SPI controller. Any
* other CSx or IOMUX is handled elsewhere.
*==========================================================*/
void spi_output_byte( u8 *dbuf, int bytes )
{
u8 tmp, cnt;
if (spi_base == 0)
spi_init_address();
/* check for idle */
while (1) {
if ( memory_read_byte(spi_base + SPI_CNTRL0_3) & SPI_STATUS_BUSY)
printf("SPI controller BUSY\n");
else
break;
}
/* clear the FIFO pointer */
memory_write_byte(spi_base + SPI_CNTRL0_2, memory_read_byte(spi_base + SPI_CNTRL0_2) | SPI_FIFO_PTR_CLR);
/* read the FIFO pointer */
tmp = memory_read_byte(spi_base + SPI_CNTRL1_D) & SPI_FIFO_PTR_MASK;
if (tmp != 0)
printf("ERROR: FIFO PTR is %d should be 0\n",tmp);
/* write the TX/RX byte counters */
memory_write_byte(spi_base + SPI_CNTRL0_1, bytes - 1);
/* write the 1st byte of data to the OPCODE reg */
memory_write_byte(spi_base + SPI_CNTRL0_0, *(dbuf + 0) );
if ( bytes > 8 )
printf("ERROR: too many bytes specified [%d]\n",bytes);
if (bytes > 1) {
for ( cnt = 1; cnt < bytes; cnt++ )
memory_write_byte(spi_base + SPI_CNTRL1_C, *(dbuf + cnt) );
}
/* read the FIFO pointer */
tmp = memory_read_byte(spi_base + SPI_CNTRL1_D) & SPI_FIFO_PTR_MASK;
if ((tmp + 1 ) != bytes)
printf("ERROR: FIFO PTR is %d should be %d\n",tmp,bytes);
/* clear the FIFO pointer */
memory_write_byte(spi_base + SPI_CNTRL0_2, memory_read_byte(spi_base + SPI_CNTRL0_2) | SPI_FIFO_PTR_CLR);
/* Start the SPI cycle */
memory_write_byte(spi_base + SPI_CNTRL0_2, memory_read_byte(spi_base + SPI_CNTRL0_2) | SPI_TRANSMIT );
}
static UINT8 hc11_regs_r(hc11_state *cpustate, UINT32 address)
{
int reg = address & 0xff;
switch(reg)
{
case 0x00: /* PORTA */
return memory_read_byte(cpustate->io, MC68HC11_IO_PORTA);
case 0x01: /* DDRA */
return 0;
case 0x02: /* PIOC */
return 0;
case 0x03: /* PORTC */
return memory_read_byte(cpustate->io, MC68HC11_IO_PORTC);
case 0x04: /* PORTB */
return memory_read_byte(cpustate->io, MC68HC11_IO_PORTB);
case 0x08: /* PORTD */
return memory_read_byte(cpustate->io, MC68HC11_IO_PORTD);
case 0x09: /* DDRD */
return 0;
case 0x0a: /* PORTE */
return memory_read_byte(cpustate->io, MC68HC11_IO_PORTE);
case 0x23:
return cpustate->tflg1;
case 0x28: /* SPCR1 */
return 0;
case 0x30: /* ADCTL */
return 0x80;
case 0x31: /* ADR1 */
{
if (cpustate->adctl & 0x10)
{
return memory_read_byte(cpustate->io, (cpustate->adctl & 0x4) + MC68HC11_IO_AD0);
}
else
{
return memory_read_byte(cpustate->io, (cpustate->adctl & 0x7) + MC68HC11_IO_AD0);
}
}
case 0x32: /* ADR2 */
{
if (cpustate->adctl & 0x10)
{
return memory_read_byte(cpustate->io, (cpustate->adctl & 0x4) + MC68HC11_IO_AD1);
}
else
{
return memory_read_byte(cpustate->io, (cpustate->adctl & 0x7) + MC68HC11_IO_AD0);
}
}
case 0x33: /* ADR3 */
{
if (cpustate->adctl & 0x10)
{
return memory_read_byte(cpustate->io, (cpustate->adctl & 0x4) + MC68HC11_IO_AD2);
}
else
{
return memory_read_byte(cpustate->io, (cpustate->adctl & 0x7) + MC68HC11_IO_AD0);
}
}
case 0x34: /* ADR4 */
{
if (cpustate->adctl & 0x10)
{
return memory_read_byte(cpustate->io, (cpustate->adctl & 0x4) + MC68HC11_IO_AD3);
}
else
{
return memory_read_byte(cpustate->io, (cpustate->adctl & 0x7) + MC68HC11_IO_AD0);
}
}
case 0x38: /* OPT2 */
return 0;
case 0x70: /* SCBDH */
return 0;
case 0x71: /* SCBDL */
return 0;
case 0x72: /* SCCR1 */
return 0;
case 0x73: /* SCCR2 */
return 0;
case 0x74: /* SCSR1 */
return 0x40;
case 0x7c: /* PORTH */
return memory_read_byte(cpustate->io, MC68HC11_IO_PORTH);
case 0x7e: /* PORTG */
return memory_read_byte(cpustate->io, MC68HC11_IO_PORTG);
case 0x7f: /* DDRG */
return 0;
case 0x88: /* SPCR2 */
return 0;
case 0x89: /* SPSR2 */
return 0x80;
case 0x8a: /* SPDR2 */
return memory_read_byte(cpustate->io, MC68HC11_IO_SPI2_DATA);
case 0x8b: /* OPT4 */
return 0;
}
logerror("HC11: regs_r %02X\n", reg);
return 0; // Dummy
}
instruction_t cpu_get_extended_instruction(memory_t *mem, uword_t addr) {
return cpu_extended_instructions[memory_read_byte(mem, addr+1)];
}
void xor_n(memory_t *mem, registers_t *regs) {
ubyte_t op = memory_read_byte(mem, (regs->HL));
regs->A ^= op;
regs->PC++;
}
static void galpani2_mcu_nmi1(running_machine *machine)
{
const address_space *srcspace = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
const address_space *dstspace = cputag_get_address_space(machine, "sub", ADDRESS_SPACE_PROGRAM);
UINT32 mcu_list, mcu_command, mcu_address, mcu_extra, mcu_src, mcu_dst, mcu_size;
for ( mcu_list = 0x100021; mcu_list < (0x100021 + 0x40); mcu_list += 4 )
{
mcu_command = memory_read_byte(srcspace, mcu_list);
mcu_address = 0x100000 +
(memory_read_byte(srcspace, mcu_list + 1)<<8) +
(memory_read_byte(srcspace, mcu_list + 2)<<0) ;
mcu_extra = memory_read_byte(srcspace, mcu_list + 3); //0xff for command $A and $2, 0x02 for others
if (mcu_command != 0)
{
logerror("%s : MCU [$%06X] endidx = $%02X / command = $%02X addr = $%04X ? = $%02X.\n",
cpuexec_describe_context(machine),
mcu_list,
memory_read_byte(srcspace, 0x100020),
mcu_command,
mcu_address,
mcu_extra
);
}
switch (mcu_command)
{
case 0x00:
break;
case 0x02: //Copy N bytes from RAM2 to RAM1?, gp2se is the only one to use it, often!
mcu_src = (memory_read_byte(srcspace, mcu_address + 2)<<8) +
(memory_read_byte(srcspace, mcu_address + 3)<<0) ;
mcu_dst = (memory_read_byte(srcspace, mcu_address + 6)<<8) +
(memory_read_byte(srcspace, mcu_address + 7)<<0) ;
mcu_size = (memory_read_byte(srcspace, mcu_address + 8)<<8) +
(memory_read_byte(srcspace, mcu_address + 9)<<0) ;
logerror("%s : MCU executes command $%02X, %04X %02X-> %04x\n",cpuexec_describe_context(machine),mcu_command,mcu_src,mcu_size,mcu_dst);
for( ; mcu_size > 0 ; mcu_size-- )
{
mcu_src &= 0xffff; mcu_dst &= 0xffff;
memory_write_byte(srcspace,0x100000 + mcu_dst,memory_read_byte(dstspace,0x100000 + mcu_src));
mcu_src ++; mcu_dst ++;
}
/* Raise a "job done" flag */
memory_write_byte(srcspace,mcu_address+0,0xff);
memory_write_byte(srcspace,mcu_address+1,0xff);
break;
case 0x0a: // Copy N bytes from RAM1 to RAM2
mcu_src = (memory_read_byte(srcspace, mcu_address + 2)<<8) +
(memory_read_byte(srcspace, mcu_address + 3)<<0) ;
mcu_dst = (memory_read_byte(srcspace, mcu_address + 6)<<8) +
(memory_read_byte(srcspace, mcu_address + 7)<<0) ;
mcu_size = (memory_read_byte(srcspace, mcu_address + 8)<<8) +
(memory_read_byte(srcspace, mcu_address + 9)<<0) ;
logerror("%s : MCU executes command $%02X, %04X %02X-> %04x\n",cpuexec_describe_context(machine),mcu_command,mcu_src,mcu_size,mcu_dst);
for( ; mcu_size > 0 ; mcu_size-- )
{
mcu_src &= 0xffff; mcu_dst &= 0xffff;
memory_write_byte(dstspace,0x100000 + mcu_dst,memory_read_byte(srcspace,0x100000 + mcu_src));
mcu_src ++; mcu_dst ++;
}
/* Raise a "job done" flag */
memory_write_byte(srcspace,mcu_address+0,0xff);
memory_write_byte(srcspace,mcu_address+1,0xff);
break;
//case 0x10: //? Clear gal?
//case 0x14: //? Display gal?
//until
//case 0x50: //? Display gal?
//case 0x68: //? Display "Changed" monster?
//until
//case 0x6E: //? Display "Changed" monster?
//case 0x85: //? Do what?
default:
/* Raise a "job done" flag */
memory_write_byte(srcspace,mcu_address+0,0xff);
memory_write_byte(srcspace,mcu_address+1,0xff);
logerror("%s : MCU ERROR, unknown command $%02X\n",cpuexec_describe_context(machine),mcu_command);
}
/* Erase command (so that it won't be processed again)? */
memory_write_byte(srcspace,mcu_list,0x00);
}
}
void jr_nz_n(memory_t *mem, registers_t *regs) {
regs->PC += (regs->flags.Z) != 0 ? memory_read_byte(mem, regs->PC+1) : 1;
}
INLINE UINT16 h8_mem_read16(h83xx_state *h8, offs_t address)
{
UINT16 result = memory_read_byte(h8->program, address)<<8;
return result | memory_read_byte(h8->program, address+1);
}
u8 spi_read_reg( u8 reg ) {
if (spi_base == 0)
spi_init_address();
return memory_read_byte(spi_base + reg);
}
/*TASK*-------------------------------------------------------------------
*
* Task Name : main_task
* Comments :
*
*END*----------------------------------------------------------------------*/
void main_task
(
uint_32 dummy
)
{
MQX_FILE_PTR qspifd;
int_32 ret = 0, i, byte_write, byte_read;
uint_8_ptr data;
uint_8 test_data[512];
TIME_STRUCT start_time, end_time, diff_time;
printf ("\n-------------- QSPI driver example --------------\n\n");
printf ("This example application demonstrates usage of QSPI driver.\n");
/* Open the QSPI driver */
qspifd = fopen (TEST_CHANNEL, NULL);
if (qspifd == NULL) {
printf ("Error opening QSPI driver!\n");
_time_delay (200L);
_task_block ();
}
/* erase all */
printf("\n\n************************************************************************\n");
printf("Erase the first flash chip, for S25FL128S/256S, it might take 30s/60s....\n");
printf("************************************************************************\n");
_time_get(&start_time);
memory_chip_erase(qspifd, FLASH_BASE_ADR);
_time_get(&end_time);
_time_diff(&start_time, &end_time, &diff_time);
printf("\nErase whole flash %ld sec, %ld millisec\n", diff_time.SECONDS, diff_time.MILLISECONDS);
printf("Finish erase all flash\n");
printf("\n\n*****************************************\n");
printf("*** Function Test <memory_read_data> ****\n");
printf("*****************************************\n");
printf("From Flash %08x: first 20 btyes\n", TEST_BUFFER1);
byte_read = memory_read_data(qspifd, TEST_BUFFER1, 20, test_data);
if (byte_read < 0) {
printf("memory_read_data failed!\n");
return;
}
for (i = 0; i < 20; i++) {
printf("0x%02x ", test_data[i]);
}
printf("\n\n*****************************************\n");
printf("*** Function Test <memory_read_byte> ****\n");
printf("*****************************************\n");
printf("From Flash %08x: first 20 bytes\n", TEST_BUFFER1);
for (i = 0; i < 20; i++) {
printf("0x%02x ", memory_read_byte(qspifd, TEST_BUFFER1 + i));
}
printf("\n");
printf("\n\n*****************************************\n");
printf("*** Function Test <memory_write_data> ***\n");
printf("*****************************************\n");
data = (uint_8_ptr)_mem_alloc_zero(TEST_BUF_SIZE1);
if (data == NULL) {
printf("fail to allocate write buffer\n");
fclose(qspifd);
return;
}
for (i = 0; i < TEST_BUF_SIZE1; i++) {
data[i] = i % 256;
}
_time_get(&start_time);
byte_write = memory_write_data (qspifd, TEST_BUFFER1, TEST_BUF_SIZE1, data);
if (byte_write < 0) {
printf("memory_write_data failed!\n");
return;
}
_time_get(&end_time);
_time_diff(&start_time, &end_time, &diff_time);
printf("\ndata = %d, Time spends on Flash write is %ld sec, %ld millisec, rate = %ld kbps\n",
byte_write, diff_time.SECONDS, diff_time.MILLISECONDS,
(byte_write)/(diff_time.SECONDS * 1000 + diff_time.MILLISECONDS));
printf("\n\n*****************************************\n");
printf("***** Time Test <memory_read_data> ******\n");
printf("*****************************************\n");
for (i = 0; i < TEST_BUF_SIZE1; i++) {
data[i] = 255;
}
_time_get(&start_time);
byte_read = memory_read_data (qspifd, TEST_BUFFER1, TEST_BUF_SIZE1, data);
if (byte_read < 0) {
printf("memory_read_data failed!\n");
return;
}
_time_get(&end_time);
_time_diff(&start_time, &end_time, &diff_time);
printf("\ndata = %d, Time spends on Flash read is %ld sec, %ld millisec, rate = %ld kbps\n\n",
byte_write, diff_time.SECONDS, diff_time.MILLISECONDS,
(byte_write)/(diff_time.SECONDS * 1000 + diff_time.MILLISECONDS));
printf("memory_read_data read data from %08x: first 20 bytes \n", TEST_BUFFER1);
for(i = 0; i < 20; i++) {
printf ("0x%02x ", data[i]);
}
printf("\n");
printf("\n\n*****************************************\n");
printf("**** Compare Test <memory_read_byte> ****\n");
printf("*****************************************\n");
printf("memory_read_byte from %08x: first 20 bytes \n", TEST_BUFFER1);
for (i = 0; i < 20; i++) {
printf("0x%02x ", memory_read_byte(qspifd, TEST_BUFFER1 + i));
}
printf("\n");
/* Close the SPI */
_mem_free(data);
ret = (uint_32)fclose (qspifd);
if (ret) {
printf ("Error closing QSPI, returned: 0x%08x\n", ret);
}
printf ("\n-------------- End of example --------------\n\n");
}
