/**
* hard_init - Called by raeth_probe to inititialize network device
* @dev: device pointer
*
* ethdev_init initilize dev->priv and set to END_DEVICE structure
*
*/
void hard_init(struct net_device *dev)
{
END_DEVICE *ei_local = kmalloc(sizeof(END_DEVICE), GFP_KERNEL);
MAC_INFO *macinfo = kmalloc(sizeof(MAC_INFO), GFP_KERNEL);
memset(ei_local, 0 , sizeof(END_DEVICE));
memset(macinfo, 0 , sizeof(MAC_INFO));
macinfo->ivec = dev->irq;
RAETH_PRINT("debug: dev_raether irq is %d(%s)\n", dev->irq, dev->name);
ei_local->MACInfo = macinfo;
dev->priv = (void *)ei_local;
if ( dev->dev_addr != NULL)
ra2880MacAddressSet(macinfo, (void *)(dev->dev_addr));
else
printk("HWnetInit() failed!!!\n");
#if defined (CONFIG_ETHTOOL)
// init mii structure
ei_local->mii_info.dev = dev;
ei_local->mii_info.mdio_read = mdio_read;
ei_local->mii_info.mdio_write = mdio_write;
ei_local->mii_info.phy_id_mask = 0x1f;
ei_local->mii_info.reg_num_mask = 0x1f;
ei_local->mii_info.supports_gmii = mii_check_gmii_support(&ei_local->mii_info);
// TODO: phy_id: 0~4
ei_local->mii_info.phy_id = 1;
#endif
return;
}
void rt_hw_eth_init(void)
{
u64 base_addr = Gmac_base;
struct synopGMACNetworkAdapter * synopGMACadapter;
static u8 mac_addr0[6] = DEFAULT_MAC_ADDRESS;
rt_sem_init(&sem_ack, "tx_ack", 1, RT_IPC_FLAG_FIFO);
rt_sem_init(&sem_lock, "eth_lock", 1, RT_IPC_FLAG_FIFO);
memset(ð_dev, 0, sizeof(eth_dev));
synopGMACadapter = (struct synopGMACNetworkAdapter * )plat_alloc_memory(sizeof (struct synopGMACNetworkAdapter));
if(!synopGMACadapter){
rt_kprintf("Error in Memory Allocataion, Founction : %s \n", __FUNCTION__);
}
memset((char *)synopGMACadapter ,0, sizeof (struct synopGMACNetworkAdapter));
synopGMACadapter->synopGMACdev = NULL;
synopGMACadapter->synopGMACdev = (synopGMACdevice *) plat_alloc_memory(sizeof (synopGMACdevice));
if(!synopGMACadapter->synopGMACdev){
rt_kprintf("Error in Memory Allocataion, Founction : %s \n", __FUNCTION__);
}
memset((char *)synopGMACadapter->synopGMACdev ,0, sizeof (synopGMACdevice));
/*
* Attach the device to MAC struct This will configure all the required base addresses
* such as Mac base, configuration base, phy base address(out of 32 possible phys)
* */
synopGMAC_attach(synopGMACadapter->synopGMACdev,(regbase + MACBASE), regbase + DMABASE, DEFAULT_PHY_BASE, mac_addr0);
init_phy(synopGMACadapter->synopGMACdev);
synopGMAC_reset(synopGMACadapter->synopGMACdev);
/* MII setup */
synopGMACadapter->mii.phy_id_mask = 0x1F;
synopGMACadapter->mii.reg_num_mask = 0x1F;
synopGMACadapter->mii.dev = synopGMACadapter;
synopGMACadapter->mii.mdio_read = mdio_read;
synopGMACadapter->mii.mdio_write = mdio_write;
synopGMACadapter->mii.phy_id = synopGMACadapter->synopGMACdev->PhyBase;
synopGMACadapter->mii.supports_gmii = mii_check_gmii_support(&synopGMACadapter->mii);
eth_dev.iobase = base_addr;
eth_dev.name = "e0";
eth_dev.priv = synopGMACadapter;
eth_dev.dev_addr[0] = mac_addr0[0];
eth_dev.dev_addr[1] = mac_addr0[1];
eth_dev.dev_addr[2] = mac_addr0[2];
eth_dev.dev_addr[3] = mac_addr0[3];
eth_dev.dev_addr[4] = mac_addr0[4];
eth_dev.dev_addr[5] = mac_addr0[5];
eth_dev.parent.parent.type = RT_Device_Class_NetIf;
eth_dev.parent.parent.init = eth_init;
eth_dev.parent.parent.open = eth_open;
eth_dev.parent.parent.close = eth_close;
eth_dev.parent.parent.read = eth_read;
eth_dev.parent.parent.write = eth_write;
eth_dev.parent.parent.control = eth_control;
eth_dev.parent.parent.user_data = RT_NULL;
eth_dev.parent.eth_tx = rt_eth_tx;
eth_dev.parent.eth_rx = rt_eth_rx;
eth_device_init(&(eth_dev.parent), "e0");
}
/*
* mac hw init is done here
*/
static int enet_hw_init(struct net_device *dev)
{
struct tangox_enet_priv *priv;
unsigned int val = 0;
if(phy_reset(dev))
return -EBUSY;
priv = netdev_priv(dev);
/* set pad_mode according to rgmii or not*/
val = enet_readb(priv->enet_mac_base + 0x400) & 0xf0;
if(priv->rgmii)
enet_writeb(priv->enet_mac_base + 0x400, val | 0x01);
/* software reset IP */
enet_writeb(priv->enet_mac_base + 0x424, 0);
udelay(10);
enet_writeb(priv->enet_mac_base + 0x424, 1);
/*set threshold for internal clock 0x1*/
enet_writeb(ENET_IC_THRESHOLD(priv->enet_mac_base), 1);
/*set Random seed 0x8*/
enet_writeb(ENET_RANDOM_SEED(priv->enet_mac_base), 0x08);
/*set TX single deferral params 0xc*/
enet_writeb(ENET_TX_SDP(priv->enet_mac_base), 0xc);
/*set slot time 0x7f for 10/100Mbps*/
enet_writeb(ENET_SLOT_TIME(priv->enet_mac_base), 0x7f);
/*set Threshold for partial full 0x7f */
enet_writeb(ENET_PF_THRESHOLD(priv->enet_mac_base), 0x7f);
/* configure TX DMA Channels */
val = enet_readl(ENET_TXC_CR(priv->enet_mac_base));
val |= TCR_RS | TCR_LE | TCR_TFI(1) |
/*TCR_DIE |*/ TCR_BTS(2);
val |= TCR_DM;
enet_writel(ENET_TXC_CR(priv->enet_mac_base), val);
val = enet_readl(ENET_TXC_CR(priv->enet_mac_base));
/* configure RX DMA Channels */
val = enet_readl(ENET_RXC_CR(priv->enet_mac_base));
val |= (RCR_RS | RCR_LE | RCR_RFI(1) |
RCR_BTS(2) | RCR_FI | RCR_DIE /* | RCR_EN*/);
val |= RCR_DM;
val |= RX_BUF_SIZE << 16;
enet_writel(ENET_RXC_CR(priv->enet_mac_base), val);
/* configure MAC ctrller */
val = enet_readb(ENET_TX_CTL1(priv->enet_mac_base));
val |= (TX_RETRY_EN | TX_PAD_EN | TX_APPEND_FCS);
enet_writeb(ENET_TX_CTL1(priv->enet_mac_base), (unsigned char)val);
/* set retry 5 time when collision occurs*/
enet_writeb(ENET_TX_CTL2(priv->enet_mac_base), 5);
val = enet_readb(ENET_RX_CTL(priv->enet_mac_base));
val |= (RX_RUNT | RX_PAD_STRIP | RX_SEND_CRC
| RX_PAUSE_EN| RX_AF_EN);
enet_writeb(ENET_RX_CTL(priv->enet_mac_base), (unsigned char)val);
#ifdef ENABLE_MULTICAST
/* clear internal multicast address table */
enet_writeb(ENET_MC_INIT(priv->enet_mac_base), 0x00);
while(enet_readb(ENET_MC_INIT(priv->enet_mac_base)));
DBG("Internal multicast address table is cleared\n");
#endif
/* unicast */
/* Threshold for internal clock*/
/* threshold for partial empty*/
/* threshold for partial full */
/* buffer size for transmit must be 1 from the doc
however, it's said that using 0xff ??*/
enet_writeb(ENET_TX_BUFSIZE(priv->enet_mac_base), 0xff);
/* fifo control */
/*MAC mode*/
enet_mac_config(dev);
/* check gmii mode support */
priv->mii.supports_gmii = mii_check_gmii_support(&priv->mii);
DBG("gmii support=0x%x id=0x%x\n", priv->mii.supports_gmii, priv->mii.phy_id);
return 0;
}
int rt_hw_eth_init(void)
{
u64 base_addr = Gmac_base;
struct synopGMACNetworkAdapter *synopGMACadapter;
static u8 mac_addr0[6] = DEFAULT_MAC_ADDRESS;
int index;
rt_sem_init(&sem_ack, "tx_ack", 1, RT_IPC_FLAG_FIFO);
rt_sem_init(&sem_lock, "eth_lock", 1, RT_IPC_FLAG_FIFO);
for (index = 21; index <= 30; index++)
{
pin_set_purpose(index, PIN_PURPOSE_OTHER);
pin_set_remap(index, PIN_REMAP_DEFAULT);
}
pin_set_purpose(35, PIN_PURPOSE_OTHER);
pin_set_remap(35, PIN_REMAP_DEFAULT);
*((volatile unsigned int *)0xbfd00424) &= ~(7 << 28);
*((volatile unsigned int *)0xbfd00424) |= (1 << 30); //wl rmii
memset(ð_dev, 0, sizeof(eth_dev));
synopGMACadapter = (struct synopGMACNetworkAdapter *)plat_alloc_memory(sizeof(struct synopGMACNetworkAdapter));
if (!synopGMACadapter)
{
rt_kprintf("Error in Memory Allocataion, Founction : %s \n", __FUNCTION__);
}
memset((char *)synopGMACadapter, 0, sizeof(struct synopGMACNetworkAdapter));
synopGMACadapter->synopGMACdev = NULL;
synopGMACadapter->synopGMACdev = (synopGMACdevice *) plat_alloc_memory(sizeof(synopGMACdevice));
if (!synopGMACadapter->synopGMACdev)
{
rt_kprintf("Error in Memory Allocataion, Founction : %s \n", __FUNCTION__);
}
memset((char *)synopGMACadapter->synopGMACdev, 0, sizeof(synopGMACdevice));
/*
* Attach the device to MAC struct This will configure all the required base addresses
* such as Mac base, configuration base, phy base address(out of 32 possible phys)
* */
synopGMAC_attach(synopGMACadapter->synopGMACdev, (regbase + MACBASE), regbase + DMABASE, DEFAULT_PHY_BASE, mac_addr0);
init_phy(synopGMACadapter->synopGMACdev);
synopGMAC_reset(synopGMACadapter->synopGMACdev);
/* MII setup */
synopGMACadapter->mii.phy_id_mask = 0x1F;
synopGMACadapter->mii.reg_num_mask = 0x1F;
synopGMACadapter->mii.dev = synopGMACadapter;
synopGMACadapter->mii.mdio_read = mdio_read;
synopGMACadapter->mii.mdio_write = mdio_write;
synopGMACadapter->mii.phy_id = synopGMACadapter->synopGMACdev->PhyBase;
synopGMACadapter->mii.supports_gmii = mii_check_gmii_support(&synopGMACadapter->mii);
eth_dev.iobase = base_addr;
eth_dev.name = "e0";
eth_dev.priv = synopGMACadapter;
eth_dev.dev_addr[0] = mac_addr0[0];
eth_dev.dev_addr[1] = mac_addr0[1];
eth_dev.dev_addr[2] = mac_addr0[2];
eth_dev.dev_addr[3] = mac_addr0[3];
eth_dev.dev_addr[4] = mac_addr0[4];
eth_dev.dev_addr[5] = mac_addr0[5];
eth_dev.parent.parent.type = RT_Device_Class_NetIf;
eth_dev.parent.parent.init = eth_init;
eth_dev.parent.parent.open = eth_open;
eth_dev.parent.parent.close = eth_close;
eth_dev.parent.parent.read = eth_read;
eth_dev.parent.parent.write = eth_write;
eth_dev.parent.parent.control = eth_control;
eth_dev.parent.parent.user_data = RT_NULL;
eth_dev.parent.eth_tx = rt_eth_tx;
eth_dev.parent.eth_rx = rt_eth_rx;
eth_device_init(&(eth_dev.parent), "e0");
eth_device_linkchange(ð_dev.parent, RT_TRUE); //linkup the e0 for lwip to check
return 0;
}
