void mdp3_dsi_cmd_dma_busy_wait(struct msm_fb_data_type *mfd)
{
unsigned long flag;
int need_wait = 0;
#ifdef DSI_CLK_CTRL
mod_timer(&dsi_clock_timer, jiffies + HZ); /* one second */
#endif
spin_lock_irqsave(&mdp_spin_lock, flag);
#ifdef DSI_CLK_CTRL
spin_lock_bh(&dsi_clk_lock);
if (mipi_dsi_clk_on == 0)
mipi_dsi_turn_on_clks();
spin_unlock_bh(&dsi_clk_lock);
#endif
if (mfd->dma->busy == TRUE) {
if (busy_wait_cnt == 0)
INIT_COMPLETION(mfd->dma->comp);
busy_wait_cnt++;
need_wait++;
}
spin_unlock_irqrestore(&mdp_spin_lock, flag);
if (need_wait) {
/* wait until DMA finishes the current job */
wait_for_completion(&mfd->dma->comp);
}
}
/*
* mdp4_dsi_cmd_dma_busy_wait: check dsi link activity
* dsi link is a shared resource and it can only be used
* while it is in idle state.
* ov_mutex need to be acquired before call this function.
*/
void mdp4_dsi_cmd_dma_busy_wait(struct msm_fb_data_type *mfd)
{
unsigned long flag;
int need_wait = 0;
if (dsi_clock_timer.function) {
if (time_after(jiffies, tout_expired)) {
tout_expired = jiffies + TOUT_PERIOD;
mod_timer(&dsi_clock_timer, tout_expired);
tout_expired -= MS_100;
}
}
pr_debug("%s: start pid=%d dsi_clk_on=%d\n",
__func__, current->pid, mipi_dsi_clk_on);
/* satrt dsi clock if necessary */
//QCT patch+++
spin_lock_bh(&dsi_clk_lock);
if (mipi_dsi_clk_on == 0)
mipi_dsi_turn_on_clks();
spin_unlock_bh(&dsi_clk_lock);
//QCT patch---
spin_lock_irqsave(&mdp_spin_lock, flag);
if (mfd->dma->busy == TRUE) {
if (busy_wait_cnt == 0)
INIT_COMPLETION(mfd->dma->comp);
busy_wait_cnt++;
need_wait++;
}
spin_unlock_irqrestore(&mdp_spin_lock, flag);
if (need_wait) {
/* wait until DMA finishes the current job */
pr_debug("%s: pending pid=%d dsi_clk_on=%d\n",
__func__, current->pid, mipi_dsi_clk_on);
wait_for_completion(&mfd->dma->comp);
}
pr_debug("%s: done pid=%d dsi_clk_on=%d\n",
__func__, current->pid, mipi_dsi_clk_on);
}
/*
* mdp4_dsi_cmd_dma_busy_wait: check dsi link activity
* dsi link is a shared resource and it can only be used
* while it is in idle state.
* ov_mutex need to be acquired before call this function.
*/
void mdp4_dsi_cmd_dma_busy_wait(struct msm_fb_data_type *mfd)
{
if (dsi_clock_timer.function) {
if (time_after(jiffies, tout_expired)) {
tout_expired = jiffies + TOUT_PERIOD;
mod_timer(&dsi_clock_timer, tout_expired);
tout_expired -= MS_100;
}
}
pr_debug("%s: start pid=%d dsi_clk_on=%d\n",
__func__, current->pid, mipi_dsi_clk_on);
/* satrt dsi clock if necessary */
spin_lock_bh(&dsi_clk_lock);
if (mipi_dsi_clk_on == 0)
mipi_dsi_turn_on_clks();
spin_unlock_bh(&dsi_clk_lock);
if (dsi_pipe && dsi_pipe->ov_blt_addr)
mdp4_dsi_overlay_busy_wait(mfd);
mdp4_dsi_dmap_busy_wait(mfd);
}
/*
* mdp4_dsi_cmd_dma_busy_wait: check dsi link activity
* dsi link is a shared resource and it can only be used
* while it is in idle state.
* ov_mutex need to be acquired before call this function.
*/
void mdp4_dsi_cmd_dma_busy_wait(struct msm_fb_data_type *mfd)
{
unsigned long flag;
int need_wait = 0;
#if 1 /* HTC_CSP_START */
int retry_count = 0;
long timeout;
#endif /* HTC_CSP_END */
if (dsi_clock_timer.function) {
if (time_after(jiffies, tout_expired)) {
tout_expired = jiffies + TOUT_PERIOD;
mod_timer(&dsi_clock_timer, tout_expired);
tout_expired -= MS_100;
}
}
pr_debug("%s: start pid=%d dsi_clk_on=%d\n",
__func__, current->pid, mipi_dsi_clk_on);
/* satrt dsi clock if necessary */
if (mipi_dsi_clk_on == 0) {
local_bh_disable();
mipi_dsi_turn_on_clks();
local_bh_enable();
}
spin_lock_irqsave(&mdp_spin_lock, flag);
if (mfd->dma->busy == TRUE) {
if (busy_wait_cnt == 0)
INIT_COMPLETION(mfd->dma->comp);
busy_wait_cnt++;
need_wait++;
}
spin_unlock_irqrestore(&mdp_spin_lock, flag);
if (need_wait) {
/* wait until DMA finishes the current job */
pr_debug("%s: pending pid=%d dsi_clk_on=%d\n",
__func__, current->pid, mipi_dsi_clk_on);
#if 1 /* HTC_CSP_START */
timeout = wait_for_completion_timeout(&mfd->dma->comp, HZ/5);
while (!timeout && retry_count++ < 15) {
rmb();
if (mfd->dma->busy == FALSE) {
PR_DISP_INFO("%s(%d)timeout but dma not busy now, cnt:%d\n", __func__, __LINE__, busy_wait_cnt);
break;
} else {
PR_DISP_INFO("%s(%d)timeout but dma still busy\n", __func__, __LINE__);
PR_DISP_INFO("###busy_wait_cnt:%d need_wait:%d pending pid=%d dsi_clk_on=%d\n", busy_wait_cnt, need_wait, current->pid, mipi_dsi_clk_on);
PR_DISP_INFO("MDP_DISPLAY_STATUS:%x\n", inpdw(msm_mdp_base + 0x18));
PR_DISP_INFO("MDP_INTR_STATUS:%x\n", inpdw(MDP_INTR_STATUS));
PR_DISP_INFO("MDP_INTR_ENABLE:%x\n", inpdw(MDP_INTR_ENABLE));
PR_DISP_INFO("MDP_PRIM_INT_CNT_VAL:%x\n", inpdw(msm_mdp_base + 0x0140));
PR_DISP_INFO("MDP_LAYERMIXER_IN_CFG:%x\n", inpdw(msm_mdp_base + 0x10100));
PR_DISP_INFO("MDP_OVERLAY_STATUS:%x\n", inpdw(msm_mdp_base + 0x10000));
PR_DISP_INFO("MDP_OVERLAYPROC0_CFG:%x\n", inpdw(msm_mdp_base + 0x10004));
PR_DISP_INFO("MDP_OVERLAYPROC1_CFG:%x\n", inpdw(msm_mdp_base + 0x18004));
PR_DISP_INFO("RGB1(1):%x %x %x %x\n", inpdw(msm_mdp_base + 0x40000), inpdw(msm_mdp_base + 0x40004), inpdw(msm_mdp_base + 0x40008), inpdw(msm_mdp_base + 0x4000C));
PR_DISP_INFO("RGB1(2):%x %x %x %x\n", inpdw(msm_mdp_base + 0x40010), inpdw(msm_mdp_base + 0x40014), inpdw(msm_mdp_base + 0x40018), inpdw(msm_mdp_base + 0x40040));
PR_DISP_INFO("RGB1(3):%x %x %x %x\n", inpdw(msm_mdp_base + 0x40050), inpdw(msm_mdp_base + 0x40054), inpdw(msm_mdp_base + 0x40058), inpdw(msm_mdp_base + 0x4005C));
PR_DISP_INFO("RGB1(4):%x %x %x %x\n", inpdw(msm_mdp_base + 0x40060), inpdw(msm_mdp_base + 0x41000), inpdw(msm_mdp_base + 0x41004), inpdw(msm_mdp_base + 0x41008));
PR_DISP_INFO("RGB2(1):%x %x %x %x\n", inpdw(msm_mdp_base + 0x50000), inpdw(msm_mdp_base + 0x50004), inpdw(msm_mdp_base + 0x50008), inpdw(msm_mdp_base + 0x5000C));
PR_DISP_INFO("RGB2(2):%x %x %x %x\n", inpdw(msm_mdp_base + 0x50010), inpdw(msm_mdp_base + 0x50014), inpdw(msm_mdp_base + 0x50018), inpdw(msm_mdp_base + 0x50040));
PR_DISP_INFO("RGB2(3):%x %x %x %x\n", inpdw(msm_mdp_base + 0x50050), inpdw(msm_mdp_base + 0x50054), inpdw(msm_mdp_base + 0x50058), inpdw(msm_mdp_base + 0x5005C));
PR_DISP_INFO("RGB2(4):%x %x %x %x\n", inpdw(msm_mdp_base + 0x50060), inpdw(msm_mdp_base + 0x51000), inpdw(msm_mdp_base + 0x51004), inpdw(msm_mdp_base + 0x51008));
PR_DISP_INFO("VG1 (1):%x %x %x %x\n", inpdw(msm_mdp_base + 0x20000), inpdw(msm_mdp_base + 0x20004), inpdw(msm_mdp_base + 0x20008), inpdw(msm_mdp_base + 0x2000C));
PR_DISP_INFO("VG1 (2):%x %x %x %x\n", inpdw(msm_mdp_base + 0x20010), inpdw(msm_mdp_base + 0x20014), inpdw(msm_mdp_base + 0x20018), inpdw(msm_mdp_base + 0x20040));
PR_DISP_INFO("VG1 (3):%x %x %x %x\n", inpdw(msm_mdp_base + 0x20050), inpdw(msm_mdp_base + 0x20054), inpdw(msm_mdp_base + 0x20058), inpdw(msm_mdp_base + 0x2005C));
PR_DISP_INFO("VG1 (4):%x %x %x %x\n", inpdw(msm_mdp_base + 0x20060), inpdw(msm_mdp_base + 0x21000), inpdw(msm_mdp_base + 0x21004), inpdw(msm_mdp_base + 0x21008));
PR_DISP_INFO("VG2 (1):%x %x %x %x\n", inpdw(msm_mdp_base + 0x30000), inpdw(msm_mdp_base + 0x30004), inpdw(msm_mdp_base + 0x30008), inpdw(msm_mdp_base + 0x3000C));
PR_DISP_INFO("VG2 (2):%x %x %x %x\n", inpdw(msm_mdp_base + 0x30010), inpdw(msm_mdp_base + 0x30014), inpdw(msm_mdp_base + 0x30018), inpdw(msm_mdp_base + 0x30040));
PR_DISP_INFO("VG2 (3):%x %x %x %x\n", inpdw(msm_mdp_base + 0x30050), inpdw(msm_mdp_base + 0x30054), inpdw(msm_mdp_base + 0x30058), inpdw(msm_mdp_base + 0x3005C));
PR_DISP_INFO("VG2 (4):%x %x %x %x\n", inpdw(msm_mdp_base + 0x30060), inpdw(msm_mdp_base + 0x31000), inpdw(msm_mdp_base + 0x31004), inpdw(msm_mdp_base + 0x31008));
timeout = wait_for_completion_timeout(&mfd->dma->comp, HZ/5);
}
}
if (retry_count >= 15) {
PR_DISP_INFO("###mdp busy wait retry timed out, mfd->dma->busy:%d busy_wait_cnt:%d\n", mfd->dma->busy, busy_wait_cnt);
spin_lock_irqsave(&mdp_spin_lock, flag);
if(busy_wait_cnt > 0)
--busy_wait_cnt;
mfd->dma->busy = FALSE;
spin_unlock_irqrestore(&mdp_spin_lock, flag);
}
#else /* HTC_CSP_END */
wait_for_completion(&mfd->dma->comp);
#endif
}
pr_debug("%s: done pid=%d dsi_clk_on=%d\n",
__func__, current->pid, mipi_dsi_clk_on);
}
static void mipi_oscar_set_backlight(struct msm_fb_data_type *mfd)
{
if(!mfd)
return;
if(mfd->key != MFD_KEY)
return;
if(mfd->panel_power_on == FALSE)
return;
mutex_lock(&mfd->dma->ov_mutex);
if (mdp4_overlay_dsi_state_get() <= ST_DSI_SUSPEND) {
mipi_dsi_turn_on_clks();
mdp4_overlay_dsi_state_set(ST_DSI_PLAYING);
}
mdp4_dsi_cmd_dma_busy_wait(mfd);
mdp4_dsi_blt_dmap_busy_wait(mfd);
mipi_dsi_mdp_busy_wait(mfd);
if(backlight_cnt == true)
{
mipi_set_tx_power_mode(0);
mipi_dsi_cmds_tx(mfd, &oscar_tx_buf, oscar_sleep_out,
ARRAY_SIZE(oscar_sleep_out));
mipi_set_tx_power_mode(1);
backlight_cnt = false;
}
mipi_set_tx_power_mode(0);
switch(mfd->bl_level){
case 13 :
#ifdef CONFIG_F_SKYDISP_SMART_DIMMING
if(chnnel_mtp)
mipi_dsi_cmds_tx(mfd, &oscar_tx_buf, Smart_oscar_backlight_190_cmds,ARRAY_SIZE(Smart_oscar_backlight_190_cmds));
else
#endif
mipi_dsi_cmds_tx(mfd, &oscar_tx_buf, oscar_backlight_190_cmds,ARRAY_SIZE(oscar_backlight_190_cmds));
break;
case 12 :
#ifdef CONFIG_F_SKYDISP_SMART_DIMMING
if(chnnel_mtp)
mipi_dsi_cmds_tx(mfd, &oscar_tx_buf, Smart_oscar_backlight_180_cmds,ARRAY_SIZE(Smart_oscar_backlight_180_cmds));
else
#endif
mipi_dsi_cmds_tx(mfd, &oscar_tx_buf, oscar_backlight_180_cmds,ARRAY_SIZE(oscar_backlight_180_cmds));
break;
case 11 :
#ifdef CONFIG_F_SKYDISP_SMART_DIMMING
if(chnnel_mtp)
mipi_dsi_cmds_tx(mfd, &oscar_tx_buf, Smart_oscar_backlight_170_cmds,ARRAY_SIZE(Smart_oscar_backlight_170_cmds));
else
#endif
mipi_dsi_cmds_tx(mfd, &oscar_tx_buf, oscar_backlight_170_cmds,ARRAY_SIZE(oscar_backlight_170_cmds));
break;
case 10 :
#ifdef CONFIG_F_SKYDISP_SMART_DIMMING
if(chnnel_mtp)
mipi_dsi_cmds_tx(mfd, &oscar_tx_buf, Smart_oscar_backlight_160_cmds,ARRAY_SIZE(Smart_oscar_backlight_160_cmds));
else
#endif
mipi_dsi_cmds_tx(mfd, &oscar_tx_buf, oscar_backlight_160_cmds,ARRAY_SIZE(oscar_backlight_160_cmds));
break;
case 9 :
#ifdef CONFIG_F_SKYDISP_SMART_DIMMING
if(chnnel_mtp)
mipi_dsi_cmds_tx(mfd, &oscar_tx_buf, Smart_oscar_backlight_150_cmds,ARRAY_SIZE(Smart_oscar_backlight_150_cmds));
else
#endif
mipi_dsi_cmds_tx(mfd, &oscar_tx_buf, oscar_backlight_150_cmds,ARRAY_SIZE(oscar_backlight_150_cmds));
break;
case 8 :
#ifdef CONFIG_F_SKYDISP_SMART_DIMMING
if(chnnel_mtp)
mipi_dsi_cmds_tx(mfd, &oscar_tx_buf, Smart_oscar_backlight_140_cmds,ARRAY_SIZE(Smart_oscar_backlight_140_cmds));
else
#endif
mipi_dsi_cmds_tx(mfd, &oscar_tx_buf, oscar_backlight_140_cmds,ARRAY_SIZE(oscar_backlight_140_cmds));
break;
case 7 :
#ifdef CONFIG_F_SKYDISP_SMART_DIMMING
if(chnnel_mtp)
mipi_dsi_cmds_tx(mfd, &oscar_tx_buf, Smart_oscar_backlight_130_cmds,ARRAY_SIZE(Smart_oscar_backlight_130_cmds));
else
#endif
mipi_dsi_cmds_tx(mfd, &oscar_tx_buf, oscar_backlight_130_cmds,ARRAY_SIZE(oscar_backlight_130_cmds));
break;
case 6 :
#ifdef CONFIG_F_SKYDISP_SMART_DIMMING
if(chnnel_mtp)
mipi_dsi_cmds_tx(mfd, &oscar_tx_buf, Smart_oscar_backlight_120_cmds,ARRAY_SIZE(Smart_oscar_backlight_120_cmds));
else
#endif
mipi_dsi_cmds_tx(mfd, &oscar_tx_buf, oscar_backlight_120_cmds,ARRAY_SIZE(oscar_backlight_120_cmds));
break;
case 5 :
#ifdef CONFIG_F_SKYDISP_SMART_DIMMING
if(chnnel_mtp)
mipi_dsi_cmds_tx(mfd, &oscar_tx_buf, Smart_oscar_backlight_110_cmds,ARRAY_SIZE(Smart_oscar_backlight_110_cmds));
else
#endif
mipi_dsi_cmds_tx(mfd, &oscar_tx_buf, oscar_backlight_110_cmds,ARRAY_SIZE(oscar_backlight_110_cmds));
break;
case 4 :
#ifdef CONFIG_F_SKYDISP_SMART_DIMMING
if(chnnel_mtp)
mipi_dsi_cmds_tx(mfd, &oscar_tx_buf, Smart_oscar_backlight_100_cmds,ARRAY_SIZE(Smart_oscar_backlight_100_cmds));
else
#endif
mipi_dsi_cmds_tx(mfd, &oscar_tx_buf, oscar_backlight_100_cmds,ARRAY_SIZE(oscar_backlight_100_cmds));
break;
case 3 :
#ifdef CONFIG_F_SKYDISP_SMART_DIMMING
if(chnnel_mtp)
mipi_dsi_cmds_tx(mfd, &oscar_tx_buf, Smart_oscar_backlight_90_cmds,ARRAY_SIZE(Smart_oscar_backlight_90_cmds));
else
#endif
mipi_dsi_cmds_tx(mfd, &oscar_tx_buf, oscar_backlight_90_cmds,ARRAY_SIZE(oscar_backlight_90_cmds));
break;
case 2 :
#ifdef CONFIG_F_SKYDISP_SMART_DIMMING
if(chnnel_mtp)
mipi_dsi_cmds_tx(mfd, &oscar_tx_buf, Smart_oscar_backlight_80_cmds,ARRAY_SIZE(Smart_oscar_backlight_80_cmds));
else
#endif
mipi_dsi_cmds_tx(mfd, &oscar_tx_buf, oscar_backlight_80_cmds,ARRAY_SIZE(oscar_backlight_80_cmds));
break;
case 1 :
#ifdef CONFIG_F_SKYDISP_SMART_DIMMING
if(chnnel_mtp)
mipi_dsi_cmds_tx(mfd, &oscar_tx_buf, Smart_oscar_backlight_70_cmds,ARRAY_SIZE(Smart_oscar_backlight_70_cmds));
else
#endif
mipi_dsi_cmds_tx(mfd, &oscar_tx_buf, oscar_backlight_70_cmds,ARRAY_SIZE(oscar_backlight_70_cmds));
break;
case 0 :
#ifdef CONFIG_F_SKYDISP_SMART_DIMMING
if(chnnel_mtp)
mipi_dsi_cmds_tx(mfd, &oscar_tx_buf, Smart_oscar_backlight_70_cmds,ARRAY_SIZE(Smart_oscar_backlight_70_cmds));
else
#endif
mipi_dsi_cmds_tx(mfd, &oscar_tx_buf, oscar_backlight_70_cmds,ARRAY_SIZE(oscar_backlight_70_cmds));
if(backlight_control == true)
backlight_cnt = true;
break;
}
mipi_set_tx_power_mode(1);
mutex_unlock(&mfd->dma->ov_mutex);
if(mfd->bl_level > 0)
oscar_state.backlightoff = true;
else
oscar_state.backlightoff = false;
printk(KERN_WARNING"[%s] = %d, backlight_cnt = %d\n",__func__,mfd->bl_level,backlight_cnt);
}
static void mdp_dma2_update_lcd(struct msm_fb_data_type *mfd)
{
MDPIBUF *iBuf = &mfd->ibuf;
#if !defined(CONFIG_FB_MSM_MIPI_ORISE_CMD_FWVGA_PT)\
|| !defined(CONFIG_FB_MSM_DEFAULT_DEPTH_RGBA8888)
int mddi_dest = FALSE;
int cmd_mode = FALSE;
#endif
uint32 outBpp = iBuf->bpp;
uint32 dma2_cfg_reg;
uint8 *src;
#if !defined(CONFIG_FB_MSM_MIPI_ORISE_CMD_FWVGA_PT)\
|| !defined(CONFIG_FB_MSM_DEFAULT_DEPTH_RGBA8888)
uint32 mddi_ld_param;
uint16 mddi_vdo_packet_reg;
#endif
#ifndef CONFIG_FB_MSM_MDP303
struct msm_fb_panel_data *pdata =
(struct msm_fb_panel_data *)mfd->pdev->dev.platform_data;
#endif
uint32 ystride = mfd->fbi->fix.line_length;
#if !defined(CONFIG_FB_MSM_MIPI_ORISE_CMD_FWVGA_PT)\
|| !defined(CONFIG_FB_MSM_DEFAULT_DEPTH_RGBA8888)
uint32 mddi_pkt_desc;
#endif
dma2_cfg_reg = DMA_PACK_ALIGN_LSB |
DMA_OUT_SEL_AHB | DMA_IBUF_NONCONTIGUOUS;
#ifdef CONFIG_FB_MSM_MDP22
dma2_cfg_reg |= DMA_PACK_TIGHT;
#endif
#ifdef CONFIG_FB_MSM_MDP30
/*
* Software workaround: On 7x25/7x27, the MDP will not
* respond if dma_w is 1 pixel. Set the update width to
* 2 pixels and adjust the x offset if needed.
*/
if (iBuf->dma_w == 1) {
iBuf->dma_w = 2;
if (iBuf->dma_x == (iBuf->ibuf_width - 2))
iBuf->dma_x--;
}
#endif
#if !defined(CONFIG_FB_MSM_MIPI_ORISE_CMD_FWVGA_PT)\
|| !defined(CONFIG_FB_MSM_DEFAULT_DEPTH_RGBA8888)
if (mfd->fb_imgType == MDP_BGR_565)
dma2_cfg_reg |= DMA_PACK_PATTERN_BGR;
else if (mfd->fb_imgType == MDP_RGBA_8888)
dma2_cfg_reg |= DMA_PACK_PATTERN_BGR;
else
dma2_cfg_reg |= DMA_PACK_PATTERN_RGB;
if (outBpp == 4) {
dma2_cfg_reg |= DMA_IBUF_C3ALPHA_EN;
dma2_cfg_reg |= DMA_IBUF_FORMAT_xRGB8888_OR_ARGB8888;
}
if (outBpp == 2)
dma2_cfg_reg |= DMA_IBUF_FORMAT_RGB565;
mddi_ld_param = 0;
mddi_vdo_packet_reg = mfd->panel_info.mddi.vdopkt;
if ((mfd->panel_info.type == MDDI_PANEL) ||
(mfd->panel_info.type == EXT_MDDI_PANEL)) {
dma2_cfg_reg |= DMA_OUT_SEL_MDDI;
mddi_dest = TRUE;
if (mfd->panel_info.type == MDDI_PANEL) {
mdp_total_vdopkts++;
if (mfd->panel_info.pdest == DISPLAY_1) {
dma2_cfg_reg |= DMA_MDDI_DMAOUT_LCD_SEL_PRIMARY;
mddi_ld_param = 0;
#ifdef MDDI_HOST_WINDOW_WORKAROUND
mddi_window_adjust(mfd, iBuf->dma_x,
iBuf->dma_w - 1, iBuf->dma_y,
iBuf->dma_h - 1);
#endif
} else {
dma2_cfg_reg |=
DMA_MDDI_DMAOUT_LCD_SEL_SECONDARY;
mddi_ld_param = 1;
#ifdef MDDI_HOST_WINDOW_WORKAROUND
mddi_window_adjust(mfd, iBuf->dma_x,
iBuf->dma_w - 1, iBuf->dma_y,
iBuf->dma_h - 1);
#endif
}
} else {
dma2_cfg_reg |= DMA_MDDI_DMAOUT_LCD_SEL_EXTERNAL;
mddi_ld_param = 2;
}
#ifdef CONFIG_FB_MSM_MDP303
} else if (mfd->panel_info.type == MIPI_CMD_PANEL) {
cmd_mode = TRUE;
dma2_cfg_reg |= DMA_OUT_SEL_DSI_CMD;
#endif
} else {
if (mfd->panel_info.pdest == DISPLAY_1) {
dma2_cfg_reg |= DMA_AHBM_LCD_SEL_PRIMARY;
outp32(MDP_EBI2_LCD0, mfd->data_port_phys);
} else {
dma2_cfg_reg |= DMA_AHBM_LCD_SEL_SECONDARY;
outp32(MDP_EBI2_LCD1, mfd->data_port_phys);
}
}
#else
dma2_cfg_reg |= DMA_PACK_PATTERN_BGR;
dma2_cfg_reg |= DMA_IBUF_C3ALPHA_EN;
dma2_cfg_reg |= DMA_IBUF_FORMAT_xRGB8888_OR_ARGB8888;
dma2_cfg_reg |= DMA_OUT_SEL_DSI_CMD;
#endif
src = (uint8 *) iBuf->buf;
/* starting input address */
src += iBuf->dma_x * outBpp + iBuf->dma_y * ystride;
mdp_curr_dma2_update_width = iBuf->dma_w;
mdp_curr_dma2_update_height = iBuf->dma_h;
/* MDP cmd block enable */
mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_ON, FALSE);
#ifdef CONFIG_FB_MSM_MDP22
MDP_OUTP(MDP_CMD_DEBUG_ACCESS_BASE + 0x0184,
(iBuf->dma_h << 16 | iBuf->dma_w));
MDP_OUTP(MDP_CMD_DEBUG_ACCESS_BASE + 0x0188, src);
MDP_OUTP(MDP_CMD_DEBUG_ACCESS_BASE + 0x018C, ystride);
#else
#if !defined(CONFIG_FB_MSM_MIPI_ORISE_CMD_FWVGA_PT)
if (cmd_mode)
MDP_OUTP(MDP_BASE + 0x90004,
(mfd->panel_info.yres << 16 | mfd->panel_info.xres));
else
MDP_OUTP(MDP_BASE + 0x90004, (iBuf->dma_h << 16 | iBuf->dma_w));
#else
MDP_OUTP(MDP_BASE + 0x90004,
(mfd->panel_info.yres << 16 | mfd->panel_info.xres));
#endif
MDP_OUTP(MDP_BASE + 0x90008, src);
MDP_OUTP(MDP_BASE + 0x9000c, ystride);
#endif
#if !defined(CONFIG_FB_MSM_MIPI_ORISE_CMD_FWVGA_PT)\
|| !defined(CONFIG_FB_MSM_DEFAULT_DEPTH_RGBA8888)
if (mfd->panel_info.bpp == 18) {
mddi_pkt_desc = MDDI_VDO_PACKET_DESC;
dma2_cfg_reg |= DMA_DSTC0G_6BITS | /* 666 18BPP */
DMA_DSTC1B_6BITS | DMA_DSTC2R_6BITS;
} else if (mfd->panel_info.bpp == 24) {
mddi_pkt_desc = MDDI_VDO_PACKET_DESC_24;
dma2_cfg_reg |= DMA_DSTC0G_8BITS | /* 888 24BPP */
DMA_DSTC1B_8BITS | DMA_DSTC2R_8BITS;
} else {
mddi_pkt_desc = MDDI_VDO_PACKET_DESC_16;
dma2_cfg_reg |= DMA_DSTC0G_6BITS | /* 565 16BPP */
DMA_DSTC1B_5BITS | DMA_DSTC2R_5BITS;
}
#else
dma2_cfg_reg |= DMA_DSTC0G_8BITS | /* 888 24BPP */
DMA_DSTC1B_8BITS | DMA_DSTC2R_8BITS;
#endif
#ifndef CONFIG_FB_MSM_MDP303
if (mddi_dest) {
#ifdef CONFIG_FB_MSM_MDP22
MDP_OUTP(MDP_CMD_DEBUG_ACCESS_BASE + 0x0194,
(iBuf->dma_y << 16) | iBuf->dma_x);
MDP_OUTP(MDP_CMD_DEBUG_ACCESS_BASE + 0x01a0, mddi_ld_param);
MDP_OUTP(MDP_CMD_DEBUG_ACCESS_BASE + 0x01a4,
(mddi_pkt_desc << 16) | mddi_vdo_packet_reg);
#else
MDP_OUTP(MDP_BASE + 0x90010, (iBuf->dma_y << 16) | iBuf->dma_x);
MDP_OUTP(MDP_BASE + 0x00090, mddi_ld_param);
MDP_OUTP(MDP_BASE + 0x00094,
(mddi_pkt_desc << 16) | mddi_vdo_packet_reg);
#endif
} else {
/* setting EBI2 LCDC write window */
pdata->set_rect(iBuf->dma_x, iBuf->dma_y, iBuf->dma_w,
iBuf->dma_h);
}
#else
#if !defined(CONFIG_FB_MSM_MIPI_ORISE_CMD_FWVGA_PT)
if (mfd->panel_info.type == MIPI_CMD_PANEL) {
#else
{
/* dma_p = 0, dma_s = 1 */
MDP_OUTP(MDP_BASE + 0xF1000, 0x10);
/* enable dsi trigger on dma_p */
MDP_OUTP(MDP_BASE + 0xF1004, 0x01);
#endif
}
#endif
/* dma2 config register */
#ifdef MDP_HW_VSYNC
MDP_OUTP(MDP_BASE + 0x90000, dma2_cfg_reg);
if ((mfd->use_mdp_vsync) &&
(mfd->ibuf.vsync_enable) && (mfd->panel_info.lcd.vsync_enable)) {
uint32 start_y;
if (vsync_start_y_adjust <= iBuf->dma_y)
start_y = iBuf->dma_y - vsync_start_y_adjust;
else
start_y =
(mfd->total_lcd_lines - 1) - (vsync_start_y_adjust -
iBuf->dma_y);
/*
* MDP VSYNC clock must be On by now so, we don't have to
* re-enable it
*/
MDP_OUTP(MDP_BASE + 0x210, start_y);
MDP_OUTP(MDP_BASE + 0x20c, 1); /* enable prim vsync */
} else {
MDP_OUTP(MDP_BASE + 0x20c, 0); /* disable prim vsync */
}
#else
#ifdef CONFIG_FB_MSM_MDP22
MDP_OUTP(MDP_CMD_DEBUG_ACCESS_BASE + 0x0180, dma2_cfg_reg);
#else
MDP_OUTP(MDP_BASE + 0x90000, dma2_cfg_reg);
#endif
#endif /* MDP_HW_VSYNC */
/* MDP cmd block disable */
mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_OFF, FALSE);
}
static ktime_t vt = { 0 };
int mdp_usec_diff_threshold = 100;
int mdp_expected_usec_wait;
enum hrtimer_restart mdp_dma2_vsync_hrtimer_handler(struct hrtimer *ht)
{
struct msm_fb_data_type *mfd = NULL;
mfd = container_of(ht, struct msm_fb_data_type, dma_hrtimer);
mdp_pipe_kickoff(MDP_DMA2_TERM, mfd);
if (msm_fb_debug_enabled) {
ktime_t t;
int usec_diff;
int actual_wait;
t = ktime_get_real();
actual_wait = ktime_to_us(ktime_sub(t, vt));
usec_diff = actual_wait - mdp_expected_usec_wait;
if ((mdp_usec_diff_threshold < usec_diff) || (usec_diff < 0))
MSM_FB_DEBUG
("HRT Diff = %d usec Exp=%d usec Act=%d usec\n",
usec_diff, mdp_expected_usec_wait, actual_wait);
}
return HRTIMER_NORESTART;
}
#ifdef CONFIG_FB_MSM_MDP303
static int busy_wait_cnt;
void mdp3_dsi_cmd_dma_busy_wait(struct msm_fb_data_type *mfd)
{
unsigned long flag;
int need_wait = 0;
#ifdef DSI_CLK_CTRL
mod_timer(&dsi_clock_timer, jiffies + HZ); /* one second */
#endif
spin_lock_irqsave(&mdp_spin_lock, flag);
#ifdef DSI_CLK_CTRL
spin_lock_bh(&dsi_clk_lock);
if (mipi_dsi_clk_on == 0)
mipi_dsi_turn_on_clks();
spin_unlock_bh(&dsi_clk_lock);
#endif
if (mfd->dma->busy == TRUE) {
if (busy_wait_cnt == 0)
INIT_COMPLETION(mfd->dma->comp);
busy_wait_cnt++;
need_wait++;
}
spin_unlock_irqrestore(&mdp_spin_lock, flag);
if (need_wait) {
/* wait until DMA finishes the current job */
/* FIH-SW-MM-VH-DISPLAY-JB01*[ */
if (!wait_for_completion_timeout(&mfd->dma->comp, 1*HZ)) {
printk(KERN_ALERT "[DISPLAY] %s: Wait DMA finish timeout!\n", __func__);
mfd->dma->busy= FALSE;
mdp_pipe_ctrl(MDP_DMA2_BLOCK, MDP_BLOCK_POWER_OFF, TRUE);
complete(&mfd->dma->comp);
}
/* FIH-SW-MM-VH-DISPLAY-JB01*] */
}
}
void mdp4_dsi_cmd_dma_busy_wait(struct msm_fb_data_type *mfd)
{
unsigned long flag;
int need_wait = 0;
int wait_cnt = 0;
#ifdef MDP_HANG_DEBUG
mipi_dsi_cmd_mode_on = 1;
#endif
if (dsi_clock_timer.function) {
#ifndef MDP_HANG_DEBUG
if (time_after(jiffies, tout_expired)) {
#endif
tout_expired = jiffies + TOUT_PERIOD;
mod_timer(&dsi_clock_timer, tout_expired);
#ifndef MDP_HANG_DEBUG
tout_expired -= MS_100;
}
#endif
}
pr_debug("%s: start pid=%d dsi_clk_on=%d\n",
__func__, current->pid, mipi_dsi_clk_on);
/* satrt dsi clock if necessary */
spin_lock_bh(&dsi_clk_lock);
if (mipi_dsi_clk_on == 0) {
mipi_dsi_turn_on_clks();
}
spin_unlock_bh(&dsi_clk_lock);
/*
*QCT_PATCH-sbyun to avoid confilt
*between on going video image and new overlay image,
*add some delay when mdp of dma is in busy status
*/
spin_lock_irqsave(&mdp_spin_lock, flag);
if (mfd->dma->busy == TRUE) {
if (busy_wait_cnt == 0)
INIT_COMPLETION(mfd->dma->comp);
busy_wait_cnt++;
need_wait++;
#if defined(DEBUG_MDP_LOCKUP)
mdp4_stat.dma_wait_start_time = jiffies;
#endif
}
spin_unlock_irqrestore(&mdp_spin_lock, flag);
if (need_wait) {
/* wait until DMA finishes the current job */
pr_debug("%s: pending pid=%d dsi_clk_on=%d\n",
__func__, current->pid, mipi_dsi_clk_on);
#ifdef MDP_HANG_DEBUG
if (!wait_for_completion_timeout(&mfd->dma->comp,
msecs_to_jiffies(VSYNC_PERIOD*30))) {
/* Does not receive interrupt from MDP,
Something wrong */
dump_mdp_registers();
panic("mdp interrupt missing");
}
#else
wait_for_completion(&mfd->dma->comp);
#endif
}
#ifdef MDP_HANG_DEBUG
mipi_dsi_cmd_mode_on = 0;
#endif
pr_debug("%s: done pid=%d dsi_clk_on=%d\n",
__func__, current->pid, mipi_dsi_clk_on);
}
