static int __init mipi_cmd_himax_720p_pt_init(void)
{
int ret;
if (msm_fb_detect_client("mipi_cmd_himax_720p"))
return 0;
pinfo.xres = 720;
pinfo.yres = 1280;
pinfo.type = MIPI_CMD_PANEL;
pinfo.pdest = DISPLAY_1;
pinfo.wait_cycle = 0;
pinfo.bpp = 24;
pinfo.lcdc.h_back_porch = 29;
pinfo.lcdc.h_front_porch = 55;
pinfo.lcdc.h_pulse_width = 16;
pinfo.lcdc.v_back_porch = 1;
pinfo.lcdc.v_front_porch = 2;
pinfo.lcdc.v_pulse_width = 1;
pinfo.lcdc.border_clr = 0;
pinfo.lcdc.underflow_clr = 0xff;
pinfo.lcdc.hsync_skew = 0;
pinfo.bl_max = 200;
pinfo.bl_min = 1;
pinfo.fb_num = 2;
pinfo.clk_rate = 507000000;
pinfo.lcd.vsync_enable = TRUE;
pinfo.lcd.hw_vsync_mode = TRUE;
pinfo.lcd.refx100 = 6000;
pinfo.lcd.v_back_porch = 32;
pinfo.lcd.v_front_porch = 32;
pinfo.lcd.v_pulse_width = 1;
pinfo.mipi.mode = DSI_CMD_MODE;
pinfo.mipi.dst_format = DSI_CMD_DST_FORMAT_RGB888;
pinfo.mipi.vc = 0;
pinfo.mipi.data_lane0 = TRUE;
pinfo.mipi.data_lane1 = TRUE;
pinfo.mipi.data_lane2 = TRUE;
pinfo.mipi.t_clk_post = 0x04;
pinfo.mipi.t_clk_pre = 0x1e;
pinfo.mipi.stream = 0;
pinfo.mipi.mdp_trigger = DSI_CMD_TRIGGER_NONE;
pinfo.mipi.dma_trigger = DSI_CMD_TRIGGER_SW;
pinfo.mipi.te_sel = 1;
pinfo.mipi.interleave_max = 1;
pinfo.mipi.insert_dcs_cmd = TRUE;
pinfo.mipi.wr_mem_continue = 0x3c;
pinfo.mipi.wr_mem_start = 0x2c;
pinfo.mipi.dsi_phy_db = &dsi_cmd_mode_phy_db;
ret = mipi_himax_device_register(&pinfo, MIPI_DSI_PRIM,
MIPI_DSI_PANEL_720P_PT);
if (ret)
pr_err("%s: failed to register device!\n", __func__);
return ret;
}
static int __init mipi_video_himax_h8379a_wvga_pt_init(void)
{
int ret;
#ifdef CONFIG_FB_MSM_MIPI_PANEL_DETECT
if (msm_fb_detect_client("mipi_video_himax_hd"))
return 0;
#endif
pinfo.xres = 480;
pinfo.yres = 800;
pinfo.type = MIPI_VIDEO_PANEL;
pinfo.pdest = DISPLAY_1;
pinfo.wait_cycle = 0;
pinfo.bpp = 24;
/* QCT Limitation :
* All proch values must be a multiple of 4. 2011.01.20 */
#if defined(DSI_BIT_CLK_337MHZ)
pinfo.lcdc.h_back_porch = 20;
pinfo.lcdc.h_front_porch = 16;
pinfo.lcdc.h_pulse_width = 4;
pinfo.lcdc.v_back_porch = 22;
pinfo.lcdc.v_front_porch = 8;
pinfo.lcdc.v_pulse_width = 1;
#elif defined(DSI_BIT_CLK_325MHZ)
pinfo.lcdc.h_back_porch = 42;
pinfo.lcdc.h_front_porch = 56;
pinfo.lcdc.h_pulse_width = 20;
pinfo.lcdc.v_back_porch = 7;
pinfo.lcdc.v_front_porch = 8;
pinfo.lcdc.v_pulse_width = 1;
#elif defined(DSI_BIT_CLK_349MHZ)
pinfo.lcdc.h_back_porch = 42;
pinfo.lcdc.h_front_porch = 56;
pinfo.lcdc.h_pulse_width = 16;
pinfo.lcdc.v_back_porch = 7;
pinfo.lcdc.v_front_porch = 8;
pinfo.lcdc.v_pulse_width = 1;
#elif defined(DSI_BIT_CLK_406MHZ)
{
int lcd_maker_id = 0;
lcd_maker_id = gpio_get_value_cansleep(89);
if(lcd_maker_id) //Tovis LCD
{
pinfo.lcdc.h_back_porch = 64;
pinfo.lcdc.h_front_porch = 136;
pinfo.lcdc.h_pulse_width = 4;
pinfo.lcdc.v_back_porch = 11;
pinfo.lcdc.v_front_porch = 13;
pinfo.lcdc.v_pulse_width = 2;
}
else //LGD
{
pinfo.lcdc.h_back_porch = 64;
pinfo.lcdc.h_front_porch = 144;
pinfo.lcdc.h_pulse_width = 4;
pinfo.lcdc.v_back_porch = 5;
pinfo.lcdc.v_front_porch = 8;
pinfo.lcdc.v_pulse_width = 2;
}
}
#endif
pinfo.lcdc.border_clr = 0; /* blk */
pinfo.lcdc.underflow_clr = 0xff; /* blue */
pinfo.lcdc.hsync_skew = 0;
#ifdef CONFIG_LGE_BACKLIGHT_LM3533
pinfo.bl_max = 0xFF;
pinfo.bl_min = 0;
#else
pinfo.bl_max = 0xFF;
#ifdef CONFIG_MACH_MSM8960_L2S
pinfo.bl_default = 0x28;
#endif
pinfo.bl_min = 1;
#endif
pinfo.fb_num = 2;
pinfo.mipi.mode = DSI_VIDEO_MODE;
pinfo.mipi.pulse_mode_hsa_he = FALSE;
pinfo.mipi.hfp_power_stop = TRUE;
pinfo.mipi.hbp_power_stop = TRUE;
pinfo.mipi.hsa_power_stop = TRUE;
pinfo.mipi.eof_bllp_power_stop = TRUE;
pinfo.mipi.bllp_power_stop = TRUE;
pinfo.mipi.traffic_mode = DSI_NON_BURST_SYNCH_EVENT;
pinfo.mipi.dst_format = DSI_VIDEO_DST_FORMAT_RGB888;
pinfo.mipi.vc = 0;
pinfo.mipi.rgb_swap = DSI_RGB_SWAP_RGB;
pinfo.mipi.data_lane0 = TRUE;
pinfo.mipi.data_lane1 = TRUE;
pinfo.mipi.dlane_swap = 0x01;
#if defined(DSI_BIT_CLK_337MHZ)
pinfo.mipi.t_clk_post = 0x22;
pinfo.mipi.t_clk_pre = 0x33;
pinfo.clk_rate = 337000000;
pinfo.mipi.frame_rate = 65;
#elif defined(DSI_BIT_CLK_325MHZ)
pinfo.mipi.t_clk_post = 0x22;
pinfo.mipi.t_clk_pre = 0x34;
pinfo.clk_rate = 351340000;
pinfo.mipi.frame_rate = 60;
#elif defined(DSI_BIT_CLK_349MHZ)
pinfo.mipi.t_clk_post = 0x22;
pinfo.mipi.t_clk_pre = 0x34;
pinfo.clk_rate = 348990000;
pinfo.mipi.frame_rate = 60;
#elif defined(DSI_BIT_CLK_406MHZ)
pinfo.mipi.t_clk_post = 0x22;
pinfo.mipi.t_clk_pre = 0x35;
pinfo.clk_rate = 406560000;
pinfo.mipi.frame_rate = 60;
#endif
pinfo.mipi.stream = 0; /* dma_p */
pinfo.mipi.mdp_trigger = 0;/* DSI_CMD_TRIGGER_SW; */
pinfo.mipi.dma_trigger = DSI_CMD_TRIGGER_SW;
pinfo.mipi.dsi_phy_db = &dsi_video_mode_phy_db;
ret = mipi_himax_device_register(&pinfo, MIPI_DSI_PRIM,
MIPI_DSI_PANEL_WVGA_PT);
if (ret)
printk(KERN_ERR "%s: failed to register device!\n", __func__);
return ret;
}
