void display_init(void) { struct fbcon_config *fb_cfg; #if DISPLAY_TYPE_LCDC struct lcdc_timing_parameters *lcd_timing; mdp_clock_init(); if (board_machtype() == LINUX_MACHTYPE_8660_FLUID) { mmss_pixel_clock_configure(PIXEL_CLK_INDEX_25M); } else { mmss_pixel_clock_configure(PIXEL_CLK_INDEX_54M); } lcd_timing = get_lcd_timing(); fb_cfg = lcdc_init_set( lcd_timing ); fbcon_setup(fb_cfg); fbcon_clear(); panel_poweron(); #endif #if DISPLAY_TYPE_MIPI mdp_clock_init(); configure_dsicore_dsiclk(); configure_dsicore_byteclk(); configure_dsicore_pclk(); fb_cfg = mipi_init(); fbcon_setup(fb_cfg); #endif }
void display_init(void){ struct fbcon_config *fb_cfg; panel_backlight_on(); mipi_dsi_panel_power_on(); mipi_panel_reset(); mdp_clock_init(); mmss_clock_init(); fb_cfg = mipi_init(); fbcon_setup(fb_cfg); }
static int hi_mipi_probe(struct platform_device *pdev) { struct resource *mem; mipi_irq = platform_get_irq(pdev, 0); if (mipi_irq <= 0) { dev_err(&pdev->dev, "cannot find mipi IRQ\n"); } mem = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mipi"); gpMipiAllReg = devm_ioremap_resource(&pdev->dev, mem); if (IS_ERR(gpMipiAllReg)) return PTR_ERR(gpMipiAllReg); gpMiscRegBase = reg_misc_base_va; gpCrgRegBase = reg_crg_base_va; return mipi_init(); }
void display_init(void) { struct fbcon_config *fb_cfg; #if DISPLAY_TYPE_LCDC mdp_clock_init(); fb_cfg = lcdc_init(); panel_poweron(); fbcon_setup(fb_cfg); #endif #if DISPLAY_TYPE_MIPI mdp_clock_init(); fb_cfg = mipi_init(); fbcon_setup(fb_cfg); #endif }
static int mipi_dsi_on_sub1(struct hisi_fb_data_type *hisifd, char __iomem *mipi_dsi_base) { BUG_ON(mipi_dsi_base == NULL); /* mipi init */ mipi_init(hisifd, mipi_dsi_base); /* switch to cmd mode */ set_reg(mipi_dsi_base + MIPIDSI_MODE_CFG_OFFSET, 0x1, 1, 0); /* cmd mode: low power mode */ set_reg(mipi_dsi_base + MIPIDSI_CMD_MODE_CFG_OFFSET, 0x7f, 7, 8); set_reg(mipi_dsi_base + MIPIDSI_CMD_MODE_CFG_OFFSET, 0xf, 4, 16); set_reg(mipi_dsi_base + MIPIDSI_CMD_MODE_CFG_OFFSET, 0x1, 1, 24); /* disable generate High Speed clock */ /* delete? */ set_reg(mipi_dsi_base + MIPIDSI_LPCLK_CTRL_OFFSET, 0x0, 1, 0); return 0; }
void display_init(void) { #if DISPLAY_TYPE_MDDI fb_config = mddi_init(); ASSERT(fb_config); fbcon_setup(fb_config); #endif #if DISPLAY_TYPE_LCDC fb_config = lcdc_init(); ASSERT(fb_config); fbcon_setup(fb_config); #endif #if DISPLAY_TYPE_MIPI dprintf(SPEW, "display_init()\n"); panel_dsi_init(); fb_config = mipi_init(); ASSERT(fb_config); fbcon_setup(fb_config); #endif }
int mipi_dsi_on(struct platform_device *pdev) { int ret = 0; struct balong_fb_data_type *balongfd = NULL; unsigned long timeout = jiffies; if (NULL == pdev) { balongfb_loge("NULL Pointer\n"); return -EINVAL; } balongfd = (struct balong_fb_data_type *)platform_get_drvdata(pdev); if (NULL == balongfd) { balongfb_loge("NULL Pointer\n"); return -EINVAL; } /* set LCD init step before LCD on*/ balongfd->panel_info.lcd_init_step = LCD_INIT_POWER_ON; ret = panel_next_on(pdev); /* mipi dphy clock enable */ ret = clk_prepare_enable(balongfd->dsi_cfg_clk); if (ret != 0) { balongfb_loge("failed to enable dsi_cfg_clk, error=%d!\n", ret); return ret; } /* dsi pixel on */ set_reg(balongfd->ade_base + LDI_HDMI_DSI_GT_REG, 0x0, 1, 0); /* mipi init */ mipi_init(balongfd); /* modified for b052 bbit begin */ /* switch to command mode */ set_MIPIDSI_MODE_CFG(MIPIDSI_COMMAND_MODE); set_MIPIDSI_CMD_MODE_CFG_all_en_flag(1); /* 禁止向Clock Lane发起HS时钟传输请求 */ set_MIPIDSI_LPCLK_CTRL_phy_txrequestclkhs(0); /* add for timeout print log */ balongfb_loge("%s: dsi_on_time = %u,curfreq = %d\n", __func__,jiffies_to_msecs(jiffies-timeout),cpufreq_get_fb(0)); timeout = jiffies; ret = panel_next_on(pdev); /* modified for b052 bbit begin */ /* add for timeout print log */ balongfb_loge("%s: panel_on_time = %u,curfreq = %d\n", __func__,jiffies_to_msecs(jiffies-timeout),cpufreq_get_fb(0)); /* reset Core */ set_MIPIDSI_PWR_UP_shutdownz(0); if (balongfd->panel_info.type == PANEL_MIPI_VIDEO) { /* switch to video mode */ set_MIPIDSI_MODE_CFG(MIPIDSI_VIDEO_MODE); #if ADE_DEBUG_LOG_ENABLE /* set to video lcd mode */ g_panel_lcd_mode = 0; #endif } if (balongfd->panel_info.type == PANEL_MIPI_CMD) { /* switch to cmd mode */ set_MIPIDSI_CMD_MODE_CFG_all_en_flag(0); #if ADE_DEBUG_LOG_ENABLE /* set to command lcd mode */ g_panel_lcd_mode = 1; #endif } /* enable generate High Speed clock */ set_MIPIDSI_LPCLK_CTRL_phy_txrequestclkhs(1); /* Waking up Core */ set_MIPIDSI_PWR_UP_shutdownz(1); /*set max packet size, 0x1 << 8 |0x37*/ set_MIPIDSI_GEN_HDR(NULL, 0x137); lcd_pwr_status.lcd_dcm_pwr_status |= BIT(1); do_gettimeofday(&lcd_pwr_status.tvl_lcd_on); time_to_tm(lcd_pwr_status.tvl_lcd_on.tv_sec, 0, &lcd_pwr_status.tm_lcd_on); return ret; }
static int __init mipi_mod_init(void) { return mipi_init(); }