void mips_isa_BEQ_impl(struct mips_ctx_t *ctx)
{
if (mips_gpr_get_value(ctx,RS) == mips_gpr_get_value(ctx,RT))
mips_isa_rel_branch(ctx,SEXT32(IMM << 2,16));
//mips_isa_rel_branch(ctx,SEXT32(SEXT32(IMM,16) << 2, 18));
mips_isa_inst_debug(" regRS = %d and regRT = %d", mips_gpr_get_value(ctx,RS), mips_gpr_get_value(ctx,RT));
}
void mips_isa_BNE_impl(struct mips_ctx_t *ctx) {
if (mips_gpr_get_value(ctx, RS) != mips_gpr_get_value(ctx, RT)) {
mips_isa_rel_branch(ctx, SEXT32(IMM << 2, 16));
mips_isa_inst_debug(" Branch taken");
} else
mips_isa_inst_debug(" Branch not taken");
}
void mips_isa_SW_impl(struct mips_ctx_t *ctx) {
unsigned int temp = mips_gpr_get_value(ctx, RT);
unsigned int addr = mips_gpr_get_value(ctx, RS) + SEXT32(IMM, 16);
mem_write(ctx->mem, addr, 4, &temp);
mips_isa_inst_debug(" value stored: 0x%x", temp);
}
void mips_isa_SC_impl(struct mips_ctx_t *ctx) {
unsigned int temp = mips_gpr_get_value(ctx, RT);
// if()
mem_write(ctx->mem, mips_gpr_get_value(ctx, RS) + IMM, 4, &temp);
mips_gpr_set_value(ctx, RT, 1);
// FIXME: revisit details in m2s-1.3/srs/kernel/machine.def
}
void mips_isa_LBU_impl(struct mips_ctx_t *ctx) {
unsigned char temp;
unsigned int addr = mips_gpr_get_value(ctx, RS) + SEXT32(IMM, 16);
mem_read(ctx->mem, addr, sizeof(unsigned char), &temp);
mips_gpr_set_value(ctx, RT, (unsigned)temp);
mips_isa_inst_debug(" r%d=0x%x", RT, mips_gpr_get_value(ctx, RT));
}
void mips_isa_SB_impl(struct mips_ctx_t *ctx)
{
unsigned char temp = mips_gpr_get_value(ctx,RT);
unsigned int addr = mips_gpr_get_value(ctx,RS) + IMM;
mem_write(ctx->mem, addr, sizeof(unsigned char), &temp);
mips_isa_inst_debug("byte written: %x",temp);
}
void mips_isa_LWR_impl(struct mips_ctx_t *ctx) {
unsigned char src[4];
unsigned int rt_value = mips_gpr_get_value(ctx, RT);
unsigned char *dst = (unsigned char *)&rt_value;
unsigned int addr = mips_gpr_get_value(ctx, RS) + SEXT32(IMM, 16);
int i, size = 1 + (addr & 3);
mem_read(ctx->mem, addr - size + 1, size, src);
for (i = 0; i < size; i++) dst[size - i - 1] = src[i];
}
void mips_isa_SWR_impl(struct mips_ctx_t *ctx) {
unsigned int rt_value = mips_gpr_get_value(ctx, RT);
unsigned char *src = (unsigned char *)&rt_value;
unsigned char dst[4];
unsigned int addr = mips_gpr_get_value(ctx, RS) + IMM;
int size = 1 + (addr & 3);
int i;
for (i = 0; i < size; i++) dst[i] = src[size - i - 1];
mem_write(ctx->mem, addr - size + 1, size, dst);
}
void mips_isa_LW_impl(struct mips_ctx_t *ctx)
{
unsigned int temp;
unsigned int addr = mips_gpr_get_value(ctx,RS) + SEXT32((signed)IMM,16);
if ((BITS32(addr, 1, 0) | 0) == 1 )
fatal("LW: address error, effective address must be naturallty-aligned\n");
mem_read(ctx->mem, addr, 4, &temp);
mips_gpr_set_value(ctx,RT, temp);
mips_isa_inst_debug(" r%x=0x%x, r%x=%d", RT, temp, RT, mips_gpr_get_value(ctx,RT));
//mips_isa_inst_debug(" $0x%x=>tmp0, tmp0+r%d=>tmp0, tmp0=>r%d\n", SEXT32(IMM,16), RS, RT);
//mips_isa_inst_debug(" value loaded: %x", temp);
}
void mips_isa_SLTIU_impl(struct mips_ctx_t *ctx)
{
if ((unsigned int)mips_gpr_get_value(ctx,RS) < (unsigned int)SEXT32(IMM,16))
mips_gpr_set_value(ctx,RT, 1);
else
mips_gpr_set_value(ctx,RT, 0);
}
void mips_isa_SLTI_impl(struct mips_ctx_t *ctx)
{
if ((int)(mips_gpr_get_value(ctx,RS)) < IMM)
mips_gpr_set_value(ctx,RT, 1);
else
mips_gpr_set_value(ctx,RT, 0);
}
void mips_isa_LHU_impl(struct mips_ctx_t *ctx)
{
unsigned short int temp;
unsigned int addr = mips_gpr_get_value(ctx,RS) + IMM;
mem_read(ctx->mem, addr, sizeof(unsigned short int), &temp);
mips_gpr_set_value(ctx,RT, temp);
}
void mips_isa_LL_impl(struct mips_ctx_t *ctx)
{
unsigned int temp;
mem_read(ctx->mem, mips_gpr_get_value(ctx,RS) + IMM, sizeof(unsigned int), &temp);
mips_gpr_set_value(ctx,RT, temp);
// FIXME: add details from m2s-1.3/src/kernel/machine.def
}
void mips_isa_ADDI_impl(struct mips_ctx_t *ctx)
{
int temp;
temp = (int)mips_gpr_get_value(ctx,RS) + (int)(OFFSET);
mips_gpr_set_value(ctx,RT, temp);
mips_isa_inst_debug(" r%d -> 0x%x", RT, temp);
}
void mips_isa_LB_impl(struct mips_ctx_t *ctx)
{
unsigned char temp;
unsigned int addr = mips_gpr_get_value(ctx,RS) + SEXT32(IMM,16);
mem_read(ctx->mem, addr, sizeof(unsigned char), &temp);
mips_gpr_set_value(ctx,RT, SEXT32(temp, 8));
}
void mips_isa_LWC1_impl(struct mips_ctx_t *ctx)
{
unsigned int temp;
float f;
mem_read(ctx->mem, mips_gpr_get_value(ctx,RS) + IMM, sizeof(unsigned int), &temp);
f = *(float *) &temp;
MIPS_FPR_S_SET(FT, f);
}
void mips_isa_ADDIU_impl(struct mips_ctx_t *ctx)
{
mips_gpr_set_value(ctx,RT, mips_gpr_get_value(ctx,RS) + SEXT32((signed)IMM, 16));
mips_isa_inst_debug(" r%d -> r%d+0x%x", RT, RS, SEXT32(IMM, 16));
}
void mips_isa_BGTZ_impl(struct mips_ctx_t *ctx)
{
if ((int)(mips_gpr_get_value(ctx,RS)) > 0)
mips_isa_rel_branch(ctx,IMM << 2);
}
void mips_isa_BLEZ_impl(struct mips_ctx_t *ctx)
{
if ((int)(mips_gpr_get_value(ctx,RS)) <= 0)
mips_isa_rel_branch(ctx,SEXT32(IMM << 2,16));
//mips_isa_rel_branch(ctx,IMM << 2);
}
void mips_isa_ORI_impl(struct mips_ctx_t *ctx)
{
mips_gpr_set_value(ctx,RT, mips_gpr_get_value(ctx,RS) | ((unsigned int) (IMM) & ((1U << (16)) - 1)));
// (unsigned int) IMM);
mips_isa_inst_debug(" r%d=0x%x", RT, mips_gpr_get_value(ctx,RT));
}
void mips_isa_SLL_impl(struct mips_ctx_t *ctx)
{
mips_gpr_set_value(ctx,RD, (mips_gpr_get_value(ctx,RT) << SA));
mips_isa_inst_debug(" %x=%x<<%x", mips_gpr_get_value(ctx,RD), mips_gpr_get_value(ctx,RT), SA);
}
void mips_isa_SDC1_impl(struct mips_ctx_t *ctx)
{
double dbl = MIPS_FPR_D_GET(FT);
unsigned long int temp = * (unsigned long int *) &dbl;
mem_write(ctx->mem, mips_gpr_get_value(ctx,RS) + IMM, sizeof(unsigned int), &temp);
}
void mips_isa_SWC1_impl(struct mips_ctx_t *ctx)
{
float f = MIPS_FPR_S_GET(FT);
unsigned int temp = * (unsigned int *) &f;
mem_write(ctx->mem, mips_gpr_get_value(ctx,RS) + IMM, sizeof(unsigned int), &temp);
}
void mips_isa_LDC1_impl(struct mips_ctx_t *ctx)
{
unsigned long int temp;
mem_read(ctx->mem, mips_gpr_get_value(ctx,RS) + IMM, sizeof(unsigned int), &temp);
MIPS_FPR_D_SET(FT, * (double *) &temp);
}
void mips_isa_SH_impl(struct mips_ctx_t *ctx)
{
unsigned short int temp = mips_gpr_get_value(ctx,RT);
unsigned int addr = mips_gpr_get_value(ctx,RS) + IMM;
mem_write(ctx->mem, addr, sizeof(unsigned short int), &temp);
}
void mips_isa_XORI_impl(struct mips_ctx_t *ctx)
{
mips_gpr_set_value(ctx,RT, mips_gpr_get_value(ctx,RS) ^ (unsigned int) IMM);
}
void mips_isa_LUI_impl(struct mips_ctx_t *ctx)
{
mips_gpr_set_value(ctx,RT, (int)(IMM << 16));
mips_isa_inst_debug(" r%d: $0x%x", RT, mips_gpr_get_value(ctx,RT));
}
