static void mon_register_print(int mem)
{
z80_regs_t *regs;
if (monitor_diskspace_dnr(mem) >= 0) {
if (!check_drive_emu_level_ok(monitor_diskspace_dnr(mem) + 8))
return;
} else if (mem != e_comp_space) {
log_error(LOG_ERR, "Unknown memory space!");
return;
}
regs = mon_interfaces[mem]->z80_cpu_regs;
mon_out(" ADDR AF BC DE HL IX IY SP I R AF' BC' DE' HL'\n");
mon_out(".;%04x %04x %04x %04x %04x %04x %04x %04x %02x %02x %04x %04x %04x %04x\n",
addr_location(mon_register_get_val(mem, e_PC)),
mon_register_get_val(mem, e_AF),
mon_register_get_val(mem, e_BC),
mon_register_get_val(mem, e_DE),
mon_register_get_val(mem, e_HL),
mon_register_get_val(mem, e_IX),
mon_register_get_val(mem, e_IY),
mon_register_get_val(mem, e_SP),
mon_register_get_val(mem, e_I),
mon_register_get_val(mem, e_R),
mon_register_get_val(mem, e_AF2),
mon_register_get_val(mem, e_BC2),
mon_register_get_val(mem, e_DE2),
mon_register_get_val(mem, e_HL2));
}
static const char* mon_register_print_ex(int mem)
{
static char buff[80];
R65C02_regs_t *regs;
if (monitor_diskspace_dnr(mem) >= 0) {
if (!check_drive_emu_level_ok(monitor_diskspace_dnr(mem) + 8)) {
return "";
}
} else if (mem != e_comp_space) {
log_error(LOG_ERR, "Unknown memory space!");
return "";
}
regs = mon_interfaces[mem]->cpu_R65C02_regs;
sprintf(buff, "A:%02X X:%02X Y:%02X SP:%02x %c%c-%c%c%c%c%c",
mon_register_get_val(mem, e_A),
mon_register_get_val(mem, e_X),
mon_register_get_val(mem, e_Y),
mon_register_get_val(mem, e_SP),
R65C02_REGS_GET_SIGN(regs) ? 'N' : '.',
R65C02_REGS_GET_OVERFLOW(regs) ? 'V' : '.',
R65C02_REGS_GET_BREAK(regs) ? 'B' : '.',
R65C02_REGS_GET_DECIMAL(regs) ? 'D' : '.',
R65C02_REGS_GET_INTERRUPT(regs) ? 'I' : '.',
R65C02_REGS_GET_ZERO(regs) ? 'Z' : '.',
R65C02_REGS_GET_CARRY(regs) ? 'C' : '.');
return buff;
}
/* TODO: should use mon_register_list_get */
static void mon_register_print(int mem)
{
h6809_regs_t *regs;
if (monitor_diskspace_dnr(mem) >= 0) {
if (!check_drive_emu_level_ok(monitor_diskspace_dnr(mem) + 8)) {
return;
}
} else if (mem != e_comp_space) {
log_error(LOG_ERR, "Unknown memory space!");
return;
}
regs = mon_interfaces[mem]->h6809_cpu_regs;
mon_out(" ADDR A B X Y SP U DP EFHINZVC\n");
mon_out(".;%04x %02x %02x %04x %04x %04x %04x %02x %c%c%c%c%c%c%c%c\n",
addr_location(mon_register_get_val(mem, e_PC)),
mon_register_get_val(mem, e_A),
mon_register_get_val(mem, e_B),
mon_register_get_val(mem, e_X),
mon_register_get_val(mem, e_Y),
mon_register_get_val(mem, e_SP),
mon_register_get_val(mem, e_U),
mon_register_get_val(mem, e_DP),
(H6809_REGS_TEST_E(regs) ? '1' : '.'),
(H6809_REGS_TEST_F(regs) ? '1' : '.'),
(H6809_REGS_TEST_H(regs) ? '1' : '.'),
(H6809_REGS_TEST_I(regs) ? '1' : '.'),
(H6809_REGS_TEST_N(regs) ? '1' : '.'),
(H6809_REGS_TEST_Z(regs) ? '1' : '.'),
(H6809_REGS_TEST_V(regs) ? '1' : '.'),
(H6809_REGS_TEST_C(regs) ? '1' : '.')
);
}
static void mon_register_set_val(int mem, int reg_id, WORD val)
{
mos6510_regs_t *reg_ptr;
if (monitor_diskspace_dnr(mem) >= 0)
if (!check_drive_emu_level_ok(monitor_diskspace_dnr(mem) + 8))
return;
reg_ptr = mon_interfaces[mem]->cpu_regs;
switch(reg_id) {
case e_A:
MOS6510_REGS_SET_A(reg_ptr, (BYTE)val);
break;
case e_X:
MOS6510_REGS_SET_X(reg_ptr, (BYTE)val);
break;
case e_Y:
MOS6510_REGS_SET_Y(reg_ptr, (BYTE)val);
break;
case e_PC:
MOS6510_REGS_SET_PC(reg_ptr, val);
if (monitor_diskspace_dnr(mem) >= 0)
mon_interfaces[mem]->set_bank_base(mon_interfaces[mem]->context);
break;
case e_SP:
MOS6510_REGS_SET_SP(reg_ptr, (BYTE)val);
break;
default:
log_error(LOG_ERR, "Unknown register!");
return;
}
force_array[mem] = 1;
}
static unsigned int mon_register_get_val(int mem, int reg_id)
{
R65C02_regs_t *reg_ptr;
if (monitor_diskspace_dnr(mem) >= 0) {
if (!check_drive_emu_level_ok(monitor_diskspace_dnr(mem) + 8)) {
return 0;
}
}
reg_ptr = mon_interfaces[mem]->cpu_R65C02_regs;
switch (reg_id) {
case e_A:
return R65C02_REGS_GET_A(reg_ptr);
case e_X:
return R65C02_REGS_GET_X(reg_ptr);
case e_Y:
return R65C02_REGS_GET_Y(reg_ptr);
case e_PC:
return R65C02_REGS_GET_PC(reg_ptr);
case e_SP:
return R65C02_REGS_GET_SP(reg_ptr);
case e_FLAGS:
return R65C02_REGS_GET_FLAGS(reg_ptr)
| R65C02_REGS_GET_SIGN(reg_ptr)
| (R65C02_REGS_GET_ZERO(reg_ptr) << 1);
default:
log_error(LOG_ERR, "Unknown register!");
}
return 0;
}
static unsigned int mon_register_get_val(int mem, int reg_id)
{
mos6510dtv_regs_t *reg_ptr;
if (monitor_diskspace_dnr(mem) >= 0)
if (!check_drive_emu_level_ok(monitor_diskspace_dnr(mem) + 8))
return 0;
reg_ptr = mon_interfaces[mem]->dtv_cpu_regs;
switch(reg_id) {
case e_A:
return MOS6510DTV_REGS_GET_A(reg_ptr);
case e_X:
return MOS6510DTV_REGS_GET_X(reg_ptr);
case e_Y:
return MOS6510DTV_REGS_GET_Y(reg_ptr);
case e_PC:
return MOS6510DTV_REGS_GET_PC(reg_ptr);
case e_SP:
return MOS6510DTV_REGS_GET_SP(reg_ptr);
case e_FLAGS:
return MOS6510DTV_REGS_GET_FLAGS(reg_ptr)
| MOS6510DTV_REGS_GET_SIGN(reg_ptr)
| (MOS6510DTV_REGS_GET_ZERO(reg_ptr) << 1);
case e_R3:
return MOS6510DTV_REGS_GET_R3(reg_ptr);
case e_R4:
return MOS6510DTV_REGS_GET_R4(reg_ptr);
case e_R5:
return MOS6510DTV_REGS_GET_R5(reg_ptr);
case e_R6:
return MOS6510DTV_REGS_GET_R6(reg_ptr);
case e_R7:
return MOS6510DTV_REGS_GET_R7(reg_ptr);
case e_R8:
return MOS6510DTV_REGS_GET_R8(reg_ptr);
case e_R9:
return MOS6510DTV_REGS_GET_R9(reg_ptr);
case e_R10:
return MOS6510DTV_REGS_GET_R10(reg_ptr);
case e_R11:
return MOS6510DTV_REGS_GET_R11(reg_ptr);
case e_R12:
return MOS6510DTV_REGS_GET_R12(reg_ptr);
case e_R13:
return MOS6510DTV_REGS_GET_R13(reg_ptr);
case e_R14:
return MOS6510DTV_REGS_GET_R14(reg_ptr);
case e_R15:
return MOS6510DTV_REGS_GET_R15(reg_ptr);
case e_ACM:
return MOS6510DTV_REGS_GET_ACM(reg_ptr);
case e_YXM:
return MOS6510DTV_REGS_GET_YXM(reg_ptr);
default:
log_error(LOG_ERR, "Unknown register!");
}
return 0;
}
static void mon_register_set_val(int mem, int reg_id, WORD val)
{
z80_regs_t *reg_ptr;
if (monitor_diskspace_dnr(mem) >= 0)
if (!check_drive_emu_level_ok(monitor_diskspace_dnr(mem) + 8))
return;
reg_ptr = mon_interfaces[mem]->z80_cpu_regs;
switch(reg_id) {
case e_AF:
Z80_REGS_SET_AF(reg_ptr, val);
break;
case e_BC:
Z80_REGS_SET_BC(reg_ptr, val);
break;
case e_DE:
Z80_REGS_SET_DE(reg_ptr, val);
break;
case e_HL:
Z80_REGS_SET_HL(reg_ptr, val);
break;
case e_IX:
Z80_REGS_SET_IX(reg_ptr, val);
break;
case e_IY:
Z80_REGS_SET_IY(reg_ptr, val);
break;
case e_SP:
Z80_REGS_SET_SP(reg_ptr, val);
break;
case e_PC:
Z80_REGS_SET_PC(reg_ptr, val);
break;
case e_I:
Z80_REGS_SET_I(reg_ptr, (BYTE)val);
break;
case e_R:
Z80_REGS_SET_R(reg_ptr, (BYTE)val);
break;
case e_AF2:
Z80_REGS_SET_AF2(reg_ptr, val);
break;
case e_BC2:
Z80_REGS_SET_BC2(reg_ptr, val);
break;
case e_DE2:
Z80_REGS_SET_DE2(reg_ptr, val);
break;
case e_HL2:
Z80_REGS_SET_HL2(reg_ptr, val);
break;
default:
log_error(LOG_ERR, "Unknown register!");
return;
}
force_array[mem] = 1;
}
static void mon_register_set_val(int mem, int reg_id, WORD val)
{
WDC65816_regs_t *reg_ptr;
if (monitor_diskspace_dnr(mem) >= 0) {
if (!check_drive_emu_level_ok(monitor_diskspace_dnr(mem) + 8)) {
return;
}
}
reg_ptr = mon_interfaces[mem]->cpu_65816_regs;
switch(reg_id) {
case e_A:
WDC65816_REGS_SET_A(reg_ptr, (BYTE)val);
break;
case e_B:
WDC65816_REGS_SET_B(reg_ptr, (BYTE)val);
break;
case e_C:
WDC65816_REGS_SET_A(reg_ptr, (BYTE)val);
WDC65816_REGS_SET_B(reg_ptr, (BYTE)(val >> 8));
break;
case e_X:
WDC65816_REGS_SET_X(reg_ptr, (WORD)val);
break;
case e_Y:
WDC65816_REGS_SET_Y(reg_ptr, (WORD)val);
break;
case e_PC:
WDC65816_REGS_SET_PC(reg_ptr, val);
if (monitor_diskspace_dnr(mem) >= 0) {
mon_interfaces[mem]->set_bank_base(mon_interfaces[mem]->context);
}
break;
case e_SP:
WDC65816_REGS_SET_SP(reg_ptr, (WORD)val);
break;
case e_DPR:
WDC65816_REGS_SET_DPR(reg_ptr, (BYTE)val);
break;
case e_PBR:
WDC65816_REGS_SET_PBR(reg_ptr, (BYTE)val);
break;
case e_DBR:
WDC65816_REGS_SET_DBR(reg_ptr, (BYTE)val);
break;
case e_FLAGS:
WDC65816_REGS_SET_STATUS(reg_ptr, (BYTE)val);
break;
case e_E:
WDC65816_REGS_SET_EMUL(reg_ptr, (BYTE)val);
break;
default:
log_error(LOG_ERR, "Unknown register!");
return;
}
force_array[mem] = 1;
}
static void mon_register_print(int mem)
{
mos6510_regs_t *regs;
if (monitor_diskspace_dnr(mem) >= 0) {
if (!check_drive_emu_level_ok(monitor_diskspace_dnr(mem) + 8)) {
return;
}
} else if (mem != e_comp_space) {
log_error(LOG_ERR, "Unknown memory space!");
return;
}
regs = mon_interfaces[mem]->cpu_regs;
mon_out(" ADDR AC XR YR SP 00 01 NV-BDIZC ");
if (mon_interfaces[mem]->get_line_cycle != NULL) {
mon_out("LIN CYC STOPWATCH\n");
} else {
mon_out(" STOPWATCH\n");
}
mon_out(".;%04x %02x %02x %02x %02x %02x %02x %d%d%c%d%d%d%d%d",
addr_location(mon_register_get_val(mem, e_PC)),
mon_register_get_val(mem, e_A),
mon_register_get_val(mem, e_X),
mon_register_get_val(mem, e_Y),
mon_register_get_val(mem, e_SP),
mon_get_mem_val(mem, 0),
mon_get_mem_val(mem, 1),
TEST(MOS6510_REGS_GET_SIGN(regs)),
TEST(MOS6510_REGS_GET_OVERFLOW(regs)),
'1',
TEST(MOS6510_REGS_GET_BREAK(regs)),
TEST(MOS6510_REGS_GET_DECIMAL(regs)),
TEST(MOS6510_REGS_GET_INTERRUPT(regs)),
TEST(MOS6510_REGS_GET_ZERO(regs)),
TEST(MOS6510_REGS_GET_CARRY(regs)));
if (mon_interfaces[mem]->get_line_cycle != NULL) {
unsigned int line, cycle;
int half_cycle;
mon_interfaces[mem]->get_line_cycle(&line, &cycle, &half_cycle);
if (half_cycle == -1) {
mon_out(" %03i %03i", line, cycle);
} else {
mon_out(" %03i %03i %i", line, cycle, half_cycle);
}
}
mon_stopwatch_show(" ", "\n");
}
static unsigned int mon_register_get_val(int mem, int reg_id)
{
h6809_regs_t *reg_ptr;
if (monitor_diskspace_dnr(mem) >= 0) {
if (!check_drive_emu_level_ok(monitor_diskspace_dnr(mem) + 8)) {
return 0;
}
}
reg_ptr = mon_interfaces[mem]->h6809_cpu_regs;
switch (reg_id) {
case e_X:
return H6809_REGS_GET_X(reg_ptr);
case e_Y:
return H6809_REGS_GET_Y(reg_ptr);
case e_U:
return H6809_REGS_GET_U(reg_ptr);
case e_SP:
return H6809_REGS_GET_S(reg_ptr);
case e_PC:
return H6809_REGS_GET_PC(reg_ptr);
case e_DP:
return H6809_REGS_GET_DP(reg_ptr);
case e_FLAGS:
return H6809_REGS_GET_CC(reg_ptr);
case e_A:
return H6809_REGS_GET_A(reg_ptr);
case e_B:
return H6809_REGS_GET_B(reg_ptr);
case e_D:
return H6809_REGS_GET_D(reg_ptr);
#if 0
/* 6309 specific registers, for future support */
case e_E:
return H6809_REGS_GET_E(reg_ptr);
case e_F:
return H6809_REGS_GET_F(reg_ptr);
case e_W:
return H6809_REGS_GET_W(reg_ptr);
case e_Q:
return H6809_REGS_GET_Q(reg_ptr);
case e_V:
return H6809_REGS_GET_V(reg_ptr);
case e_MD:
return H6809_REGS_GET_MD(reg_ptr);
#endif
default:
log_error(LOG_ERR, "Unknown register!");
}
return 0;
}
static void mon_register_set_val(int mem, int reg_id, WORD val)
{
h6809_regs_t *reg_ptr;
if (monitor_diskspace_dnr(mem) >= 0) {
if (!check_drive_emu_level_ok(monitor_diskspace_dnr(mem) + 8)) {
return;
}
}
reg_ptr = mon_interfaces[mem]->h6809_cpu_regs;
switch (reg_id) {
case e_X:
H6809_REGS_SET_X(reg_ptr, val);
break;
case e_Y:
H6809_REGS_SET_Y(reg_ptr, val);
break;
case e_U:
H6809_REGS_SET_U(reg_ptr, val);
break;
case e_SP:
H6809_REGS_SET_S(reg_ptr, val);
break;
case e_PC:
H6809_REGS_SET_PC(reg_ptr, val);
break;
case e_DP:
H6809_REGS_SET_DP(reg_ptr, (BYTE)val);
break;
case e_FLAGS:
H6809_REGS_SET_CC(reg_ptr, (BYTE)val);
break;
case e_A:
H6809_REGS_SET_A(reg_ptr, (BYTE)val);
break;
case e_B:
H6809_REGS_SET_B(reg_ptr, (BYTE)val);
break;
case e_D:
H6809_REGS_SET_D(reg_ptr, val);
break;
default:
log_error(LOG_ERR, "Unknown register!");
return;
}
force_array[mem] = 1;
}
static unsigned int mon_register_get_val(int mem, int reg_id)
{
z80_regs_t *reg_ptr;
if (monitor_diskspace_dnr(mem) >= 0) {
if (!check_drive_emu_level_ok(monitor_diskspace_dnr(mem) + 8)) {
return 0;
}
}
reg_ptr = mon_interfaces[mem]->z80_cpu_regs;
switch (reg_id) {
case e_AF:
return Z80_REGS_GET_AF(reg_ptr);
case e_BC:
return Z80_REGS_GET_BC(reg_ptr);
case e_DE:
return Z80_REGS_GET_DE(reg_ptr);
case e_HL:
return Z80_REGS_GET_HL(reg_ptr);
case e_IX:
return Z80_REGS_GET_IX(reg_ptr);
case e_IY:
return Z80_REGS_GET_IY(reg_ptr);
case e_SP:
return Z80_REGS_GET_SP(reg_ptr);
case e_PC:
return Z80_REGS_GET_PC(reg_ptr);
case e_I:
return Z80_REGS_GET_I(reg_ptr);
case e_R:
return Z80_REGS_GET_R(reg_ptr);
case e_AF2:
return Z80_REGS_GET_AF2(reg_ptr);
case e_BC2:
return Z80_REGS_GET_BC2(reg_ptr);
case e_DE2:
return Z80_REGS_GET_DE2(reg_ptr);
case e_HL2:
return Z80_REGS_GET_HL2(reg_ptr);
default:
log_error(LOG_ERR, "Unknown register!");
}
return 0;
}
static unsigned int mon_register_get_val(int mem, int reg_id)
{
h6809_regs_t *reg_ptr;
if (monitor_diskspace_dnr(mem) >= 0) {
if (!check_drive_emu_level_ok(monitor_diskspace_dnr(mem) + 8)) {
return 0;
}
}
reg_ptr = mon_interfaces[mem]->h6809_cpu_regs;
switch (reg_id) {
case e_X:
return H6809_REGS_GET_X(reg_ptr);
case e_Y:
return H6809_REGS_GET_Y(reg_ptr);
case e_U:
return H6809_REGS_GET_U(reg_ptr);
case e_SP:
return H6809_REGS_GET_S(reg_ptr);
case e_PC:
return H6809_REGS_GET_PC(reg_ptr);
case e_DP:
return H6809_REGS_GET_DP(reg_ptr);
case e_FLAGS:
return H6809_REGS_GET_CC(reg_ptr);
case e_A:
return H6809_REGS_GET_A(reg_ptr);
case e_B:
return H6809_REGS_GET_B(reg_ptr);
case e_D:
return H6809_REGS_GET_D(reg_ptr);
default:
log_error(LOG_ERR, "Unknown register!");
}
return 0;
}
/* TODO: should use mon_register_list_get */
static const char* mon_register_print_ex(int mem)
{
static char buff[80];
h6809_regs_t *regs;
if (monitor_diskspace_dnr(mem) >= 0) {
if (!check_drive_emu_level_ok(monitor_diskspace_dnr(mem) + 8)) {
return "";
}
} else if (mem != e_comp_space) {
log_error(LOG_ERR, "Unknown memory space!");
return "";
}
regs = mon_interfaces[mem]->h6809_cpu_regs;
sprintf(buff, "A:%02X B:%02X X:%04X Y:%04X SP:%04X U:%04X DP:%02x %c%c%c%c%c%c%c%c",
mon_register_get_val(mem, e_A),
mon_register_get_val(mem, e_B),
mon_register_get_val(mem, e_X),
mon_register_get_val(mem, e_Y),
mon_register_get_val(mem, e_SP),
mon_register_get_val(mem, e_U),
mon_register_get_val(mem, e_DP),
H6809_REGS_TEST_E(regs) ? 'E' : '.',
H6809_REGS_TEST_F(regs) ? 'F' : '.',
H6809_REGS_TEST_H(regs) ? 'H' : '.',
H6809_REGS_TEST_I(regs) ? 'I' : '.',
H6809_REGS_TEST_N(regs) ? 'N' : '.',
H6809_REGS_TEST_Z(regs) ? 'Z' : '.',
H6809_REGS_TEST_V(regs) ? 'V' : '.',
H6809_REGS_TEST_C(regs) ? 'C' : '.'
);
return buff;
}
static void mon_register_print(int mem)
{
mos6510dtv_regs_t *regs;
if (monitor_diskspace_dnr(mem) >= 0)
{
if (!check_drive_emu_level_ok(monitor_diskspace_dnr(mem) + 8))
return;
}
else if (mem != e_comp_space)
{
#ifdef CELL_DEBUG
printf("ERROR: Unknown memory space!\n");
#endif
return;
}
regs = mon_interfaces[mem]->dtv_cpu_regs;
mon_out(" ADDR AC XR YR SP 00 01 NV-BDIZC");
if (mem == e_comp_space && mon_interfaces[mem]->get_line_cycle != NULL)
mon_out(" LIN CYC\n");
else
mon_out("\n");
mon_out(".;%04x %02x %02x %02x %02x %02x %02x %d%d%c%d%d%d%d%d",
addr_location(mon_register_get_val(mem, e_PC)),
mon_register_get_val(mem, e_A),
mon_register_get_val(mem, e_X),
mon_register_get_val(mem, e_Y),
mon_register_get_val(mem, e_SP),
mon_get_mem_val(mem, 0),
mon_get_mem_val(mem, 1),
TEST(MOS6510DTV_REGS_GET_SIGN(regs)),
TEST(MOS6510DTV_REGS_GET_OVERFLOW(regs)),
'1',
TEST(MOS6510DTV_REGS_GET_BREAK(regs)),
TEST(MOS6510DTV_REGS_GET_DECIMAL(regs)),
TEST(MOS6510DTV_REGS_GET_INTERRUPT(regs)),
TEST(MOS6510DTV_REGS_GET_ZERO(regs)),
TEST(MOS6510DTV_REGS_GET_CARRY(regs)));
if (mem == e_comp_space && mon_interfaces[mem]->get_line_cycle != NULL) {
unsigned int line, cycle;
int half_cycle;
mon_interfaces[mem]->get_line_cycle(&line, &cycle, &half_cycle);
if (half_cycle==-1)
mon_out(" %03i %03i\n", line, cycle);
else
mon_out(" %03i %03i %i\n", line, cycle, half_cycle);
} else {
mon_out("\n");
}
if (mem == e_comp_space) {
mon_out("R3 R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 R15 ACM YXM\n");
mon_out("%02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x\n",
mon_register_get_val(mem, e_R3),
mon_register_get_val(mem, e_R4),
mon_register_get_val(mem, e_R5),
mon_register_get_val(mem, e_R6),
mon_register_get_val(mem, e_R7),
mon_register_get_val(mem, e_R8),
mon_register_get_val(mem, e_R9),
mon_register_get_val(mem, e_R10),
mon_register_get_val(mem, e_R11),
mon_register_get_val(mem, e_R12),
mon_register_get_val(mem, e_R13),
mon_register_get_val(mem, e_R14),
mon_register_get_val(mem, e_R15),
mon_register_get_val(mem, e_ACM),
mon_register_get_val(mem, e_YXM));
}
}
/* TODO: should use mon_register_list_get */
static void mon_register_print(int mem)
{
WDC65816_regs_t *regs;
unsigned int line = 0, cycle = 0;
int half_cycle = -1;
if (monitor_diskspace_dnr(mem) >= 0) {
if (!check_drive_emu_level_ok(monitor_diskspace_dnr(mem) + 8)) {
return;
}
} else if (mem != e_comp_space) {
log_error(LOG_ERR, "Unknown memory space!");
return;
}
regs = mon_interfaces[mem]->cpu_65816_regs;
if (mem == e_comp_space && mon_interfaces[mem]->get_line_cycle != NULL) {
mon_interfaces[mem]->get_line_cycle(&line, &cycle, &half_cycle);
}
if (mon_register_get_val(mem, e_E)) {
mon_out(" PB ADDR A B X Y SP DPRE DB NV-BDIZC E");
if (mem == e_comp_space && mon_interfaces[mem]->get_line_cycle != NULL) {
mon_out(" LIN CYC");
if (half_cycle != -1) {
mon_out(".SB");
}
}
mon_out("\n.;%02x %04x %02x %02x %02x %02x %02x %04x %02x %d%d1%d%d%d%d%d 1",
mon_register_get_val(mem, e_PBR),
addr_location(mon_register_get_val(mem, e_PC)),
mon_register_get_val(mem, e_A),
mon_register_get_val(mem, e_B),
mon_register_get_val(mem, e_X) & 0xff,
mon_register_get_val(mem, e_Y) & 0xff,
mon_register_get_val(mem, e_SP) & 0xff,
mon_register_get_val(mem, e_DPR),
mon_register_get_val(mem, e_DBR),
TEST(WDC65816_REGS_GET_SIGN(regs)),
TEST(WDC65816_REGS_GET_OVERFLOW(regs)),
TEST(WDC65816_REGS_GET_BREAK(regs)),
TEST(WDC65816_REGS_GET_DECIMAL(regs)),
TEST(WDC65816_REGS_GET_INTERRUPT(regs)),
TEST(WDC65816_REGS_GET_ZERO(regs)),
TEST(WDC65816_REGS_GET_CARRY(regs)));
} else {
mon_out(" PB ADDR");
mon_out(WDC65816_REGS_GET_65816_M(regs) ? " A B " : " CREG");
mon_out(WDC65816_REGS_GET_65816_X(regs) ? " XH X YH Y " : " X Y ");
mon_out(" STCK DPRE DB NVMXDIZC E");
if (mem == e_comp_space && mon_interfaces[mem]->get_line_cycle != NULL) {
mon_out(" LIN CYC");
if (half_cycle != -1) {
mon_out(".SB");
}
}
mon_out("\n.;%02x %04x",
mon_register_get_val(mem, e_PBR),
addr_location(mon_register_get_val(mem, e_PC)));
if (WDC65816_REGS_GET_65816_M(regs)) {
mon_out(" %02x %02x",
mon_register_get_val(mem, e_A),
mon_register_get_val(mem, e_B));
} else {
mon_out(" %02x%02x",
mon_register_get_val(mem, e_B),
mon_register_get_val(mem, e_A));
}
if (WDC65816_REGS_GET_65816_X(regs)) {
mon_out(" %02x %02x %02x %02x",
mon_register_get_val(mem, e_X) >> 8,
mon_register_get_val(mem, e_X) & 0xff,
mon_register_get_val(mem, e_Y) >> 8,
mon_register_get_val(mem, e_Y) & 0xff);
} else {
mon_out(" %04x %04x",
mon_register_get_val(mem, e_X),
mon_register_get_val(mem, e_Y));
}
mon_out(" %04x %04x %02x %d%d%d%d%d%d%d%d 0",
mon_register_get_val(mem, e_SP),
mon_register_get_val(mem, e_DPR),
mon_register_get_val(mem, e_DBR),
TEST(WDC65816_REGS_GET_SIGN(regs)),
TEST(WDC65816_REGS_GET_OVERFLOW(regs)),
TEST(WDC65816_REGS_GET_65816_M(regs)),
TEST(WDC65816_REGS_GET_65816_X(regs)),
TEST(WDC65816_REGS_GET_DECIMAL(regs)),
TEST(WDC65816_REGS_GET_INTERRUPT(regs)),
TEST(WDC65816_REGS_GET_ZERO(regs)),
TEST(WDC65816_REGS_GET_CARRY(regs)));
}
static void mon_register_set_val(int mem, int reg_id, WORD val)
{
mos6510dtv_regs_t *reg_ptr;
if (monitor_diskspace_dnr(mem) >= 0)
if (!check_drive_emu_level_ok(monitor_diskspace_dnr(mem) + 8))
return;
reg_ptr = mon_interfaces[mem]->dtv_cpu_regs;
switch(reg_id) {
case e_A:
MOS6510DTV_REGS_SET_A(reg_ptr, (BYTE)val);
break;
case e_X:
MOS6510DTV_REGS_SET_X(reg_ptr, (BYTE)val);
break;
case e_Y:
MOS6510DTV_REGS_SET_Y(reg_ptr, (BYTE)val);
break;
case e_PC:
MOS6510DTV_REGS_SET_PC(reg_ptr, val);
if (monitor_diskspace_dnr(mem) >= 0)
mon_interfaces[mem]->set_bank_base(mon_interfaces[mem]->context);
break;
case e_SP:
MOS6510DTV_REGS_SET_SP(reg_ptr, (BYTE)val);
break;
case e_FLAGS:
MOS6510DTV_REGS_SET_STATUS(reg_ptr, (BYTE)val);
break;
case e_R3:
MOS6510DTV_REGS_SET_R3(reg_ptr, (BYTE)val);
break;
case e_R4:
MOS6510DTV_REGS_SET_R4(reg_ptr, (BYTE)val);
break;
case e_R5:
MOS6510DTV_REGS_SET_R5(reg_ptr, (BYTE)val);
break;
case e_R6:
MOS6510DTV_REGS_SET_R6(reg_ptr, (BYTE)val);
break;
case e_R7:
MOS6510DTV_REGS_SET_R7(reg_ptr, (BYTE)val);
break;
case e_R8:
MOS6510DTV_REGS_SET_R8(reg_ptr, (BYTE)val);
break;
case e_R9:
MOS6510DTV_REGS_SET_R9(reg_ptr, (BYTE)val);
break;
case e_R10:
MOS6510DTV_REGS_SET_R10(reg_ptr, (BYTE)val);
break;
case e_R11:
MOS6510DTV_REGS_SET_R11(reg_ptr, (BYTE)val);
break;
case e_R12:
MOS6510DTV_REGS_SET_R12(reg_ptr, (BYTE)val);
break;
case e_R13:
MOS6510DTV_REGS_SET_R13(reg_ptr, (BYTE)val);
break;
case e_R14:
MOS6510DTV_REGS_SET_R14(reg_ptr, (BYTE)val);
break;
case e_R15:
MOS6510DTV_REGS_SET_R15(reg_ptr, (BYTE)val);
break;
case e_ACM:
MOS6510DTV_REGS_SET_ACM(reg_ptr, (BYTE)val);
break;
case e_YXM:
MOS6510DTV_REGS_SET_YXM(reg_ptr, (BYTE)val);
break;
default:
#ifdef CELL_DEBUG
printf("ERROR: Unknown register!\n");
#endif
return;
}
force_array[mem] = 1;
}
static void mon_register_set_val(int mem, int reg_id, WORD val)
{
h6809_regs_t *reg_ptr;
if (monitor_diskspace_dnr(mem) >= 0) {
if (!check_drive_emu_level_ok(monitor_diskspace_dnr(mem) + 8)) {
return;
}
}
reg_ptr = mon_interfaces[mem]->h6809_cpu_regs;
switch (reg_id) {
case e_X:
H6809_REGS_SET_X(reg_ptr, val);
break;
case e_Y:
H6809_REGS_SET_Y(reg_ptr, val);
break;
case e_U:
H6809_REGS_SET_U(reg_ptr, val);
break;
case e_SP:
H6809_REGS_SET_S(reg_ptr, val);
break;
case e_PC:
H6809_REGS_SET_PC(reg_ptr, val);
break;
case e_DP:
H6809_REGS_SET_DP(reg_ptr, (BYTE)val);
break;
case e_FLAGS:
H6809_REGS_SET_CC(reg_ptr, (BYTE)val);
break;
case e_A:
H6809_REGS_SET_A(reg_ptr, (BYTE)val);
break;
case e_B:
H6809_REGS_SET_B(reg_ptr, (BYTE)val);
break;
case e_D:
H6809_REGS_SET_D(reg_ptr, val);
break;
#if 0
/* 6309 specific registers, for future support */
case e_E:
H6809_REGS_SET_E(reg_ptr, (BYTE)val);
break;
case e_F:
H6809_REGS_SET_F(reg_ptr, (BYTE)val);
break;
case e_W:
H6809_REGS_SET_W(reg_ptr, (WORD)val);
break;
case e_Q:
H6809_REGS_SET_Q(reg_ptr, (DWORD)val);
break;
case e_V:
H6809_REGS_SET_V(reg_ptr, (WORD)val);
break;
case e_MD:
H6809_REGS_SET_MD(reg_ptr, (BYTE)val);
break;
#endif
default:
log_error(LOG_ERR, "Unknown register!");
return;
}
force_array[mem] = 1;
}
