static void __init
lite52xx_setup_cpu(void)
{
struct mpc52xx_gpio __iomem *gpio;
u32 port_config;
/* Map zones */
gpio = mpc52xx_find_and_map("mpc52xx-gpio");
if (!gpio) {
printk(KERN_ERR __FILE__ ": "
"Error while mapping GPIO register for port config. "
"Expect some abnormal behavior\n");
goto error;
}
/* Set port config */
port_config = in_be32(&gpio->port_config);
port_config &= ~0x00800000; /* 48Mhz internal, pin is GPIO */
port_config &= ~0x00007000; /* USB port : Differential mode */
port_config |= 0x00001000; /* USB 1 only */
port_config &= ~0x03000000; /* ATA CS is on csb_4/5 */
port_config |= 0x01000000;
pr_debug("port_config: old:%x new:%x\n",
in_be32(&gpio->port_config), port_config);
out_be32(&gpio->port_config, port_config);
/* Unmap zone */
error:
iounmap(gpio);
}
int mpc52xx_pm_prepare(suspend_state_t state)
{
if (state != PM_SUSPEND_STANDBY)
return -EINVAL;
/* map the whole register space */
mbar = mpc52xx_find_and_map("mpc5200");
if (!mbar) {
printk(KERN_ERR "%s:%i Error mapping registers\n", __func__, __LINE__);
return -ENOSYS;
}
/* these offsets are from mpc5200 users manual */
sdram = mbar + 0x100;
cdm = mbar + 0x200;
intr = mbar + 0x500;
gpiow = mbar + 0xc00;
sram = mbar + 0x8000; /* Those will be handled by the */
sram_size = 0x4000; /* bestcomm driver soon */
/* call board suspend code, if applicable */
if (mpc52xx_suspend.board_suspend_prepare)
mpc52xx_suspend.board_suspend_prepare(mbar);
else {
printk(KERN_ALERT "%s: %i don't know how to wake up the board\n",
__func__, __LINE__);
goto out_unmap;
}
return 0;
out_unmap:
iounmap(mbar);
return -ENOSYS;
}
void __init
mpc52xx_setup_cpu(void)
{
struct mpc52xx_cdm __iomem *cdm;
struct mpc52xx_xlb __iomem *xlb;
/* Map zones */
cdm = mpc52xx_find_and_map("mpc5200-cdm");
xlb = mpc52xx_find_and_map("mpc5200-xlb");
if (!cdm || !xlb) {
printk(KERN_ERR __FILE__ ": "
"Error while mapping CDM/XLB during mpc52xx_setup_cpu. "
"Expect some abnormal behavior\n");
goto unmap_regs;
}
/* Use internal 48 Mhz */
out_8(&cdm->ext_48mhz_en, 0x00);
out_8(&cdm->fd_enable, 0x01);
if (in_be32(&cdm->rstcfg) & 0x40) /* Assumes 33Mhz clock */
out_be16(&cdm->fd_counters, 0x0001);
else
out_be16(&cdm->fd_counters, 0x5555);
/* Configure the XLB Arbiter priorities */
out_be32(&xlb->master_pri_enable, 0xff);
out_be32(&xlb->master_priority, 0x11111111);
/* Disable XLB pipelining */
/* (cfr errate 292. We could do this only just before ATA PIO
transaction and re-enable it afterwards ...) */
out_be32(&xlb->config, in_be32(&xlb->config) | MPC52xx_XLB_CFG_PLDIS);
/* Unmap zones */
unmap_regs:
if (cdm) iounmap(cdm);
if (xlb) iounmap(xlb);
}
