static int hsusb_rpc_connect(int connect)
{
if (connect)
return msm_hsusb_rpc_connect();
else
return msm_hsusb_rpc_close();
}
static int msm_xusb_init_phy(struct msmusb_hcd *mhcd)
{
int ret = -ENODEV;
struct usb_hcd *hcd = mhcd_to_hcd(mhcd);
struct msm_usb_host_platform_data *pdata = mhcd->pdata;
unsigned temp;
switch (PHY_TYPE(pdata->phy_info)) {
case USB_PHY_INTEGRATED:
msm_hsusb_rpc_connect();
/* VBUS might be present. Turn off vbus */
if (pdata->vbus_power)
pdata->vbus_power(pdata->phy_info, 0);
msm_xusb_enable_clks(mhcd);
clk_enable(mhcd->clk);
if (pdata->phy_reset)
ret = pdata->phy_reset(hcd->regs);
else
ret = msm_hsusb_phy_reset();
if (ret)
break;
/* Give some delay to settle phy after reset */
msleep(100);
/* Disable VbusValid and SessionEnd comparators */
ulpi_write(hcd, ULPI_VBUS_VALID
| ULPI_SESS_END, ULPI_INT_RISE_CLR);
ulpi_write(hcd, ULPI_VBUS_VALID
| ULPI_SESS_END, ULPI_INT_FALL_CLR);
/* set hs driver amplitude to max
* to avoid eye diagram failures
*/
temp = ulpi_read(hcd, ULPI_CONFIG_REG);
temp |= ULPI_AMPLITUDE_MAX;
ulpi_write(hcd, temp, ULPI_CONFIG_REG);
/* Disable all interrupts */
writel(0, USB_USBINTR);
writel(readl(USB_OTGSC) & ~OTGSC_INTR_MASK, USB_OTGSC);
msm_xusb_disable_clks(mhcd);
clk_disable(mhcd->clk);
break;
case USB_PHY_SERIAL_PMIC:
msm_xusb_enable_clks(mhcd);
writel(0, USB_USBINTR);
ret = msm_fsusb_rpc_init(&mhcd->otg_ops);
if (!ret)
msm_fsusb_init_phy();
msm_xusb_disable_clks(mhcd);
break;
default:
pr_err("%s: undefined phy type ( %X ) \n", __func__,
pdata->phy_info);
}
return ret;
}
static void __init halibut_init(void)
{
if (socinfo_init() < 0)
BUG();
if (machine_is_msm7201a_ffa()) {
smc91x_resources[0].start = 0x98000300;
smc91x_resources[0].end = 0x98000400;
smc91x_resources[1].start = MSM_GPIO_TO_INT(85);
smc91x_resources[1].end = MSM_GPIO_TO_INT(85);
}
/* All 7x01 2.0 based boards are expected to have RAM chips capable
* of 160 MHz. */
if (cpu_is_msm7x01()
&& SOCINFO_VERSION_MAJOR(socinfo_get_version()) == 2)
halibut_clock_data.max_axi_khz = 160000;
#if defined(CONFIG_MSM_SERIAL_DEBUGGER)
msm_serial_debug_init(MSM_UART3_PHYS, INT_UART3,
&msm_device_uart3.dev, 1);
#endif
msm_hsusb_pdata.soc_version = socinfo_get_version();
msm_acpu_clock_init(&halibut_clock_data);
msm_device_hsusb_peripheral.dev.platform_data = &msm_hsusb_pdata,
msm_device_hsusb_host.dev.platform_data = &msm_hsusb_pdata,
platform_add_devices(devices, ARRAY_SIZE(devices));
msm_camera_add_device();
msm_device_i2c_init();
i2c_register_board_info(0, i2c_devices, ARRAY_SIZE(i2c_devices));
#ifdef CONFIG_SURF_FFA_GPIO_KEYPAD
if (machine_is_msm7201a_ffa())
platform_device_register(&keypad_device_7k_ffa);
else
platform_device_register(&keypad_device_surf);
#endif
halibut_init_mmc();
#ifdef CONFIG_USB_FUNCTION
hsusb_gpio_init();
#endif
msm_fb_add_devices();
bt_power_init();
#ifdef CONFIG_USB_ANDROID
msm_hsusb_rpc_connect();
msm_hsusb_set_vbus_state(1) ;
#endif
msm_pm_set_platform_data(msm_pm_data);
}
static int msm_xusb_init_host(struct msmusb_hcd *mhcd)
{
int ret = 0;
struct msm_otg *otg;
struct usb_hcd *hcd = mhcd_to_hcd(mhcd);
struct msm_usb_host_platform_data *pdata = mhcd->pdata;
struct device *dev = container_of((void *)hcd, struct device,
platform_data);
switch (PHY_TYPE(pdata->phy_info)) {
case USB_PHY_INTEGRATED:
msm_hsusb_rpc_connect();
if (pdata->vbus_init)
pdata->vbus_init(1);
if (pdata->vbus_power)
pdata->vbus_power(pdata->phy_info, 0);
INIT_WORK(&mhcd->otg_work, msm_hsusb_otg_work);
mhcd->xceiv = otg_get_transceiver();
if (!mhcd->xceiv)
return -ENODEV;
otg = container_of(mhcd->xceiv, struct msm_otg, otg);
hcd->regs = otg->regs;
otg->start_host = msm_hsusb_start_host;
ret = otg_set_host(mhcd->xceiv, &hcd->self);
break;
case USB_PHY_SERIAL_PMIC:
hcd->regs = ioremap(hcd->rsrc_start, hcd->rsrc_len);
if (!hcd->regs)
return -EFAULT;
mhcd->clk = clk_get(dev, "usb_hs2_clk");
if (IS_ERR(mhcd->clk)) {
iounmap(hcd->regs);
return PTR_ERR(mhcd->clk);
}
mhcd->pclk = clk_get(dev, "usb_hs2_pclk");
if (IS_ERR(mhcd->pclk)) {
iounmap(hcd->regs);
clk_put(mhcd->clk);
return PTR_ERR(mhcd->pclk);
}
mhcd->otg_ops.request = msm_hsusb_request_host;
mhcd->otg_ops.handle = (void *) mhcd;
ret = msm_xusb_init_phy(mhcd);
if (ret < 0) {
iounmap(hcd->regs);
clk_put(mhcd->clk);
clk_put(mhcd->pclk);
}
break;
default:
pr_err("phy type is bad\n");
}
return ret;
}
static int msm_xusb_init_host(struct platform_device *pdev,
struct msmusb_hcd *mhcd)
{
int ret = 0;
struct msm_otg *otg;
struct usb_hcd *hcd = mhcd_to_hcd(mhcd);
struct ehci_hcd *ehci = hcd_to_ehci(hcd);
struct msm_usb_host_platform_data *pdata = mhcd->pdata;
switch (PHY_TYPE(pdata->phy_info)) {
case USB_PHY_INTEGRATED:
msm_hsusb_rpc_connect();
if (pdata->vbus_init)
pdata->vbus_init(1);
/* VBUS might be present. Turn off vbus */
if (pdata->vbus_power)
pdata->vbus_power(pdata->phy_info, 0);
INIT_WORK(&mhcd->otg_work, msm_hsusb_otg_work);
mhcd->xceiv = usb_get_transceiver();
if (!mhcd->xceiv)
return -ENODEV;
otg = container_of(mhcd->xceiv, struct msm_otg, phy);
hcd->regs = otg->regs;
otg->start_host = msm_hsusb_start_host;
ret = otg_set_host(mhcd->xceiv->otg, &hcd->self);
ehci->transceiver = mhcd->xceiv;
break;
case USB_PHY_SERIAL_PMIC:
hcd->regs = ioremap(hcd->rsrc_start, hcd->rsrc_len);
if (!hcd->regs)
return -EFAULT;
/* get usb clocks */
mhcd->alt_core_clk = clk_get(&pdev->dev, "alt_core_clk");
if (IS_ERR(mhcd->alt_core_clk)) {
iounmap(hcd->regs);
return PTR_ERR(mhcd->alt_core_clk);
}
mhcd->iface_clk = clk_get(&pdev->dev, "iface_clk");
if (IS_ERR(mhcd->iface_clk)) {
iounmap(hcd->regs);
clk_put(mhcd->alt_core_clk);
return PTR_ERR(mhcd->iface_clk);
}
mhcd->otg_ops.request = msm_hsusb_request_host;
mhcd->otg_ops.handle = (void *) mhcd;
ret = msm_xusb_init_phy(mhcd);
if (ret < 0) {
iounmap(hcd->regs);
clk_put(mhcd->alt_core_clk);
clk_put(mhcd->iface_clk);
}
break;
default:
pr_err("phy type is bad\n");
}
return ret;
}
int msm_hsusb_get_set_usb_conf_nv_value(uint32_t nv_item,uint32_t value,uint32_t is_write)
{
int rc = 0;
struct hsusb_phy_start_req {
struct rpc_request_hdr hdr;
uint32_t nv_item;
uint32_t value;
uint32_t is_write;
} req;
struct nv23_value_rep {
struct rpc_reply_hdr hdr;
int value;
char wifidata[24];
} rep;
if (!usb_ep || IS_ERR(usb_ep)) {
msm_hsusb_rpc_connect();
}
if (!usb_rpc_ids.get_usb_conf_nv_value) {
printk(KERN_ERR "%s: proc id not supported \n", __func__);
return -ENODATA;
}
req.nv_item = cpu_to_be32(nv_item);
req.value = cpu_to_be32(value);
req.is_write =cpu_to_be32(is_write);
rc = msm_rpc_call_reply(usb_ep, usb_rpc_ids.get_usb_conf_nv_value,
&req, sizeof(req),
&rep, sizeof(rep),
5 * HZ);
printk("======return value=%d \n\n",be32_to_cpu(rep.value));
if (rc < 0)
{
printk(KERN_ERR "%s: rpc call failed! error: %d\n" ,
__func__, rc);
return rc;
}
else
{
printk(KERN_ERR "%s: rpc call success\n" ,
__func__);
}
rc = be32_to_cpu(rep.value);
if(rc == 0)
{
if(nv_item == _NV_WLAN_MAC_ADDRESS_) {
char * p = (char *)value;
memcpy(p,rep.wifidata,6);
}
else if(nv_item == _NV_WLAN_ATHEROS_SPECIFIC_CFG_) {
char *p = (char *)value;
memcpy(p,rep.wifidata,24);
}
else {
}
}
return rc;
}
