/*
* system_init: do the early system initialization.
*/
void system_init(void)
{
/* CC: remove temporarily for MT6573 porting */
#if 0
mt6573_timer_init();
#endif
/* enabling audio depop takes time,
* so init it here rather than linux kernel
*/
delay(2000);
/* CC: remove temporarily for MT6573 porting */
#if 0
mt6573_aud_init();
// led_init();
#endif
#ifdef CFG_MT6589_FPGA
mtk_timer_init();
#endif
return;
}
void platform_pre_init(void)
{
u32 i2c_ret, pmic_ret;
u32 pwrap_ret=0,i=0;
int pll_ret;
/* 2012/11/27
* Sten
* Add MT6589 MCI downsizer workaround start*/
*(volatile unsigned int*)(0x10001200) |= (0x1);
/* Add MT6589 MCI downsizer workaround end*/
/* init timer */
mtk_timer_init();
/* init boot time */
g_boot_time = get_timer(0);
#if 0 /* FIXME */
/*
* NoteXXX: CPU 1 may not be reset clearly after power-ON.
* Need to apply a S/W workaround to manualy reset it first.
*/
{
U32 val;
val = DRV_Reg32(0xC0009010);
DRV_WriteReg32(0xC0009010, val | 0x2);
gpt_busy_wait_us(10);
DRV_WriteReg32(0xC0009010, val & ~0x2);
gpt_busy_wait_us(10);
}
#ifndef SLT_BOOTLOADER
/* power off cpu1 for power saving */
power_off_cpu1();
#endif
#endif
/* init pll */
pll_ret = mt_pll_init();
/*GPIO init*/
mt_gpio_init();
/* init uart baudrate when pll on */
mtk_uart_init(UART_SRC_CLK_FRQ, CFG_LOG_BAUDRATE);
if (pll_ret != 0)
print("MEMPLL 3PLL mode calibration fail\n");
/* init pmic i2c interface and pmic */
i2c_ret = i2c_v1_init();
//retry 3 times for pmic wrapper init
pwrap_init_preloader();
pmic_ret = pmic6320_init();
//enable long press reboot function***************
#ifndef EVB_PLATFORM
#ifdef KPD_PMIC_LPRST_TD
#ifdef ONEKEY_REBOOT_NORMAL_MODE_PL
pmic_config_interface(TOP_RST_MISC, 0x01, PMIC_RG_PWRKEY_RST_EN_MASK, PMIC_RG_PWRKEY_RST_EN_SHIFT);//pmic_config_interface(TOP_RST_MISC, 0x01, PMIC_RG_PWRKEY_RST_EN_MASK, PMIC_RG_PWRKEY_RST_EN_SHIFT);
pmic_config_interface(GPIO_SMT_CON3,0x01, PMIC_RG_HOMEKEY_PUEN_MASK, PMIC_RG_HOMEKEY_PUEN_SHIFT);//pull up homekey pin of PMIC for 89 project
pmic_config_interface(TOP_RST_MISC, (U32)KPD_PMIC_LPRST_TD, PMIC_RG_PWRKEY_RST_TD_MASK, PMIC_RG_PWRKEY_RST_TD_SHIFT);
#endif
#ifdef TWOKEY_REBOOT_NORMAL_MODE_PL
pmic_config_interface(TOP_RST_MISC, 0x01, PMIC_RG_PWRKEY_RST_EN_MASK, PMIC_RG_PWRKEY_RST_EN_SHIFT);//pmic package function for long press reboot function setting//
pmic_config_interface(TOP_RST_MISC, 0x01, PMIC_RG_HOMEKEY_RST_EN_MASK, PMIC_RG_HOMEKEY_RST_EN_SHIFT);;//pmic_config_interface(TOP_RST_MISC, 0x01, PMIC_RG_HOMEKEY_RST_EN_MASK, PMIC_RG_HOMEKEY_RST_EN_SHIFT);
pmic_config_interface(GPIO_SMT_CON3,0x01, PMIC_RG_HOMEKEY_PUEN_MASK, PMIC_RG_HOMEKEY_PUEN_SHIFT);//pull up homekey pin of PMIC for 89 project
pmic_config_interface(TOP_RST_MISC, (U32)KPD_PMIC_LPRST_TD, PMIC_RG_PWRKEY_RST_TD_MASK, PMIC_RG_PWRKEY_RST_TD_SHIFT);
#endif
#endif
#endif
//************************************************
print("%s Init I2C: %s(%d)\n", MOD, i2c_ret ? "FAIL" : "OK", i2c_ret);
print("%s Init PWRAP: %s(%d)\n", MOD, pwrap_ret ? "FAIL" : "OK", pwrap_ret);
print("%s Init PMIC: %s(%d)\n", MOD, pmic_ret ? "FAIL" : "OK", pmic_ret);
print("%s chip[%x]\n", MOD, platform_chip_ver());
}
void platform_pre_init(void)
{
u32 ret;
u32 pmic_ret;
u32 pwrap_ret,i;
#ifdef PL_PROFILING
u32 profiling_time;
profiling_time = 0;
#endif
pwrap_ret = 0;
i = 0;
ret = 0;
/* init timer */
mtk_timer_init();
/* init boot time */
g_boot_time = get_timer(0);
#if 0 /* FIXME */
/*
* NoteXXX: CPU 1 may not be reset clearly after power-ON.
* Need to apply a S/W workaround to manualy reset it first.
*/
{
U32 val;
val = DRV_Reg32(0xC0009010);
DRV_WriteReg32(0xC0009010, val | 0x2);
gpt_busy_wait_us(10);
DRV_WriteReg32(0xC0009010, val & ~0x2);
gpt_busy_wait_us(10);
}
#ifndef SLT_BOOTLOADER
/* power off cpu1 for power saving */
power_off_cpu1();
#endif
#endif
ptp_init1();
/* move pll code to audio_sys_ram */
memcpy((char *)&Image$$PLL_INIT$$Base, &__load_start_pll_text,
&__load_stop_pll_text - &__load_start_pll_text);
/* init pll */
/* for memory preserved mode */
// do not init pll/emi in memory preserved mode, due to code is located in EMI
// set all pll except EMI
mtk_pll_init();
/*GPIO init*/
#if (!(CFG_FPGA_PLATFORM)) && defined(DUMMY_AP_BOOTLOADER)
mt_gpio_set_default();
#endif
//set UART1 GPIO to mode1, AP
mt_gpio_init_post(0);
/* init uart baudrate when pll on */
mtk_uart_init(UART_SRC_CLK_FRQ, CFG_LOG_BAUDRATE);
/* init pmic i2c interface and pmic */
/* no need in MT6572*/
//i2c_ret = i2c_v1_init();
//retry 3 times for pmic wrapper init
#ifdef PL_PROFILING
profiling_time = get_timer(0);
#endif
pwrap_init_preloader();
/* check is uart cable in*/
#if (CFG_USB_UART_SWITCH)
platform_vusb_on();
if (is_uart_cable_inserted()) {
print("\n%s Switch to UART Mode\n", MOD);
mt_usb_set_to_uart_mode();
} else {
print("\n%s Keep stay in USB Mode\n", MOD);
}
#endif
if (platform_sram_repair_enable_check())
{
//MM SRAM Repair
ret = MFG_MM_SRAM_repair();
if (ret < 0 )
printf("MFG_MM_SRAM_repair fail\n");
else
printf("MFG_MM_SRAM_repair OK\n");
}
#ifdef PL_PROFILING
printf("#T#pwrap_init=%d\n", get_timer(profiling_time));
profiling_time = get_timer(0); //for next
#endif
pmic_ret = pmic_init();
//enable long press reboot function***************
#ifndef CFG_EVB_PLATFORM
#ifdef KPD_PMIC_LPRST_TD
#ifdef ONEKEY_REBOOT_NORMAL_MODE_PL
printf("ONEKEY_REBOOT_NORMAL_MODE_PL OK\n");
pmic_config_interface(TOP_RST_MISC, 0x01, PMIC_RG_PWRKEY_RST_EN_MASK, PMIC_RG_PWRKEY_RST_EN_SHIFT);//pmic_config_interface(TOP_RST_MISC, 0x01, PMIC_RG_PWRKEY_RST_EN_MASK, PMIC_RG_PWRKEY_RST_EN_SHIFT);
pmic_config_interface(TOP_RST_MISC, (U32)KPD_PMIC_LPRST_TD, PMIC_RG_PWRKEY_RST_TD_MASK, PMIC_RG_PWRKEY_RST_TD_SHIFT);
#endif
#endif
#endif
//************************************************
#ifdef PL_PROFILING
printf("#T#pmic_init=%d\n", get_timer(profiling_time));
#endif
print("%s Init PWRAP: %s(%d)\n", MOD, pwrap_ret ? "FAIL" : "OK", pwrap_ret);
print("%s Init PMIC: %s(%d)\n", MOD, pmic_ret ? "FAIL" : "OK", pmic_ret);
print("%s chip[%x]\n", MOD, platform_chip_ver());
}
