static void mv88e6xxx_stats_read(struct dsa_switch *ds, int stat, u32 *val) { u32 _val; int ret; *val = 0; ret = mv88e6xxx_reg_write(ds, REG_GLOBAL, 0x1d, 0xcc00 | stat); if (ret < 0) return; ret = mv88e6xxx_stats_wait(ds); if (ret < 0) return; ret = mv88e6xxx_reg_read(ds, REG_GLOBAL, 0x1e); if (ret < 0) return; _val = ret << 16; ret = mv88e6xxx_reg_read(ds, REG_GLOBAL, 0x1f); if (ret < 0) return; *val = _val | ret; }
static void mv88e6xxx_stats_read(struct dsa_switch *ds, int stat, u32 *val) { u32 _val; int ret; *val = 0; ret = mv88e6xxx_reg_write(ds, REG_GLOBAL, GLOBAL_STATS_OP, GLOBAL_STATS_OP_READ_CAPTURED | GLOBAL_STATS_OP_HIST_RX_TX | stat); if (ret < 0) return; ret = mv88e6xxx_stats_wait(ds); if (ret < 0) return; ret = mv88e6xxx_reg_read(ds, REG_GLOBAL, GLOBAL_STATS_COUNTER_32); if (ret < 0) return; _val = ret << 16; ret = mv88e6xxx_reg_read(ds, REG_GLOBAL, GLOBAL_STATS_COUNTER_01); if (ret < 0) return; *val = _val | ret; }
static int mv88e6xxx_stats_snapshot(struct dsa_switch *ds, int port) { int ret; REG_WRITE(REG_GLOBAL, 0x1d, 0xdc00 | port); ret = mv88e6xxx_stats_wait(ds); if (ret < 0) return ret; return 0; }
static int mv88e6xxx_stats_snapshot(struct dsa_switch *ds, int port) { int ret; /* Snapshot the hardware statistics counters for this port. */ REG_WRITE(REG_GLOBAL, 0x1d, 0xdc00 | port); /* Wait for the snapshotting to complete. */ ret = mv88e6xxx_stats_wait(ds); if (ret < 0) return ret; return 0; }
static int mv88e6xxx_stats_snapshot(struct dsa_switch *ds, int port) { int ret; if (mv88e6xxx_6352_family(ds)) port = (port + 1) << 5; /* Snapshot the hardware statistics counters for this port. */ REG_WRITE(REG_GLOBAL, GLOBAL_STATS_OP, GLOBAL_STATS_OP_CAPTURE_PORT | GLOBAL_STATS_OP_HIST_RX_TX | port); /* Wait for the snapshotting to complete. */ ret = mv88e6xxx_stats_wait(ds); if (ret < 0) return ret; return 0; }