static void __init mx53_loco_board_init(void)
{
mx53_loco_io_init();
imx53_add_imx_uart(0, NULL);
mx53_loco_fec_reset();
imx53_add_fec(&mx53_loco_fec_data);
mxc_register_device(&mxc_pm_device, &loco_pm_data);
imx53_add_ipuv3(&ipu_data);
imx53_add_vpu();
imx53_add_ldb(&ldb_data);
imx53_add_tve(&tve_data);
imx53_add_v4l2_output(0);
imx53_add_mxc_pwm(1);
imx53_add_mxc_pwm_backlight(0, &loco_pwm_backlight_data);
imx53_add_imx2_wdt(0, NULL);
imx53_add_srtc();
imx53_add_dvfs_core(&loco_dvfs_core_data);
imx53_add_busfreq(&loco_bus_freq_data);
imx53_add_imx_i2c(0, &mx53_loco_i2c_data);
imx53_add_imx_i2c(1, &mx53_loco_i2c_data);
mx53_loco_init_da9052();
i2c_register_board_info(0, mxc_i2c0_board_info,
ARRAY_SIZE(mxc_i2c0_board_info));
i2c_register_board_info(1, mxc_i2c1_board_info,
ARRAY_SIZE(mxc_i2c1_board_info));
imx53_add_sdhci_esdhc_imx(0, &mx53_loco_sd1_data);
imx53_add_sdhci_esdhc_imx(2, &mx53_loco_sd3_data);
imx53_add_ahci_imx(0, &sata_data);
imx53_add_iim(&iim_data);
/* USB */
mx5_usb_dr_init();
mx5_set_host1_vbus_func(mx53_loco_usbh1_vbus);
mx5_usbh1_init();
mxc_register_device(&loco_audio_device, &loco_audio_data);
imx53_add_imx_ssi(1, &loco_ssi_pdata);
/*GPU*/
if (mx53_revision() >= IMX_CHIP_REVISION_2_0)
gpu_data.z160_revision = 1;
else
gpu_data.z160_revision = 0;
imx53_add_mxc_gpu(&gpu_data);
imx_add_gpio_keys(&loco_button_data);
/* this call required to release SCC RAM partition held by ROM
* during boot, even if SCC2 driver is not part of the image
*/
imx53_add_mxc_scc2();
pm_power_off = da9053_power_off;
}
void mx53_display_revision(void)
{
int rev;
char *srev;
rev = mx53_revision();
switch (rev) {
case IMX_CHIP_REVISION_1_0:
srev = IMX_CHIP_REVISION_1_0_STRING;
break;
case IMX_CHIP_REVISION_2_0:
srev = IMX_CHIP_REVISION_2_0_STRING;
break;
case IMX_CHIP_REVISION_2_1:
srev = IMX_CHIP_REVISION_2_1_STRING;
break;
default:
srev = IMX_CHIP_REVISION_UNKNOWN_STRING;
}
printk(KERN_INFO "CPU identified as i.MX53, silicon rev %s\n", srev);
}
int __init mx53_clocks_init(unsigned long rate_ckil, unsigned long rate_osc,
unsigned long rate_ckih1, unsigned long rate_ckih2)
{
int i;
unsigned long r;
struct device_node *np;
clk[pll1_sw] = imx_clk_pllv2("pll1_sw", "osc", MX53_DPLL1_BASE);
clk[pll2_sw] = imx_clk_pllv2("pll2_sw", "osc", MX53_DPLL2_BASE);
clk[pll3_sw] = imx_clk_pllv2("pll3_sw", "osc", MX53_DPLL3_BASE);
clk[pll4_sw] = imx_clk_pllv2("pll4_sw", "osc", MX53_DPLL4_BASE);
clk[ldb_di1_div_3_5] = imx_clk_fixed_factor("ldb_di1_div_3_5", "ldb_di1_sel", 2, 7);
clk[ldb_di1_div] = imx_clk_divider_flags("ldb_di1_div", "ldb_di1_div_3_5", MXC_CCM_CSCMR2, 11, 1, 0);
clk[ldb_di1_sel] = imx_clk_mux_flags("ldb_di1_sel", MXC_CCM_CSCMR2, 9, 1,
mx53_ldb_di1_sel, ARRAY_SIZE(mx53_ldb_di1_sel), CLK_SET_RATE_PARENT);
clk[di_pll4_podf] = imx_clk_divider("di_pll4_podf", "pll4_sw", MXC_CCM_CDCDR, 16, 3);
clk[ldb_di0_div_3_5] = imx_clk_fixed_factor("ldb_di0_div_3_5", "ldb_di0_sel", 2, 7);
clk[ldb_di0_div] = imx_clk_divider_flags("ldb_di0_div", "ldb_di0_div_3_5", MXC_CCM_CSCMR2, 10, 1, 0);
clk[ldb_di0_sel] = imx_clk_mux_flags("ldb_di0_sel", MXC_CCM_CSCMR2, 8, 1,
mx53_ldb_di0_sel, ARRAY_SIZE(mx53_ldb_di0_sel), CLK_SET_RATE_PARENT);
clk[ldb_di0_gate] = imx_clk_gate2("ldb_di0_gate", "ldb_di0_div", MXC_CCM_CCGR6, 28);
clk[ldb_di1_gate] = imx_clk_gate2("ldb_di1_gate", "ldb_di1_div", MXC_CCM_CCGR6, 30);
clk[ipu_di0_sel] = imx_clk_mux("ipu_di0_sel", MXC_CCM_CSCMR2, 26, 3,
mx53_ipu_di0_sel, ARRAY_SIZE(mx53_ipu_di0_sel));
clk[ipu_di1_sel] = imx_clk_mux("ipu_di1_sel", MXC_CCM_CSCMR2, 29, 3,
mx53_ipu_di1_sel, ARRAY_SIZE(mx53_ipu_di1_sel));
clk[tve_ext_sel] = imx_clk_mux_flags("tve_ext_sel", MXC_CCM_CSCMR1, 6, 1,
mx53_tve_ext_sel, ARRAY_SIZE(mx53_tve_ext_sel), CLK_SET_RATE_PARENT);
clk[tve_gate] = imx_clk_gate2("tve_gate", "tve_pred", MXC_CCM_CCGR2, 30);
clk[tve_pred] = imx_clk_divider("tve_pred", "tve_ext_sel", MXC_CCM_CDCDR, 28, 3);
clk[esdhc1_per_gate] = imx_clk_gate2("esdhc1_per_gate", "esdhc_a_podf", MXC_CCM_CCGR3, 2);
clk[esdhc2_per_gate] = imx_clk_gate2("esdhc2_per_gate", "esdhc_c_sel", MXC_CCM_CCGR3, 6);
clk[esdhc3_per_gate] = imx_clk_gate2("esdhc3_per_gate", "esdhc_b_podf", MXC_CCM_CCGR3, 10);
clk[esdhc4_per_gate] = imx_clk_gate2("esdhc4_per_gate", "esdhc_d_sel", MXC_CCM_CCGR3, 14);
clk[usb_phy1_gate] = imx_clk_gate2("usb_phy1_gate", "usb_phy_sel", MXC_CCM_CCGR4, 10);
clk[usb_phy2_gate] = imx_clk_gate2("usb_phy2_gate", "usb_phy_sel", MXC_CCM_CCGR4, 12);
clk[can_sel] = imx_clk_mux("can_sel", MXC_CCM_CSCMR2, 6, 2,
mx53_can_sel, ARRAY_SIZE(mx53_can_sel));
clk[can1_serial_gate] = imx_clk_gate2("can1_serial_gate", "can_sel", MXC_CCM_CCGR6, 22);
clk[can1_ipg_gate] = imx_clk_gate2("can1_ipg_gate", "ipg", MXC_CCM_CCGR6, 20);
clk[can2_serial_gate] = imx_clk_gate2("can2_serial_gate", "can_sel", MXC_CCM_CCGR4, 8);
clk[can2_ipg_gate] = imx_clk_gate2("can2_ipg_gate", "ipg", MXC_CCM_CCGR4, 6);
clk[i2c3_gate] = imx_clk_gate2("i2c3_gate", "per_root", MXC_CCM_CCGR1, 22);
clk[sata_gate] = imx_clk_gate2("sata_gate", "ipg", MXC_CCM_CCGR4, 2);
clk[cko1_sel] = imx_clk_mux("cko1_sel", MXC_CCM_CCOSR, 0, 4,
mx53_cko1_sel, ARRAY_SIZE(mx53_cko1_sel));
clk[cko1_podf] = imx_clk_divider("cko1_podf", "cko1_sel", MXC_CCM_CCOSR, 4, 3);
clk[cko1] = imx_clk_gate2("cko1", "cko1_podf", MXC_CCM_CCOSR, 7);
clk[cko2_sel] = imx_clk_mux("cko2_sel", MXC_CCM_CCOSR, 16, 5,
mx53_cko2_sel, ARRAY_SIZE(mx53_cko2_sel));
clk[cko2_podf] = imx_clk_divider("cko2_podf", "cko2_sel", MXC_CCM_CCOSR, 21, 3);
clk[cko2] = imx_clk_gate2("cko2", "cko2_podf", MXC_CCM_CCOSR, 24);
clk[spdif_xtal_sel] = imx_clk_mux("spdif_xtal_sel", MXC_CCM_CSCMR1, 2, 2,
mx53_spdif_xtal_sel, ARRAY_SIZE(mx53_spdif_xtal_sel));
for (i = 0; i < ARRAY_SIZE(clk); i++)
if (IS_ERR(clk[i]))
pr_err("i.MX53 clk %d: register failed with %ld\n",
i, PTR_ERR(clk[i]));
np = of_find_compatible_node(NULL, NULL, "fsl,imx53-ccm");
clk_data.clks = clk;
clk_data.clk_num = ARRAY_SIZE(clk);
of_clk_add_provider(np, of_clk_src_onecell_get, &clk_data);
mx5_clocks_common_init(rate_ckil, rate_osc, rate_ckih1, rate_ckih2);
clk_register_clkdev(clk[vpu_gate], NULL, "imx53-vpu.0");
clk_register_clkdev(clk[i2c3_gate], NULL, "imx21-i2c.2");
clk_register_clkdev(clk[fec_gate], NULL, "imx25-fec.0");
clk_register_clkdev(clk[usb_phy1_gate], "usb_phy1", "mxc-ehci.0");
clk_register_clkdev(clk[esdhc1_ipg_gate], "ipg", "sdhci-esdhc-imx53.0");
clk_register_clkdev(clk[dummy], "ahb", "sdhci-esdhc-imx53.0");
clk_register_clkdev(clk[esdhc1_per_gate], "per", "sdhci-esdhc-imx53.0");
clk_register_clkdev(clk[esdhc2_ipg_gate], "ipg", "sdhci-esdhc-imx53.1");
clk_register_clkdev(clk[dummy], "ahb", "sdhci-esdhc-imx53.1");
clk_register_clkdev(clk[esdhc2_per_gate], "per", "sdhci-esdhc-imx53.1");
clk_register_clkdev(clk[esdhc3_ipg_gate], "ipg", "sdhci-esdhc-imx53.2");
clk_register_clkdev(clk[dummy], "ahb", "sdhci-esdhc-imx53.2");
clk_register_clkdev(clk[esdhc3_per_gate], "per", "sdhci-esdhc-imx53.2");
clk_register_clkdev(clk[esdhc4_ipg_gate], "ipg", "sdhci-esdhc-imx53.3");
clk_register_clkdev(clk[dummy], "ahb", "sdhci-esdhc-imx53.3");
clk_register_clkdev(clk[esdhc4_per_gate], "per", "sdhci-esdhc-imx53.3");
/* set SDHC root clock to 200MHZ*/
clk_set_rate(clk[esdhc_a_podf], 200000000);
clk_set_rate(clk[esdhc_b_podf], 200000000);
/* System timer */
mxc_timer_init(MX53_IO_ADDRESS(MX53_GPT1_BASE_ADDR), MX53_INT_GPT);
clk_prepare_enable(clk[iim_gate]);
imx_print_silicon_rev("i.MX53", mx53_revision());
clk_disable_unprepare(clk[iim_gate]);
r = clk_round_rate(clk[usboh3_per_gate], 54000000);
clk_set_rate(clk[usboh3_per_gate], r);
return 0;
}
/*!
* Board specific initialization.
*/
static void __init mxc_board_init(void)
{
mxc_ipu_data.di_clk[0] = clk_get(NULL, "ipu_di0_clk");
mxc_ipu_data.di_clk[1] = clk_get(NULL, "ipu_di1_clk");
mxc_ipu_data.csi_clk[0] = clk_get(NULL, "ssi_ext1_clk");
mxc_spdif_data.spdif_core_clk = clk_get(NULL, "spdif_xtal_clk");
clk_put(mxc_spdif_data.spdif_core_clk);
spdif_audio_data.ext_ram_clk = clk_get(NULL, "emi_fast_clk");
clk_put(spdif_audio_data.ext_ram_clk);
/* SD card detect irqs */
if (board_is_mx53_arm2()) {
mxcsdhc1_device.resource[2].start = gpio_to_irq(ARM2_SD1_CD);
mxcsdhc1_device.resource[2].end = gpio_to_irq(ARM2_SD1_CD);
mmc3_data.card_inserted_state = 1;
mmc3_data.status = NULL;
mmc3_data.wp_status = NULL;
mmc1_data.wp_status = NULL;
} else {
mxcsdhc3_device.resource[2].start = gpio_to_irq(EVK_SD3_CD);
mxcsdhc3_device.resource[2].end = gpio_to_irq(EVK_SD3_CD);
mxcsdhc1_device.resource[2].start = gpio_to_irq(EVK_SD1_CD);
mxcsdhc1_device.resource[2].end = gpio_to_irq(EVK_SD1_CD);
}
mxc_cpu_common_init();
mx53_evk_io_init();
mxc_register_device(&mxc_dma_device, NULL);
mxc_register_device(&mxc_wdt_device, NULL);
mxc_register_device(&mxcspi1_device, &mxcspi1_data);
mxc_register_device(&mxci2c_devices[0], &mxci2c_data);
mxc_register_device(&mxci2c_devices[1], &mxci2c_data);
mxc_register_device(&mxci2c_devices[2], &mxci2c_data);
mxc_register_device(&mxc_rtc_device, NULL);
mxc_register_device(&mxc_w1_master_device, &mxc_w1_data);
mxc_register_device(&mxc_ipu_device, &mxc_ipu_data);
mxc_register_device(&mxc_ldb_device, &ldb_data);
mxc_register_device(&mxc_tve_device, &tve_data);
if (!mxc_fuse_get_vpu_status())
mxc_register_device(&mxcvpu_device, &mxc_vpu_data);
if (!mxc_fuse_get_gpu_status())
mxc_register_device(&gpu_device, &gpu_data);
mxc_register_device(&mxcscc_device, NULL);
/*
mxc_register_device(&mx53_lpmode_device, NULL);
mxc_register_device(&sdram_autogating_device, NULL);
*/
mxc_register_device(&mxc_dvfs_core_device, &dvfs_core_data);
mxc_register_device(&busfreq_device, &bus_freq_data);
/*
mxc_register_device(&mxc_dvfs_per_device, &dvfs_per_data);
*/
mxc_register_device(&mxc_iim_device, &iim_data);
if (!board_is_mx53_arm2()) {
mxc_register_device(&mxc_pwm2_device, NULL);
mxc_register_device(&mxc_pwm1_backlight_device,
&mxc_pwm_backlight_data);
}
mxc_register_device(&mxc_flexcan0_device, &flexcan0_data);
mxc_register_device(&mxc_flexcan1_device, &flexcan1_data);
/* mxc_register_device(&mxc_keypad_device, &keypad_plat_data); */
mxc_register_device(&mxcsdhc1_device, &mmc1_data);
mxc_register_device(&mxcsdhc3_device, &mmc3_data);
mxc_register_device(&mxc_ssi1_device, NULL);
mxc_register_device(&mxc_ssi2_device, NULL);
mxc_register_device(&ahci_fsl_device, &sata_data);
/* ASRC is only available for MX53 TO2.0 */
if (mx53_revision() >= IMX_CHIP_REVISION_2_0) {
mxc_asrc_data.asrc_core_clk = clk_get(NULL, "asrc_clk");
clk_put(mxc_asrc_data.asrc_core_clk);
mxc_asrc_data.asrc_audio_clk = clk_get(NULL, "asrc_serial_clk");
clk_put(mxc_asrc_data.asrc_audio_clk);
mxc_register_device(&mxc_asrc_device, &mxc_asrc_data);
}
mxc_register_device(&mxc_alsa_spdif_device, &mxc_spdif_data);
if (!mxc_apc_on) {
mxc_register_device(&mxc_fec_device, &fec_data);
mxc_register_device(&mxc_ptp_device, NULL);
}
spi_register_board_info(mxc_dataflash_device,
ARRAY_SIZE(mxc_dataflash_device));
i2c_register_board_info(0, mxc_i2c0_board_info,
ARRAY_SIZE(mxc_i2c0_board_info));
i2c_register_board_info(1, mxc_i2c1_board_info,
ARRAY_SIZE(mxc_i2c1_board_info));
mx53_evk_init_mc13892();
/*
pm_power_off = mxc_power_off;
*/
sgtl5000_data.ext_ram_clk = clk_get(NULL, "emi_fast_clk");
clk_put(sgtl5000_data.ext_ram_clk);
mxc_surround_audio_data.ext_ram_clk = clk_get(NULL, "emi_fast_clk");
clk_put(mxc_surround_audio_data.ext_ram_clk);
mxc_register_device(&mxc_sgtl5000_device, &sgtl5000_data);
mxc_register_device(&mxc_spdif_audio_device, &spdif_audio_data);
mxc_register_device(&mxc_mlb_device, &mlb_data);
mxc_register_device(&mxc_powerkey_device, &pwrkey_data);
mx5_set_otghost_vbus_func(mx53_gpio_usbotg_driver_vbus);
mx5_usb_dr_init();
mx5_set_host1_vbus_func(mx53_gpio_host1_driver_vbus);
mx5_usbh1_init();
mxc_register_device(&mxc_nandv2_mtd_device, &mxc_nand_data);
if (mxc_apc_on) {
mxc_register_device(&mxc_esai_device, &esai_data);
mxc_register_device(&mxc_alsa_surround_device,
&mxc_surround_audio_data);
}
mxc_register_device(&mxc_v4l2_device, NULL);
mxc_register_device(&mxc_v4l2out_device, NULL);
}
/* set cpu low power mode before WFI instruction */
void mxc_cpu_lp_set(enum mxc_cpu_pwr_mode mode)
{
u32 plat_lpc, arm_srpgcr, ccm_clpcr;
u32 empgc0 = 0;
u32 empgc1 = 0;
int stop_mode = 0;
/* always allow platform to issue a deep sleep mode request */
plat_lpc = __raw_readl(arm_plat_base + MXC_CORTEXA8_PLAT_LPC) &
~(MXC_CORTEXA8_PLAT_LPC_DSM);
ccm_clpcr = __raw_readl(MXC_CCM_CLPCR) & ~(MXC_CCM_CLPCR_LPM_MASK);
arm_srpgcr = __raw_readl(MXC_SRPG_ARM_SRPGCR) & ~(MXC_SRPGCR_PCR);
if (!cpu_is_mx53()) {
empgc0 = __raw_readl(MXC_SRPG_EMPGC0_SRPGCR) & ~(MXC_SRPGCR_PCR);
empgc1 = __raw_readl(MXC_SRPG_EMPGC1_SRPGCR) & ~(MXC_SRPGCR_PCR);
}
switch (mode) {
case WAIT_CLOCKED:
break;
case WAIT_UNCLOCKED:
ccm_clpcr |= (0x1 << MXC_CCM_CLPCR_LPM_OFFSET);
break;
case WAIT_UNCLOCKED_POWER_OFF:
case STOP_POWER_OFF:
plat_lpc |= MXC_CORTEXA8_PLAT_LPC_DSM
| MXC_CORTEXA8_PLAT_LPC_DBG_DSM;
if (mode == WAIT_UNCLOCKED_POWER_OFF) {
ccm_clpcr |= (0x1 << MXC_CCM_CLPCR_LPM_OFFSET);
ccm_clpcr &= ~MXC_CCM_CLPCR_VSTBY;
ccm_clpcr &= ~MXC_CCM_CLPCR_SBYOS;
stop_mode = 0;
} else {
ccm_clpcr |= (0x2 << MXC_CCM_CLPCR_LPM_OFFSET);
ccm_clpcr |= (0x3 << MXC_CCM_CLPCR_STBY_COUNT_OFFSET);
ccm_clpcr |= MXC_CCM_CLPCR_VSTBY;
ccm_clpcr |= MXC_CCM_CLPCR_SBYOS;
stop_mode = 1;
}
arm_srpgcr |= MXC_SRPGCR_PCR;
if (stop_mode && !cpu_is_mx53()) {
empgc0 |= MXC_SRPGCR_PCR;
empgc1 |= MXC_SRPGCR_PCR;
}
if (tzic_enable_wake(1) != 0)
return;
break;
case STOP_POWER_ON:
ccm_clpcr |= (0x2 << MXC_CCM_CLPCR_LPM_OFFSET);
break;
default:
printk(KERN_WARNING "UNKNOWN cpu power mode: %d\n", mode);
return;
}
__raw_writel(plat_lpc, arm_plat_base + MXC_CORTEXA8_PLAT_LPC);
__raw_writel(ccm_clpcr, MXC_CCM_CLPCR);
if (cpu_is_mx51() || (mx53_revision() >= IMX_CHIP_REVISION_2_0)
|| (mx50_revision() >= IMX_CHIP_REVISION_1_1))
__raw_writel(arm_srpgcr, MXC_SRPG_ARM_SRPGCR);
/* Enable NEON SRPG for all but MX50TO1.0. */
if (!(mx50_revision() == IMX_CHIP_REVISION_1_0))
__raw_writel(arm_srpgcr, MXC_SRPG_NEON_SRPGCR);
if (stop_mode && !cpu_is_mx53()) {
__raw_writel(empgc0, MXC_SRPG_EMPGC0_SRPGCR);
__raw_writel(empgc1, MXC_SRPG_EMPGC1_SRPGCR);
}
}
/*!
* Board specific initialization.
*/
static void __init mxc_board_init(void)
{
mxc_ipu_data.di_clk[0] = clk_get(NULL, "ipu_di0_clk");
mxc_ipu_data.di_clk[1] = clk_get(NULL, "ipu_di1_clk");
mxc_ipu_data.csi_clk[0] = clk_get(NULL, "ssi_ext1_clk");
mxc_spdif_data.spdif_core_clk = clk_get(NULL, "spdif_xtal_clk");
clk_put(mxc_spdif_data.spdif_core_clk);
spdif_audio_data.ext_ram_clk = clk_get(NULL, "emi_fast_clk");
clk_put(spdif_audio_data.ext_ram_clk);
mxc_surround_audio_data.ext_ram_clk = clk_get(NULL, "emi_fast_clk");
clk_put(mxc_surround_audio_data.ext_ram_clk);
mxcsdhc2_device.resource[2].start = gpio_to_irq(ARD_SD2_CD);
mxcsdhc2_device.resource[2].end = gpio_to_irq(ARD_SD2_CD);
mxcsdhc1_device.resource[2].start = gpio_to_irq(ARD_SD1_CD);
mxcsdhc1_device.resource[2].end = gpio_to_irq(ARD_SD1_CD);
mxc_cpu_common_init();
mx53_ard_io_init();
weim_cs_config();
mxc_read_mac_iim();
mxc_register_device(&ard_smsc_lan9220_device, &ard_smsc911x_config);
mxc_register_device(&mxc_dma_device, NULL);
mxc_register_device(&mxc_wdt_device, NULL);
mxc_register_device(&mxcspi1_device, &mxcspi1_data);
mxc_register_device(&mxci2c_devices[1], &mxci2c1_data);
mxc_register_device(&mxci2c_devices[2], &mxci2c2_data);
mxc_register_device(&mxc_rtc_device, NULL);
mxc_register_device(&mxc_ipu_device, &mxc_ipu_data);
mxc_register_device(&mxc_ldb_device, &ldb_data);
mxc_register_device(&mxc_tve_device, &tve_data);
if (!mxc_fuse_get_vpu_status())
mxc_register_device(&mxcvpu_device, &mxc_vpu_data);
if (!mxc_fuse_get_gpu_status())
mxc_register_device(&gpu_device, &gpu_data);
mxc_register_device(&mxcscc_device, NULL);
mxc_register_device(&mxc_dvfs_core_device, &dvfs_core_data);
mxc_register_device(&busfreq_device, &bus_freq_data);
mxc_register_device(&mxc_iim_device, &iim_data);
mxc_register_device(&mxc_pwm1_device, &mxc_pwm1_platform_data);
/* Rev B boards use a different LVDS Panel */
if (board_is_mx53_ard_b()) {
mxc_pwm1_backlight_data.pwm_period_ns = 50000;
}
mxc_register_device(&mxc_pwm1_backlight_device,
&mxc_pwm1_backlight_data);
mxc_register_device(&mxc_pwm2_device, &mxc_pwm2_platform_data);
/* Rev B boards use a different LVDS Panel */
if (board_is_mx53_ard_b()) {
mxc_pwm2_backlight_data.pwm_period_ns = 50000;
}
mxc_register_device(&mxc_pwm2_backlight_device,
&mxc_pwm2_backlight_data);
mxc_register_device(&mxc_flexcan0_device, &flexcan0_data);
mxc_register_device(&mxc_flexcan1_device, &flexcan1_data);
mxc_register_device(&mxcsdhc1_device, &mmc1_data);
mxc_register_device(&mxcsdhc2_device, &mmc2_data);
mxc_register_device(&ahci_fsl_device, &sata_data);
mxc_register_device(&imx_ahci_device_hwmon, NULL);
/* ASRC is only available for MX53 TO2.0 */
if (mx53_revision() >= IMX_CHIP_REVISION_2_0) {
mxc_asrc_data.asrc_core_clk = clk_get(NULL, "asrc_clk");
clk_put(mxc_asrc_data.asrc_core_clk);
mxc_asrc_data.asrc_audio_clk = clk_get(NULL, "asrc_serial_clk");
clk_put(mxc_asrc_data.asrc_audio_clk);
mxc_register_device(&mxc_asrc_device, &mxc_asrc_data);
}
mxc_register_device(&mxc_spdif_audio_device, &spdif_audio_data);
mxc_register_device(&mxc_alsa_spdif_device, &mxc_spdif_data);
spi_register_board_info(mxc_dataflash_device,
ARRAY_SIZE(mxc_dataflash_device));
i2c_register_board_info(1, mxc_i2c1_board_info,
ARRAY_SIZE(mxc_i2c1_board_info));
/* Rev B boards use a different touchscreen */
if (board_is_mx53_ard_b()) {
strcpy(mxc_i2c2_board_info[0].type, "p1003_fwv33");
mxc_i2c2_board_info[0].addr = 0x41;
mxc_i2c2_board_info[0].platform_data = &p1003_ts_data;
}
i2c_register_board_info(2, mxc_i2c2_board_info,
ARRAY_SIZE(mxc_i2c2_board_info));
mxc_register_device(&mxc_mlb_device, &mlb_data);
mx5_set_otghost_vbus_func(mx53_ard_usbotg_driver_vbus);
mx5_usb_dr_init();
mx5_set_host1_vbus_func(mx53_ard_host1_driver_vbus);
mx5_usbh1_init();
mx5_usbh2_init();
mxc_register_device(&mxc_nandv2_mtd_device, &mxc_nand_data);
mxc_register_device(&mxc_esai_device, &esai_data);
mxc_register_device(&mxc_alsa_surround_device,
&mxc_surround_audio_data);
mxc_register_device(&mxc_v4l2out_device, NULL);
mxc_register_device(&mxc_v4l2_device, NULL);
}
/*!
* Board specific initialization.
*/
static void __init mxc_board_init(void)
{
mxc_ipu_data.di_clk[0] = clk_get(NULL, "ipu_di0_clk");
mxc_ipu_data.di_clk[1] = clk_get(NULL, "ipu_di1_clk");
mxc_ipu_data.csi_clk[0] = clk_get(NULL, "ssi_ext1_clk");
mxc_spdif_data.spdif_core_clk = clk_get(NULL, "spdif_xtal_clk");
clk_put(mxc_spdif_data.spdif_core_clk);
mxcsdhc1_device.resource[2].start = gpio_to_irq(MX53_SMD_SD1_CD);
mxcsdhc1_device.resource[2].end = gpio_to_irq(MX53_SMD_SD1_CD);
mxc_cpu_common_init();
mx53_smd_io_init();
/* power off by sending shutdown command to da9053*/
pm_power_off = wm831x_poweroff_system;
mxc_register_device(&mxc_dma_device, NULL);
mxc_register_device(&mxc_wdt_device, NULL);
mxc_register_device(&mxcspi1_device, &mxcspi1_data);
mxc_register_device(&mxci2c_devices[0], &mxci2c_data);
mxc_register_device(&mxci2c_devices[1], &mxci2c_data);
mxc_register_device(&mxci2c_devices[2], &mxci2c_data);
mx53_smd_init_wm8325();
mxc_register_device(&mxc_rtc_device, NULL);
mxc_register_device(&mxc_ipu_device, &mxc_ipu_data);
mxc_register_device(&mxc_ldb_device, &ldb_data);
mxc_register_device(&mxc_tve_device, &tve_data);
mxc_register_device(&mxcvpu_device, &mxc_vpu_data);
mxc_register_device(&gpu_device, &gpu_data);
mxc_register_device(&mxcscc_device, NULL);
mxc_register_device(&mxc_dvfs_core_device, &dvfs_core_data);
mxc_register_device(&busfreq_device, &bus_freq_data);
mxc_register_device(&mxc_iim_device, &iim_data);
mxc_register_device(&mxc_pwm1_device, &mxc_pwm1_platform_data);
mxc_register_device(&mxc_pwm2_device, NULL);
mxc_register_device(&mxc_pwm1_backlight_device, &mxc_pwm_backlight_data);
/* Register mmc3(eMMC) first, make it's device number be 0 to
* avoid device number change by hotplug in SD(mmc1) card */
mxc_register_device(&mxcsdhc3_device, &mmc3_data);
mxc_register_device(&mxcsdhc1_device, &mmc1_data);
mxc_register_device(&mxcsdhc2_device, &mmc2_data);
mxc_register_device(&mxc_ssi1_device, NULL);
mxc_register_device(&mxc_ssi2_device, NULL);
mxc_register_device(&mxc_alsa_spdif_device, &mxc_spdif_data);
mxc_register_device(&mxc_android_pmem_device, &android_pmem_data);
mxc_register_device(&mxc_android_pmem_gpu_device,
&android_pmem_gpu_data);
mxc_register_device(&usb_mass_storage_device, &mass_storage_data);
mxc_register_device(&usb_rndis_device, &rndis_data);
mxc_register_device(&android_usb_device, &android_usb_data);
mxc_register_device(&ahci_fsl_device, &sata_data);
/* AHCI SATA PWR EN(DCDC_5V, DCDC_3V3_BB) on SATA bus */
gpio_request(MX53_SMD_SATA_PWR_EN, "sata-pwr-en");
gpio_direction_output(MX53_SMD_SATA_PWR_EN, 1);
mxc_register_device(&mxc_fec_device, &fec_data);
mxc_register_device(&mxc_ptp_device, NULL);
/* ASRC is only available for MX53 TO2.0 */
if (mx53_revision() >= IMX_CHIP_REVISION_2_0) {
mxc_asrc_data.asrc_core_clk = clk_get(NULL, "asrc_clk");
clk_put(mxc_asrc_data.asrc_core_clk);
mxc_asrc_data.asrc_audio_clk = clk_get(NULL, "asrc_serial_clk");
clk_put(mxc_asrc_data.asrc_audio_clk);
mxc_register_device(&mxc_asrc_device, &mxc_asrc_data);
}
spi_device_init();
i2c_register_board_info(1, mxc_i2c1_board_info,
ARRAY_SIZE(mxc_i2c1_board_info));
i2c_register_board_info(2, mxc_i2c2_board_info,
ARRAY_SIZE(mxc_i2c2_board_info));
mxc_register_device(&mxc_rt5621_device, &rt5621_data);
mxc_register_device(&mxc_spdif_audio_device, &spdif_audio_data);
mx5_set_otghost_vbus_func(mx53_gpio_usbotg_driver_vbus);
mx5_usb_dr_init();
mx5_usbh1_init();
mxc_register_device(&mxc_v4l2_device, NULL);
mxc_register_device(&mxc_v4l2out_device, NULL);
mxc_register_device(&mxc_bt_rfkill, &mxc_bt_rfkill_data);
smd_add_device_buttons();
smd_add_device_battery();
}
/*!
* Board specific initialization.
*/
static void __init mxc_board_init(void)
{
iomux_v3_cfg_t mc34708_int = MX53_PAD_CSI0_DAT12__GPIO5_30;
iomux_v3_cfg_t da9052_csi0_d12;
mxc_ipu_data.di_clk[0] = clk_get(NULL, "ipu_di0_clk");
mxc_ipu_data.di_clk[1] = clk_get(NULL, "ipu_di1_clk");
mxc_ipu_data.csi_clk[0] = clk_get(NULL, "ssi_ext1_clk");
mxc_spdif_data.spdif_core_clk = clk_get(NULL, "spdif_xtal_clk");
clk_put(mxc_spdif_data.spdif_core_clk);
mxcsdhc3_device.resource[2].start = gpio_to_irq(SD3_CD);
mxcsdhc3_device.resource[2].end = gpio_to_irq(SD3_CD);
mxc_cpu_common_init();
mx53_loco_io_init();
mxc_register_device(&mxc_dma_device, NULL);
mxc_register_device(&mxc_wdt_device, NULL);
mxc_register_device(&mxci2c_devices[0], &mxci2c_data);
mxc_register_device(&mxci2c_devices[1], &mxci2c_data);
mxc_register_device(&mxci2c_devices[2], &mxci2c_data);
mxc_register_device(&mx5_pmu_device, NULL);
if (board_is_mx53_loco_mc34708()) {
/* set pmic INT gpio pin */
if (board_is_rev(BOARD_REV_2)) {/*Board rev A*/
mc34708_int = MX53_PAD_CSI0_DAT12__GPIO5_30;
mx53_loco_mc34708_irq = MX53_LOCO_MC34708_IRQ_REVA;
} else if (board_is_rev(BOARD_REV_4)) {/*Board rev B*/
mc34708_int = MX53_PAD_CSI0_DAT5__GPIO5_23;
mx53_loco_mc34708_irq = MX53_LOCO_MC34708_IRQ_REVB;
}
mxc_iomux_v3_setup_pad(mc34708_int);
gpio_request(mx53_loco_mc34708_irq, "pmic-int");
gpio_direction_input(mx53_loco_mc34708_irq);
mx53_loco_init_mc34708(mx53_loco_mc34708_irq);
dvfs_core_data.reg_id = "SW1A";
tve_data.dac_reg = "VDAC";
bus_freq_data.gp_reg_id = "SW1A";
bus_freq_data.lp_reg_id = "SW2";
mxc_register_device(&mxc_powerkey_device, &pwrkey_data);
} else {
da9052_csi0_d12 = MX53_PAD_CSI0_DAT12__IPU_CSI0_D_12;
mxc_iomux_v3_setup_pad(da9052_csi0_d12);
mx53_loco_init_da9052();
dvfs_core_data.reg_id = "DA9052_BUCK_CORE";
tve_data.dac_reg = "DA9052_LDO7";
bus_freq_data.gp_reg_id = "DA9052_BUCK_CORE";
bus_freq_data.lp_reg_id = "DA9052_BUCK_PRO";
}
mxc_register_device(&mxc_rtc_device, NULL);
mxc_register_device(&mxc_ipu_device, &mxc_ipu_data);
mxc_register_device(&mxc_ldb_device, &ldb_data);
mxc_register_device(&mxc_tve_device, &tve_data);
if (!mxc_fuse_get_vpu_status())
mxc_register_device(&mxcvpu_device, &mxc_vpu_data);
if (!mxc_fuse_get_gpu_status())
mxc_register_device(&gpu_device, &gpu_data);
mxc_register_device(&mxcscc_device, NULL);
mxc_register_device(&pm_device, &loco_pm_data);
mxc_register_device(&mxc_dvfs_core_device, &dvfs_core_data);
mxc_register_device(&busfreq_device, &bus_freq_data);
mxc_register_device(&mxc_iim_device, &iim_data);
mxc_register_device(&mxc_pwm2_device, NULL);
mxc_register_device(&mxc_pwm1_backlight_device, &mxc_pwm_backlight_data);
mxc_register_device(&mxcsdhc1_device, &mmc1_data);
mxc_register_device(&mxcsdhc3_device, &mmc3_data);
mxc_register_device(&mxc_ssi1_device, NULL);
mxc_register_device(&mxc_ssi2_device, NULL);
mxc_register_device(&mxc_alsa_spdif_device, &mxc_spdif_data);
mxc_register_device(&ahci_fsl_device, &sata_data);
mxc_register_device(&imx_ahci_device_hwmon, NULL);
mxc_register_device(&mxc_fec_device, &fec_data);
mxc_register_device(&mxc_ptp_device, NULL);
/* ASRC is only available for MX53 TO2.0 */
if (mx53_revision() >= IMX_CHIP_REVISION_2_0) {
mxc_asrc_data.asrc_core_clk = clk_get(NULL, "asrc_clk");
clk_put(mxc_asrc_data.asrc_core_clk);
mxc_asrc_data.asrc_audio_clk = clk_get(NULL, "asrc_serial_clk");
clk_put(mxc_asrc_data.asrc_audio_clk);
mxc_register_device(&mxc_asrc_device, &mxc_asrc_data);
}
i2c_register_board_info(0, mxc_i2c0_board_info,
ARRAY_SIZE(mxc_i2c0_board_info));
i2c_register_board_info(1, mxc_i2c1_board_info,
ARRAY_SIZE(mxc_i2c1_board_info));
i2c_register_board_info(2, mxc_i2c2_board_info,
ARRAY_SIZE(mxc_i2c2_board_info));
sgtl5000_data.ext_ram_clk = clk_get(NULL, "emi_fast_clk");
clk_put(sgtl5000_data.ext_ram_clk);
mxc_register_device(&mxc_sgtl5000_device, &sgtl5000_data);
spdif_audio_data.ext_ram_clk = clk_get(NULL, "emi_fast_clk");
clk_put(spdif_audio_data.ext_ram_clk);
mxc_register_device(&mxc_spdif_audio_device, &spdif_audio_data);
mx5_usb_dr_init();
mx5_set_host1_vbus_func(mx53_loco_usbh1_vbus);
mx5_usbh1_init();
mxc_register_device(&mxc_v4l2_device, NULL);
mxc_register_device(&mxc_v4l2out_device, NULL);
loco_add_device_buttons();
pm_power_off = da9053_power_off;
pm_i2c_init(I2C1_BASE_ADDR - MX53_OFFSET);
platform_device_register(&leds_gpio);
}
/*!
* Board specific initialization.
*/
static void __init mxc_board_init(void)
{
mxc_ipu_data.di_clk[0] = clk_get(NULL, "ipu_di0_clk");
mxc_ipu_data.di_clk[1] = clk_get(NULL, "ipu_di1_clk");
mxc_ipu_data.csi_clk[0] = clk_get(NULL, "ssi_ext1_clk");
/*
*ssi_ext1_clk was enbled in arch/arm/mach-mx5/clock.c, and it was kept
*open to provide clock for audio codec on i.Mx53 Quickstart, but MX53
*SMD board have no needs to do that, so we close it here
*/
clk_disable(mxc_ipu_data.csi_clk[0]);
mxc_spdif_data.spdif_core_clk = clk_get(NULL, "spdif_xtal_clk");
clk_put(mxc_spdif_data.spdif_core_clk);
mxcsdhc1_device.resource[2].start = gpio_to_irq(MX53_SMD_SD1_CD);
mxcsdhc1_device.resource[2].end = gpio_to_irq(MX53_SMD_SD1_CD);
mxc_cpu_common_init();
mx53_smd_io_init();
/* power off by sending shutdown command to da9053*/
pm_power_off = da9053_power_off;
mxc_register_device(&mxc_dma_device, NULL);
mxc_register_device(&mxc_wdt_device, NULL);
mxc_register_device(&mxcspi1_device, &mxcspi1_data);
mxc_register_device(&mxci2c_devices[0], &mxci2c_data);
mxc_register_device(&mxci2c_devices[1], &mxci2c_data);
mxc_register_device(&mxci2c_devices[2], &mxci2c_data);
mx53_smd_init_da9052();
mxc_register_device(&mxc_rtc_device, NULL);
mxc_register_device(&mxc_ipu_device, &mxc_ipu_data);
mxc_register_device(&mxc_ldb_device, &ldb_data);
mxc_register_device(&mxc_tve_device, &tve_data);
if (!mxc_fuse_get_vpu_status())
mxc_register_device(&mxcvpu_device, &mxc_vpu_data);
if (!mxc_fuse_get_gpu_status())
mxc_register_device(&gpu_device, &gpu_data);
mxc_register_device(&mxcscc_device, NULL);
mxc_register_device(&pm_device, &smd_pm_data);
mxc_register_device(&mxc_dvfs_core_device, &dvfs_core_data);
mxc_register_device(&busfreq_device, &bus_freq_data);
mxc_register_device(&mxc_iim_device, &iim_data);
mxc_register_device(&mxc_pwm2_device, NULL);
mxc_register_device(&mxc_pwm1_backlight_device, &mxc_pwm_backlight_data);
mxc_register_device(&mxcsdhc1_device, &mmc1_data);
mxc_register_device(&mxcsdhc2_device, &mmc2_data);
mxc_register_device(&mxcsdhc3_device, &mmc3_data);
mxc_register_device(&mxc_ssi1_device, NULL);
mxc_register_device(&mxc_ssi2_device, NULL);
mxc_register_device(&mxc_alsa_spdif_device, &mxc_spdif_data);
mxc_register_device(&ahci_fsl_device, &sata_data);
mxc_register_device(&imx_ahci_device_hwmon, NULL);
/* AHCI SATA PWR EN(DCDC_5V, DCDC_3V3_BB) on SATA bus */
gpio_request(MX53_SMD_SATA_PWR_EN, "sata-pwr-en");
gpio_direction_output(MX53_SMD_SATA_PWR_EN, 1);
mxc_register_device(&mxc_fec_device, &fec_data);
mxc_register_device(&mxc_ptp_device, NULL);
/* ASRC is only available for MX53 TO2.0 */
if (mx53_revision() >= IMX_CHIP_REVISION_2_0) {
mxc_asrc_data.asrc_core_clk = clk_get(NULL, "asrc_clk");
clk_put(mxc_asrc_data.asrc_core_clk);
mxc_asrc_data.asrc_audio_clk = clk_get(NULL, "asrc_serial_clk");
clk_put(mxc_asrc_data.asrc_audio_clk);
mxc_register_device(&mxc_asrc_device, &mxc_asrc_data);
}
spi_device_init();
i2c_register_board_info(0, mxc_i2c0_board_info,
ARRAY_SIZE(mxc_i2c0_board_info));
i2c_register_board_info(1, mxc_i2c1_board_info,
ARRAY_SIZE(mxc_i2c1_board_info));
i2c_register_board_info(2, mxc_i2c2_board_info,
ARRAY_SIZE(mxc_i2c2_board_info));
sgtl5000_data.ext_ram_clk = clk_get(NULL, "emi_fast_clk");
clk_put(sgtl5000_data.ext_ram_clk);
mxc_register_device(&mxc_sgtl5000_device, &sgtl5000_data);
spdif_audio_data.ext_ram_clk = clk_get(NULL, "emi_fast_clk");
clk_put(spdif_audio_data.ext_ram_clk);
mxc_register_device(&mxc_spdif_audio_device, &spdif_audio_data);
mx5_set_otghost_vbus_func(mx53_gpio_usbotg_driver_vbus);
mx5_usb_dr_init();
mx5_usbh1_init();
mxc_register_device(&mxc_v4l2_device, NULL);
mxc_register_device(&mxc_v4l2out_device, NULL);
mxc_register_device(&mxc_bt_rfkill, &mxc_bt_rfkill_data);
smd_add_device_buttons();
smd_add_device_battery();
pm_i2c_init(I2C1_BASE_ADDR - MX53_OFFSET);
}
/*!
* Board specific initialization.
*/
static void __init mxc_board_init(void)
{
mxc_ipu_data.di_clk[0] = clk_get(NULL, "ipu_di0_clk");
mxc_ipu_data.di_clk[1] = clk_get(NULL, "ipu_di1_clk");
mxc_ipu_data.csi_clk[0] = clk_get(NULL, "ssi_ext1_clk");
mxc_spdif_data.spdif_core_clk = clk_get(NULL, "spdif_xtal_clk");
clk_put(mxc_spdif_data.spdif_core_clk);
mxcsdhc1_device.resource[2].start = gpio_to_irq(MX53_SMD_SD1_CD);
mxcsdhc1_device.resource[2].end = gpio_to_irq(MX53_SMD_SD1_CD);
mxc_cpu_common_init();
mx53_smd_io_init();
pm_power_off = mx53_smd_power_off;
mxc_register_device(&mxc_dma_device, NULL);
mxc_register_device(&mxc_wdt_device, NULL);
mxc_register_device(&mxcspi1_device, &mxcspi1_data);
mxc_register_device(&mxci2c_devices[0], &mxci2c_data);
mxc_register_device(&mxci2c_devices[1], &mxci2c_data);
mxc_register_device(&mxci2c_devices[2], &mxci2c_data);
mx53_smd_init_da9052();
mxc_register_device(&mxc_rtc_device, NULL);
mxc_register_device(&mxc_ipu_device, &mxc_ipu_data);
mxc_register_device(&mxc_ldb_device, &ldb_data);
mxc_register_device(&mxc_tve_device, &tve_data);
mxc_register_device(&mxcvpu_device, &mxc_vpu_data);
mxc_register_device(&gpu_device, &z160_revision);
mxc_register_device(&mxcscc_device, NULL);
mxc_register_device(&mxc_dvfs_core_device, &dvfs_core_data);
mxc_register_device(&busfreq_device, &bus_freq_data);
mxc_register_device(&mxc_iim_device, &iim_data);
mxc_register_device(&mxc_pwm2_device, NULL);
mxc_register_device(&mxc_pwm1_backlight_device, &mxc_pwm_backlight_data);
mxc_register_device(&mxcsdhc1_device, &mmc1_data);
mxc_register_device(&mxcsdhc2_device, &mmc2_data);
mxc_register_device(&mxcsdhc3_device, &mmc3_data);
mxc_register_device(&mxc_ssi1_device, NULL);
mxc_register_device(&mxc_ssi2_device, NULL);
mxc_register_device(&mxc_alsa_spdif_device, &mxc_spdif_data);
mxc_register_device(&ahci_fsl_device, &sata_data);
/* AHCI SATA PWR EN(DCDC_5V, DCDC_3V3_BB) on SATA bus */
gpio_request(MX53_SMD_SATA_PWR_EN, "sata-pwr-en");
gpio_direction_output(MX53_SMD_SATA_PWR_EN, 1);
mxc_register_device(&mxc_fec_device, &fec_data);
mxc_register_device(&mxc_ptp_device, NULL);
/* ASRC is only available for MX53 TO2.0 */
if (mx53_revision() >= IMX_CHIP_REVISION_2_0) {
mxc_asrc_data.asrc_core_clk = clk_get(NULL, "asrc_clk");
clk_put(mxc_asrc_data.asrc_core_clk);
mxc_asrc_data.asrc_audio_clk = clk_get(NULL, "asrc_serial_clk");
clk_put(mxc_asrc_data.asrc_audio_clk);
mxc_register_device(&mxc_asrc_device, &mxc_asrc_data);
}
spi_device_init();
i2c_register_board_info(0, mxc_i2c0_board_info,
ARRAY_SIZE(mxc_i2c0_board_info));
i2c_register_board_info(1, mxc_i2c1_board_info,
ARRAY_SIZE(mxc_i2c1_board_info));
i2c_register_board_info(2, mxc_i2c2_board_info,
ARRAY_SIZE(mxc_i2c2_board_info));
mxc_register_device(&mxc_sgtl5000_device, &sgtl5000_data);
mx5_set_otghost_vbus_func(mx53_gpio_usbotg_driver_vbus);
mx5_usb_dr_init();
mx5_usbh1_init();
mxc_register_device(&mxc_v4l2_device, NULL);
mxc_register_device(&mxc_v4l2out_device, NULL);
mxc_register_device(&mxc_bt_rfkill, &mxc_bt_rfkill_data);
smd_add_device_buttons();
smd_add_device_battery();
}
/*!
* Board specific initialization.
*/
static void __init mxc_board_init(void)
{
mxc_ipu_data.di_clk[0] = clk_get(NULL, "ipu_di0_clk");
mxc_ipu_data.di_clk[1] = clk_get(NULL, "ipu_di1_clk");
mxc_ipu_data.csi_clk[0] = clk_get(NULL, "ssi_ext1_clk");
mxc_spdif_data.spdif_core_clk = clk_get(NULL, "spdif_xtal_clk");
clk_put(mxc_spdif_data.spdif_core_clk);
mxcsdhc3_device.resource[2].start = gpio_to_irq(SD3_CD);
mxcsdhc3_device.resource[2].end = gpio_to_irq(SD3_CD);
mxc_cpu_common_init();
mx53_loco_io_init();
mxc_register_device(&mxc_dma_device, NULL);
mxc_register_device(&mxc_wdt_device, NULL);
mxc_register_device(&mxci2c_devices[0], &mxci2c_data);
mxc_register_device(&mxci2c_devices[1], &mxci2c_data);
mxc_register_device(&mxci2c_devices[2], &mxci2c_data);
if (board_is_mx53_loco_mc34708()) {
mx53_loco_init_mc34708();
dvfs_core_data.reg_id = "SW1A";
tve_data.dac_reg = "VDAC";
bus_freq_data.gp_reg_id = "SW1A";
bus_freq_data.lp_reg_id = "SW2";
mxc_register_device(&mxc_powerkey_device, &pwrkey_data);
}
else {
mx53_loco_init_da9052();
dvfs_core_data.reg_id = "DA9052_BUCK_CORE";
tve_data.dac_reg = "DA9052_LDO7";
bus_freq_data.gp_reg_id = "DA9052_BUCK_CORE";
bus_freq_data.lp_reg_id = "DA9052_BUCK_PRO";
}
mxc_register_device(&mxc_rtc_device, NULL);
mxc_register_device(&mxc_ipu_device, &mxc_ipu_data);
mxc_register_device(&mxc_ldb_device, &ldb_data);
mxc_register_device(&mxc_tve_device, &tve_data);
mxc_register_device(&mxcvpu_device, &mxc_vpu_data);
mxc_register_device(&gpu_device, &gpu_data);
mxc_register_device(&mxcscc_device, NULL);
mxc_register_device(&mxc_dvfs_core_device, &dvfs_core_data);
mxc_register_device(&busfreq_device, &bus_freq_data);
mxc_register_device(&mxc_iim_device, &iim_data);
mxc_register_device(&mxc_pwm2_device, NULL);
mxc_register_device(&mxc_pwm1_backlight_device, &mxc_pwm_backlight_data);
mxc_register_device(&mxcsdhc1_device, &mmc1_data);
mxc_register_device(&mxcsdhc3_device, &mmc3_data);
mxc_register_device(&mxc_ssi1_device, NULL);
mxc_register_device(&mxc_ssi2_device, NULL);
mxc_register_device(&mxc_alsa_spdif_device, &mxc_spdif_data);
mxc_register_device(&mxc_android_pmem_device, &android_pmem_data);
mxc_register_device(&mxc_android_pmem_gpu_device,
&android_pmem_gpu_data);
mxc_register_device(&usb_mass_storage_device, &mass_storage_data);
mxc_register_device(&usb_rndis_device, &rndis_data);
mxc_register_device(&android_usb_device, &android_usb_data);
mxc_register_device(&ahci_fsl_device, &sata_data);
mxc_register_device(&mxc_fec_device, &fec_data);
mxc_register_device(&mxc_ptp_device, NULL);
/* ASRC is only available for MX53 TO2.0 */
if (mx53_revision() >= IMX_CHIP_REVISION_2_0) {
mxc_asrc_data.asrc_core_clk = clk_get(NULL, "asrc_clk");
clk_put(mxc_asrc_data.asrc_core_clk);
mxc_asrc_data.asrc_audio_clk = clk_get(NULL, "asrc_serial_clk");
clk_put(mxc_asrc_data.asrc_audio_clk);
mxc_register_device(&mxc_asrc_device, &mxc_asrc_data);
}
i2c_register_board_info(0, mxc_i2c0_board_info,
ARRAY_SIZE(mxc_i2c0_board_info));
i2c_register_board_info(1, mxc_i2c1_board_info,
ARRAY_SIZE(mxc_i2c1_board_info));
i2c_register_board_info(2, mxc_i2c2_board_info,
ARRAY_SIZE(mxc_i2c2_board_info));
mxc_register_device(&mxc_sgtl5000_device, &sgtl5000_data);
mxc_register_device(&mxc_spdif_audio_device, &spdif_audio_data);
mx5_usb_dr_init();
mx5_set_host1_vbus_func(mx53_loco_usbh1_vbus);
mx5_usbh1_init();
mxc_register_device(&mxc_v4l2_device, NULL);
mxc_register_device(&mxc_v4l2out_device, NULL);
loco_add_device_buttons();
pm_power_off = da9053_power_off;
}
static void __init mx53_clocks_init(struct device_node *np)
{
void __iomem *ccm_base;
void __iomem *pll_base;
unsigned long r;
pll_base = ioremap(MX53_DPLL1_BASE, SZ_16K);
WARN_ON(!pll_base);
clk[IMX5_CLK_PLL1_SW] = imx_clk_pllv2("pll1_sw", "osc", pll_base);
pll_base = ioremap(MX53_DPLL2_BASE, SZ_16K);
WARN_ON(!pll_base);
clk[IMX5_CLK_PLL2_SW] = imx_clk_pllv2("pll2_sw", "osc", pll_base);
pll_base = ioremap(MX53_DPLL3_BASE, SZ_16K);
WARN_ON(!pll_base);
clk[IMX5_CLK_PLL3_SW] = imx_clk_pllv2("pll3_sw", "osc", pll_base);
pll_base = ioremap(MX53_DPLL4_BASE, SZ_16K);
WARN_ON(!pll_base);
clk[IMX5_CLK_PLL4_SW] = imx_clk_pllv2("pll4_sw", "osc", pll_base);
ccm_base = of_iomap(np, 0);
WARN_ON(!ccm_base);
mx5_clocks_common_init(ccm_base);
clk[IMX5_CLK_LP_APM] = imx_clk_mux("lp_apm", MXC_CCM_CCSR, 10, 1,
lp_apm_sel, ARRAY_SIZE(lp_apm_sel));
clk[IMX5_CLK_LDB_DI1_DIV_3_5] = imx_clk_fixed_factor("ldb_di1_div_3_5", "ldb_di1_sel", 2, 7);
clk[IMX5_CLK_LDB_DI1_DIV] = imx_clk_divider_flags("ldb_di1_div", "ldb_di1_div_3_5", MXC_CCM_CSCMR2, 11, 1, 0);
clk[IMX5_CLK_LDB_DI1_SEL] = imx_clk_mux_flags("ldb_di1_sel", MXC_CCM_CSCMR2, 9, 1,
mx53_ldb_di1_sel, ARRAY_SIZE(mx53_ldb_di1_sel), CLK_SET_RATE_PARENT);
clk[IMX5_CLK_DI_PLL4_PODF] = imx_clk_divider("di_pll4_podf", "pll4_sw", MXC_CCM_CDCDR, 16, 3);
clk[IMX5_CLK_LDB_DI0_DIV_3_5] = imx_clk_fixed_factor("ldb_di0_div_3_5", "ldb_di0_sel", 2, 7);
clk[IMX5_CLK_LDB_DI0_DIV] = imx_clk_divider_flags("ldb_di0_div", "ldb_di0_div_3_5", MXC_CCM_CSCMR2, 10, 1, 0);
clk[IMX5_CLK_LDB_DI0_SEL] = imx_clk_mux_flags("ldb_di0_sel", MXC_CCM_CSCMR2, 8, 1,
mx53_ldb_di0_sel, ARRAY_SIZE(mx53_ldb_di0_sel), CLK_SET_RATE_PARENT);
clk[IMX5_CLK_LDB_DI0_GATE] = imx_clk_gate2("ldb_di0_gate", "ldb_di0_div", MXC_CCM_CCGR6, 28);
clk[IMX5_CLK_LDB_DI1_GATE] = imx_clk_gate2("ldb_di1_gate", "ldb_di1_div", MXC_CCM_CCGR6, 30);
clk[IMX5_CLK_IPU_DI0_SEL] = imx_clk_mux_flags("ipu_di0_sel", MXC_CCM_CSCMR2, 26, 3,
mx53_ipu_di0_sel, ARRAY_SIZE(mx53_ipu_di0_sel), CLK_SET_RATE_PARENT);
clk[IMX5_CLK_IPU_DI1_SEL] = imx_clk_mux_flags("ipu_di1_sel", MXC_CCM_CSCMR2, 29, 3,
mx53_ipu_di1_sel, ARRAY_SIZE(mx53_ipu_di1_sel), CLK_SET_RATE_PARENT);
clk[IMX5_CLK_TVE_EXT_SEL] = imx_clk_mux_flags("tve_ext_sel", MXC_CCM_CSCMR1, 6, 1,
mx53_tve_ext_sel, ARRAY_SIZE(mx53_tve_ext_sel), CLK_SET_RATE_PARENT);
clk[IMX5_CLK_TVE_GATE] = imx_clk_gate2("tve_gate", "tve_pred", MXC_CCM_CCGR2, 30);
clk[IMX5_CLK_TVE_PRED] = imx_clk_divider("tve_pred", "tve_ext_sel", MXC_CCM_CDCDR, 28, 3);
clk[IMX5_CLK_ESDHC1_PER_GATE] = imx_clk_gate2("esdhc1_per_gate", "esdhc_a_podf", MXC_CCM_CCGR3, 2);
clk[IMX5_CLK_ESDHC2_PER_GATE] = imx_clk_gate2("esdhc2_per_gate", "esdhc_c_sel", MXC_CCM_CCGR3, 6);
clk[IMX5_CLK_ESDHC3_PER_GATE] = imx_clk_gate2("esdhc3_per_gate", "esdhc_b_podf", MXC_CCM_CCGR3, 10);
clk[IMX5_CLK_ESDHC4_PER_GATE] = imx_clk_gate2("esdhc4_per_gate", "esdhc_d_sel", MXC_CCM_CCGR3, 14);
clk[IMX5_CLK_USB_PHY1_GATE] = imx_clk_gate2("usb_phy1_gate", "usb_phy_sel", MXC_CCM_CCGR4, 10);
clk[IMX5_CLK_USB_PHY2_GATE] = imx_clk_gate2("usb_phy2_gate", "usb_phy_sel", MXC_CCM_CCGR4, 12);
clk[IMX5_CLK_CAN_SEL] = imx_clk_mux("can_sel", MXC_CCM_CSCMR2, 6, 2,
mx53_can_sel, ARRAY_SIZE(mx53_can_sel));
clk[IMX5_CLK_CAN1_SERIAL_GATE] = imx_clk_gate2("can1_serial_gate", "can_sel", MXC_CCM_CCGR6, 22);
clk[IMX5_CLK_CAN1_IPG_GATE] = imx_clk_gate2("can1_ipg_gate", "ipg", MXC_CCM_CCGR6, 20);
clk[IMX5_CLK_OCRAM] = imx_clk_gate2("ocram", "ahb", MXC_CCM_CCGR6, 2);
clk[IMX5_CLK_CAN2_SERIAL_GATE] = imx_clk_gate2("can2_serial_gate", "can_sel", MXC_CCM_CCGR4, 8);
clk[IMX5_CLK_CAN2_IPG_GATE] = imx_clk_gate2("can2_ipg_gate", "ipg", MXC_CCM_CCGR4, 6);
clk[IMX5_CLK_I2C3_GATE] = imx_clk_gate2("i2c3_gate", "per_root", MXC_CCM_CCGR1, 22);
clk[IMX5_CLK_SATA_GATE] = imx_clk_gate2("sata_gate", "ipg", MXC_CCM_CCGR4, 2);
clk[IMX5_CLK_FIRI_SEL] = imx_clk_mux("firi_sel", MXC_CCM_CSCMR2, 12, 2,
standard_pll_sel, ARRAY_SIZE(standard_pll_sel));
clk[IMX5_CLK_FIRI_PRED] = imx_clk_divider("firi_pred", "firi_sel", MXC_CCM_CSCDR3, 6, 3);
clk[IMX5_CLK_FIRI_PODF] = imx_clk_divider("firi_podf", "firi_pred", MXC_CCM_CSCDR3, 0, 6);
clk[IMX5_CLK_FIRI_SERIAL_GATE] = imx_clk_gate2("firi_serial_gate", "firi_podf", MXC_CCM_CCGR1, 28);
clk[IMX5_CLK_FIRI_IPG_GATE] = imx_clk_gate2("firi_ipg_gate", "ipg", MXC_CCM_CCGR1, 26);
clk[IMX5_CLK_CSI0_MCLK1_SEL] = imx_clk_mux("csi0_mclk1_sel", MXC_CCM_CSCMR2, 22, 2,
standard_pll_sel, ARRAY_SIZE(standard_pll_sel));
clk[IMX5_CLK_CSI0_MCLK1_PRED] = imx_clk_divider("csi0_mclk1_pred", "csi0_mclk1_sel", MXC_CCM_CSCDR4, 6, 3);
clk[IMX5_CLK_CSI0_MCLK1_PODF] = imx_clk_divider("csi0_mclk1_podf", "csi0_mclk1_pred", MXC_CCM_CSCDR4, 0, 6);
clk[IMX5_CLK_CSI0_MCLK1_GATE] = imx_clk_gate2("csi0_mclk1_serial_gate", "csi0_mclk1_podf", MXC_CCM_CCGR6, 4);
clk[IMX5_CLK_IEEE1588_SEL] = imx_clk_mux("ieee1588_sel", MXC_CCM_CSCMR2, 14, 2,
ieee1588_sels, ARRAY_SIZE(ieee1588_sels));
clk[IMX5_CLK_IEEE1588_PRED] = imx_clk_divider("ieee1588_pred", "ieee1588_sel", MXC_CCM_CSCDR2, 6, 3);
clk[IMX5_CLK_IEEE1588_PODF] = imx_clk_divider("ieee1588_podf", "ieee1588_pred", MXC_CCM_CSCDR2, 0, 6);
clk[IMX5_CLK_IEEE1588_GATE] = imx_clk_gate2("ieee1588_serial_gate", "ieee1588_podf", MXC_CCM_CCGR7, 6);
clk[IMX5_CLK_CKO1_SEL] = imx_clk_mux("cko1_sel", MXC_CCM_CCOSR, 0, 4,
mx53_cko1_sel, ARRAY_SIZE(mx53_cko1_sel));
clk[IMX5_CLK_CKO1_PODF] = imx_clk_divider("cko1_podf", "cko1_sel", MXC_CCM_CCOSR, 4, 3);
clk[IMX5_CLK_CKO1] = imx_clk_gate2("cko1", "cko1_podf", MXC_CCM_CCOSR, 7);
clk[IMX5_CLK_CKO2_SEL] = imx_clk_mux("cko2_sel", MXC_CCM_CCOSR, 16, 5,
mx53_cko2_sel, ARRAY_SIZE(mx53_cko2_sel));
clk[IMX5_CLK_CKO2_PODF] = imx_clk_divider("cko2_podf", "cko2_sel", MXC_CCM_CCOSR, 21, 3);
clk[IMX5_CLK_CKO2] = imx_clk_gate2("cko2", "cko2_podf", MXC_CCM_CCOSR, 24);
clk[IMX5_CLK_SPDIF_XTAL_SEL] = imx_clk_mux("spdif_xtal_sel", MXC_CCM_CSCMR1, 2, 2,
mx53_spdif_xtal_sel, ARRAY_SIZE(mx53_spdif_xtal_sel));
clk[IMX5_CLK_ARM] = imx_clk_cpu("arm", "cpu_podf",
clk[IMX5_CLK_CPU_PODF],
clk[IMX5_CLK_CPU_PODF_SEL],
clk[IMX5_CLK_PLL1_SW],
clk[IMX5_CLK_STEP_SEL]);
imx_check_clocks(clk, ARRAY_SIZE(clk));
clk_data.clks = clk;
clk_data.clk_num = ARRAY_SIZE(clk);
of_clk_add_provider(np, of_clk_src_onecell_get, &clk_data);
/* set SDHC root clock to 200MHZ*/
clk_set_rate(clk[IMX5_CLK_ESDHC_A_PODF], 200000000);
clk_set_rate(clk[IMX5_CLK_ESDHC_B_PODF], 200000000);
/* move can bus clk to 24MHz */
clk_set_parent(clk[IMX5_CLK_CAN_SEL], clk[IMX5_CLK_LP_APM]);
/* make sure step clock is running from 24MHz */
clk_set_parent(clk[IMX5_CLK_STEP_SEL], clk[IMX5_CLK_LP_APM]);
clk_prepare_enable(clk[IMX5_CLK_IIM_GATE]);
imx_print_silicon_rev("i.MX53", mx53_revision());
clk_disable_unprepare(clk[IMX5_CLK_IIM_GATE]);
r = clk_round_rate(clk[IMX5_CLK_USBOH3_PER_GATE], 54000000);
clk_set_rate(clk[IMX5_CLK_USBOH3_PER_GATE], r);
}
