// Check if nRF24L01 present (send byte sequence, read it back and compare)
// return:
// 0 - looks like an nRF24L01 is online
// 1 - received sequence differs from original
uint8_t nRF24_Check(void) {
uint8_t txbuf[5] = { 'W','o','l','k','?' };
uint8_t rxbuf[5];
uint8_t i;
nRF24_WriteBuf(nRF24_CMD_WREG | nRF24_REG_TX_ADDR,txbuf,5); // Write fake TX address
nRF24_ReadBuf(nRF24_REG_TX_ADDR,rxbuf,5); // Try to read TX_ADDR register
for (i = 0; i < 5; i++) if (rxbuf[i] != txbuf[i]) return 1;
return 0;
}
uint8_t nRF24_RXPacket(uint8_t* pBuf, uint8_t RX_PAYLOAD) {
uint8_t status;
status = nRF24_ReadReg(nRF24_REG_STATUS); // Read status register
if (status & nRF24_MASK_RX_DR) {
if ((status & 0x0E) == 0) {
// pipe 0
nRF24_ReadBuf(nRF24_CMD_R_RX_PAYLOAD,pBuf,RX_PAYLOAD); // read received payload from RX FIFO buffer
}
nRF24_ReadWrite(nRF24_CMD_FLUSH_RX); // Flush RX FIFO buffer
nRF24_RWReg(nRF24_CMD_WREG | nRF24_REG_STATUS,status | 0x70); // Clear RX_DR, TX_DS, MAX_RT flags
//return nRF24_MASK_RX_DR;
return status;
}
// Some banana happens
nRF24_ReadWrite(nRF24_CMD_FLUSH_RX); // Flush RX FIFO buffer
nRF24_RWReg(nRF24_CMD_WREG | nRF24_REG_STATUS,status | 0x70); // Clear RX_DR, TX_DS, MAX_RT flags
return status;
}
