int bt_enable(bt_ready_cb_t cb)
{
int ret;
BT_DBG("");
if (!cb) {
/* With nble the callback is mandatory */
return -EINVAL;
}
ret = nble_open();
if (ret) {
return ret;
}
bt_ready_cb = cb;
return 0;
}
int bt_enable(bt_ready_cb_t cb)
{
struct device *gpio;
int ret;
BT_DBG("");
gpio = device_get_binding(CONFIG_GPIO_DW_0_NAME);
if (!gpio) {
BT_ERR("Cannot find %s", CONFIG_GPIO_DW_0_NAME);
return -ENODEV;
}
ret = gpio_pin_configure(gpio, NBLE_RESET_PIN, GPIO_DIR_OUT);
if (ret) {
BT_ERR("Error configuring pin %d", NBLE_RESET_PIN);
return -ENODEV;
}
/* Reset hold time is 0.2us (normal) or 100us (SWD debug) */
ret = gpio_pin_write(gpio, NBLE_RESET_PIN, 0);
if (ret) {
BT_ERR("Error pin write %d", NBLE_RESET_PIN);
return -EINVAL;
}
ret = gpio_pin_configure(gpio, NBLE_BTWAKE_PIN, GPIO_DIR_OUT);
if (ret) {
BT_ERR("Error configuring pin %d", NBLE_BTWAKE_PIN);
return -ENODEV;
}
ret = gpio_pin_write(gpio, NBLE_BTWAKE_PIN, 1);
if (ret) {
BT_ERR("Error pin write %d", NBLE_BTWAKE_PIN);
return -EINVAL;
}
/**
* NBLE reset is achieved by asserting low the SWDIO pin.
* However, the BLE Core chip can be in SWD debug mode,
* and NRF_POWER->RESET = 0 due to, other constraints: therefore,
* this reset might not work everytime, especially after
* flashing or debugging.
*/
/* sleep 1ms depending on context */
switch (sys_execution_context_type_get()) {
case NANO_CTX_FIBER:
fiber_sleep(MSEC(1));
break;
case NANO_CTX_TASK:
task_sleep(MSEC(1));
break;
default:
BT_ERR("ISR context is not supported");
return -EINVAL;
}
ret = nble_open();
if (ret) {
return ret;
}
ret = gpio_pin_write(gpio, NBLE_RESET_PIN, 1);
if (ret) {
BT_ERR("Error pin write %d", NBLE_RESET_PIN);
return -EINVAL;
}
/* Set back GPIO to input to avoid interfering with external debugger */
ret = gpio_pin_configure(gpio, NBLE_RESET_PIN, GPIO_DIR_IN);
if (ret) {
BT_ERR("Error configuring pin %d", NBLE_RESET_PIN);
return -ENODEV;
}
bt_ready_cb = cb;
return 0;
}
