void rza1EthEventHandler(NetInterface *interface) { error_t error; size_t length; bool_t linkStateChange; //PHY event is pending? if(interface->phyEvent) { //Acknowledge the event by clearing the flag interface->phyEvent = FALSE; //Handle PHY specific events linkStateChange = interface->phyDriver->eventHandler(interface); //Check whether the link state has changed? if(linkStateChange) { //Set duplex mode for proper operation if(interface->linkState) { //Half-duplex or full-duplex mode? if(interface->fullDuplex) ETHER.ECMR0 |= ETH_ECMR0_DM; else ETHER.ECMR0 &= ~ETH_ECMR0_DM; } //Process link state change event nicNotifyLinkChange(interface); } } //Packet received? if(ETHER.EESR0 & ETHER_EESR0_FR) { //Clear FR interrupt flag ETHER.EESR0 = ETHER_EESR0_FR; //Process all pending packets do { //Read incoming packet error = rza1EthReceivePacket(interface, interface->ethFrame, ETH_MAX_FRAME_SIZE, &length); //Check whether a valid packet has been received if(!error) { //Pass the packet to the upper layer nicProcessPacket(interface, interface->ethFrame, length); } //No more data in the receive buffer? } while(error != ERROR_BUFFER_EMPTY); } //Re-enable EDMAC interrupts ETHER.EESIPR0 = ETHER_EESIPR0_TWBIP | ETHER_EESIPR0_FRIP; }
void samv71EthEventHandler(NetInterface *interface) { uint32_t rsr; uint_t length; bool_t linkStateChange; //Read receive status rsr = GMAC->GMAC_RSR; //PHY event is pending? if(interface->phyEvent) { //Acknowledge the event by clearing the flag interface->phyEvent = FALSE; //Handle PHY specific events linkStateChange = interface->phyDriver->eventHandler(interface); //Check whether the link state has changed? if(linkStateChange) { //Set speed and duplex mode for proper operation if(interface->linkState) { //Read network configuration register uint32_t config = GMAC->GMAC_NCFGR; //10BASE-T or 100BASE-TX operation mode? if(interface->speed100) config |= GMAC_NCFGR_SPD; else config &= ~GMAC_NCFGR_SPD; //Half-duplex or full-duplex mode? if(interface->fullDuplex) config |= GMAC_NCFGR_FD; else config &= ~GMAC_NCFGR_FD; //Write configuration value back to NCFGR register GMAC->GMAC_NCFGR = config; } //Process link state change event nicNotifyLinkChange(interface); } } //Packet received? if(rsr & (GMAC_RSR_HNO | GMAC_RSR_RXOVR | GMAC_RSR_REC | GMAC_RSR_BNA)) { //Only clear RSR flags that are currently set GMAC->GMAC_RSR = rsr; //Process all the pending packets while(1) { //Check whether a packet has been received length = samv71EthReceivePacket(interface, interface->ethFrame, ETH_MAX_FRAME_SIZE); //No packet is pending in the receive buffer? if(!length) break; //Pass the packet to the upper layer nicProcessPacket(interface, interface->ethFrame, length); } } }
void rx63nEthEventHandler(NetInterface *interface) { error_t error; size_t length; bool_t linkStateChange; //PHY event is pending? if(interface->phyEvent) { //Acknowledge the event by clearing the flag interface->phyEvent = FALSE; //Handle PHY specific events linkStateChange = interface->phyDriver->eventHandler(interface); //Check whether the link state has changed? if(linkStateChange) { //Set speed and duplex mode for proper operation if(interface->linkState) { //10BASE-T or 100BASE-TX operation mode? if(interface->speed100) ETHERC.ECMR.BIT.RTM = 1; else ETHERC.ECMR.BIT.RTM = 0; //Half-duplex or full-duplex mode? if(interface->fullDuplex) ETHERC.ECMR.BIT.DM = 1; else ETHERC.ECMR.BIT.DM = 0; } //Process link state change event nicNotifyLinkChange(interface); } } //Packet received? if(EDMAC.EESR.LONG & EDMAC_EESR_FR) { //Clear FR interrupt flag EDMAC.EESR.LONG = EDMAC_EESR_FR; //Process all pending packets do { //Read incoming packet error = rx63nEthReceivePacket(interface, interface->ethFrame, ETH_MAX_FRAME_SIZE, &length); //Check whether a valid packet has been received if(!error) { //Pass the packet to the upper layer nicProcessPacket(interface, interface->ethFrame, length); } //No more data in the receive buffer? } while(error != ERROR_BUFFER_EMPTY); } //Re-enable EDMAC interrupts EDMAC.EESIPR.BIT.TWBIP = 1; EDMAC.EESIPR.BIT.FRIP = 1; }
void wilc1000AppWifiEvent(uint8_t msgType, void *msg) { tstrM2mWifiStateChanged *stateChangedMsg; //Debug message TRACE_INFO("WILC1000 Wi-Fi event callback\r\n"); //Check message type if(msgType == M2M_WIFI_RESP_FIRMWARE_STRTED) { //Debug message TRACE_INFO(" M2M_WIFI_RESP_FIRMWARE_STRTED\r\n"); } else if(msgType == M2M_WIFI_RESP_CON_STATE_CHANGED) { //Debug message TRACE_INFO(" M2M_WIFI_RESP_CON_STATE_CHANGED\r\n"); //Connection state stateChangedMsg = (tstrM2mWifiStateChanged*) msg; //Check interface identifier if(stateChangedMsg->u8IfcId == INTERFACE_1) { //Check whether STA mode is enabled if(wilc1000StaInterface != NULL) { //Check link state if(stateChangedMsg->u8CurrState == M2M_WIFI_CONNECTED) { //Link is up wilc1000StaInterface->linkState = TRUE; } else { //Link is down wilc1000StaInterface->linkState = FALSE; } //Process link state change event nicNotifyLinkChange(wilc1000StaInterface); } } else if(stateChangedMsg->u8IfcId == INTERFACE_2) { //Check whether AP mode is enabled if(wilc1000ApInterface != NULL) { //Check link state if(stateChangedMsg->u8CurrState == M2M_WIFI_CONNECTED) { //Link is up wilc1000ApInterface->linkState = TRUE; } else { //Link is down wilc1000ApInterface->linkState = FALSE; } //Process link state change event nicNotifyLinkChange(wilc1000ApInterface); } } } #if defined(CONF_WILC_EVENT_HOOK) //Release exclusive access osReleaseMutex(&netMutex); //Invoke user callback function CONF_WILC_EVENT_HOOK(msgType, msg); //Get exclusive access osAcquireMutex(&netMutex); #endif }
void ksz8051EventHandler(NetInterface *interface) { uint16_t value; //Read status register to acknowledge the interrupt value = ksz8051ReadPhyReg(interface, KSZ8051_PHY_REG_ICSR); //Link status change? if(value & (ICSR_LINK_DOWN_IF | ICSR_LINK_UP_IF)) { //Any link failure condition is latched in the BMSR register... Reading //the register twice will always return the actual link status value = ksz8051ReadPhyReg(interface, KSZ8051_PHY_REG_BMSR); value = ksz8051ReadPhyReg(interface, KSZ8051_PHY_REG_BMSR); //Link is up? if(value & BMSR_LINK_STATUS) { //Read PHY control register value = ksz8051ReadPhyReg(interface, KSZ8051_PHY_REG_PHYCON1); //Check current operation mode switch(value & PHYCON1_OP_MODE_MASK) { //10BASE-T case PHYCON1_OP_MODE_10BT: interface->linkSpeed = NIC_LINK_SPEED_10MBPS; interface->duplexMode = NIC_HALF_DUPLEX_MODE; break; //10BASE-T full-duplex case PHYCON1_OP_MODE_10BT_FD: interface->linkSpeed = NIC_LINK_SPEED_10MBPS; interface->duplexMode = NIC_FULL_DUPLEX_MODE; break; //100BASE-TX case PHYCON1_OP_MODE_100BTX: interface->linkSpeed = NIC_LINK_SPEED_100MBPS; interface->duplexMode = NIC_HALF_DUPLEX_MODE; break; //100BASE-TX full-duplex case PHYCON1_OP_MODE_100BTX_FD: interface->linkSpeed = NIC_LINK_SPEED_100MBPS; interface->duplexMode = NIC_FULL_DUPLEX_MODE; break; //Unknown operation mode default: //Debug message TRACE_WARNING("Invalid Duplex mode\r\n"); break; } //Update link state interface->linkState = TRUE; //Adjust MAC configuration parameters for proper operation interface->nicDriver->updateMacConfig(interface); } else { //Update link state interface->linkState = FALSE; } //Process link state change event nicNotifyLinkChange(interface); } }
void m2sxxxEthEventHandler(NetInterface *interface) { error_t error; size_t length; bool_t linkStateChange; uint32_t temp; //PHY event is pending? if(interface->phyEvent) { //Acknowledge the event by clearing the flag interface->phyEvent = FALSE; //Handle PHY specific events linkStateChange = interface->phyDriver->eventHandler(interface); //Check whether the link state has changed? if(linkStateChange) { //Set speed and duplex mode for proper operation if(interface->linkState) { //10BASE-T or 100BASE-TX operation mode? if(interface->speed100) { //The link operates at 100 Mbps temp = SYSREG->MAC_CR & ~MAC_CR_ETH_LINE_SPEED; SYSREG->MAC_CR = temp | MAC_CR_ETH_LINE_SPEED_100MBPS; //Configure the RMII module with the current operating speed MAC->INTERFACE_CTRL |= INTERFACE_CTRL_SPEED; //Use nibble mode temp = MAC->CFG2 & ~CFG2_INTERFACE_MODE; MAC->CFG2 = temp | CFG2_INTERFACE_MODE_NIBBLE; } else { //The link operates at 10 Mbps temp = SYSREG->MAC_CR & ~MAC_CR_ETH_LINE_SPEED; SYSREG->MAC_CR = temp | MAC_CR_ETH_LINE_SPEED_10MBPS; //Configure the RMII module with the current operating speed MAC->INTERFACE_CTRL &= ~INTERFACE_CTRL_SPEED; //Use nibble mode temp = MAC->CFG2 & ~CFG2_INTERFACE_MODE; MAC->CFG2 = temp | CFG2_INTERFACE_MODE_NIBBLE; } //Half-duplex or full-duplex mode? if(interface->fullDuplex) { //Configure MAC to operate in full-duplex mode MAC->CFG2 |= CFG2_FULL_DUPLEX; MAC->FIFO_CFG5 &= ~FIFO_CFG5_CFGHDPLX; } else { //Configure MAC to operate in half-duplex mode MAC->CFG2 &= ~CFG2_FULL_DUPLEX; MAC->FIFO_CFG5 |= FIFO_CFG5_CFGHDPLX; } } //Process link state change event nicNotifyLinkChange(interface); } } //Packet received? if(MAC->DMA_RX_STATUS & DMA_RX_STATUS_RX_PKT_RECEIVED) { //Process all the pending packets while(MAC->DMA_RX_STATUS & DMA_RX_STATUS_RX_PKT_RECEIVED) { //Clear RX interrupt flag MAC->DMA_RX_STATUS = DMA_RX_STATUS_RX_PKT_RECEIVED; //Read incoming packet error = m2sxxxEthReceivePacket(interface, interface->ethFrame, ETH_MAX_FRAME_SIZE, &length); //Check whether a valid packet has been received if(!error) { //Pass the packet to the upper layer nicProcessPacket(interface, interface->ethFrame, length); } } } //Re-enable Ethernet interrupts MAC->DMA_IRQ_MASK = DMA_IRQ_MASK_RX_PKT_RECEIVED | DMA_IRQ_MASK_TX_PKT_SENT; }
void lan8720EventHandler(NetInterface *interface) { uint16_t value; bool_t linkState; //Any link failure condition is latched in the BMSR register... Reading //the register twice will always return the actual link status value = lan8720ReadPhyReg(interface, LAN8720_PHY_REG_BMSR); value = lan8720ReadPhyReg(interface, LAN8720_PHY_REG_BMSR); //Retrieve current link state linkState = (value & BMSR_LINK_STATUS) ? TRUE : FALSE; //Link is up? if(linkState && !interface->linkState) { //Read PHY special control/status register value = lan8720ReadPhyReg(interface, LAN8720_PHY_REG_PSCSR); //Check current operation mode switch(value & PSCSR_HCDSPEED_MASK) { //10BASE-T case PSCSR_HCDSPEED_10BT: interface->linkSpeed = NIC_LINK_SPEED_10MBPS; interface->duplexMode = NIC_HALF_DUPLEX_MODE; break; //10BASE-T full-duplex case PSCSR_HCDSPEED_10BT_FD: interface->linkSpeed = NIC_LINK_SPEED_10MBPS; interface->duplexMode = NIC_FULL_DUPLEX_MODE; break; //100BASE-TX case PSCSR_HCDSPEED_100BTX: interface->linkSpeed = NIC_LINK_SPEED_100MBPS; interface->duplexMode = NIC_HALF_DUPLEX_MODE; break; //100BASE-TX full-duplex case PSCSR_HCDSPEED_100BTX_FD: interface->linkSpeed = NIC_LINK_SPEED_100MBPS; interface->duplexMode = NIC_FULL_DUPLEX_MODE; break; //Unknown operation mode default: //Debug message TRACE_WARNING("Invalid Duplex mode\r\n"); break; } //Update link state interface->linkState = TRUE; //Adjust MAC configuration parameters for proper operation interface->nicDriver->updateMacConfig(interface); //Process link state change event nicNotifyLinkChange(interface); } //Link is down? else if(!linkState && interface->linkState) { //Update link state interface->linkState = FALSE; //Process link state change event nicNotifyLinkChange(interface); } }
void dm9161EventHandler(NetInterface *interface) { uint16_t value; bool_t end; //Read status register to acknowledge the interrupt value = dm9161ReadPhyReg(interface, DM9161_PHY_REG_MDINTR); //Link status change? if(value & MDINTR_LINK_CHANGE) { //Any link failure condition is latched in the BMSR register... Reading //the register twice will always return the actual link status value = dm9161ReadPhyReg(interface, DM9161_PHY_REG_BMSR); value = dm9161ReadPhyReg(interface, DM9161_PHY_REG_BMSR); //Link is up? if(value & BMSR_LINK_STATUS) { //Wait for the auto-negotiation to complete do { //Read DSCSR register value = dm9161ReadPhyReg(interface, DM9161_PHY_REG_DSCSR); //Check current state switch(value & DSCSR_ANMB_MASK) { //Auto-negotiation is still in progress? case DSCSR_ANMB_ABILITY_MATCH: case DSCSR_ANMB_ACK_MATCH: case DSCSR_ANMB_CONSIST_MATCH: case DSCSR_ANMB_SIGNAL_LINK_READY: end = FALSE; break; //Auto-negotiation is complete? default: end = TRUE; break; } //Check loop condition variable } while(!end); //Read DSCSR register value = dm9161ReadPhyReg(interface, DM9161_PHY_REG_DSCSR); //Check current operation mode if(value & DSCSR_10HDX) { //10BASE-T half-duplex interface->linkSpeed = NIC_LINK_SPEED_10MBPS; interface->duplexMode = NIC_HALF_DUPLEX_MODE; } else if(value & DSCSR_10FDX) { //10BASE-T full-duplex interface->linkSpeed = NIC_LINK_SPEED_10MBPS; interface->duplexMode = NIC_FULL_DUPLEX_MODE; } else if(value & DSCSR_100HDX) { //100BASE-TX half-duplex interface->linkSpeed = NIC_LINK_SPEED_100MBPS; interface->duplexMode = NIC_HALF_DUPLEX_MODE; } else if(value & DSCSR_100FDX) { //100BASE-TX full-duplex interface->linkSpeed = NIC_LINK_SPEED_100MBPS; interface->duplexMode = NIC_FULL_DUPLEX_MODE; } else { //Debug message TRACE_WARNING("Invalid Duplex mode\r\n"); } //Update link state interface->linkState = TRUE; //Adjust MAC configuration parameters for proper operation interface->nicDriver->updateMacConfig(interface); } else { //Update link state interface->linkState = FALSE; } //Process link state change event nicNotifyLinkChange(interface); } }
void dm9000EventHandler(NetInterface *interface) { error_t error; uint8_t status; size_t length; //Read interrupt status register status = dm9000ReadReg(DM9000_REG_ISR); //Check whether the link status has changed? if(status & ISR_LNKCHG) { //Clear interrupt flag dm9000WriteReg(DM9000_REG_ISR, ISR_LNKCHG); //Read network status register status = dm9000ReadReg(DM9000_REG_NSR); //Check link state if(status & NSR_LINKST) { //Link is up interface->linkState = TRUE; //Get current speed interface->speed100 = (status & NSR_SPEED) ? FALSE : TRUE; //Read network control register status = dm9000ReadReg(DM9000_REG_NCR); //Determine the new duplex mode interface->fullDuplex = (status & NCR_FDX) ? TRUE : FALSE; //Display link state TRACE_INFO("Link is up (%s)...\r\n", interface->name); //Display actual speed and duplex mode TRACE_INFO("%s %s\r\n", interface->speed100 ? "100BASE-TX" : "10BASE-T", interface->fullDuplex ? "Full-Duplex" : "Half-Duplex"); } else { //Link is down interface->linkState = FALSE; //Display link state TRACE_INFO("Link is down (%s)...\r\n", interface->name); } //Process link state change event nicNotifyLinkChange(interface); } //Check whether a packet has been received? if(status & ISR_PR) { //Clear interrupt flag dm9000WriteReg(DM9000_REG_ISR, ISR_PR); //Process all pending packets do { //Read incoming packet error = dm9000ReceivePacket(interface, interface->ethFrame, ETH_MAX_FRAME_SIZE, &length); //Check whether a valid packet has been received if(!error) { //Pass the packet to the upper layer nicProcessPacket(interface, interface->ethFrame, length); } //No more data in the receive buffer? } while(error != ERROR_BUFFER_EMPTY); } //Re-enable LNKCHGI and PRI interrupts dm9000WriteReg(DM9000_REG_IMR, IMR_PAR | IMR_LNKCHGI | IMR_PTI | IMR_PRI); }
void tm4c129EthEventHandler(NetInterface *interface) { error_t error; size_t length; uint32_t status; //PHY interrupt? if(EMAC0_EPHYRIS_R & EMAC_EPHYRIS_INT) { //Clear PHY interrupt flag EMAC0_EPHYMISC_R = EMAC_EPHYMISC_INT; //Read PHY interrupt status register status = tm4c129EthReadPhyReg(EPHY_MISR1); //Check whether the link state has changed? if(status & EPHY_MISR1_LINKSTAT) { //Read BMSR register status = tm4c129EthReadPhyReg(EPHY_BMSR); //Check whether link is up? if(status & EPHY_BMSR_LINKSTAT) { //Read PHY status register status = tm4c129EthReadPhyReg(EPHY_STS); //Check current speed if(status & EPHY_STS_SPEED) { //10BASE-T operation interface->linkSpeed = NIC_LINK_SPEED_10MBPS; //Update MAC configuration EMAC0_CFG_R &= ~EMAC_CFG_FES; } else { //100BASE-TX operation interface->linkSpeed = NIC_LINK_SPEED_100MBPS; //Update MAC configuration EMAC0_CFG_R |= EMAC_CFG_FES; } //Check current duplex mode if(status & EPHY_STS_DUPLEX) { //Full-Duplex mode interface->duplexMode = NIC_FULL_DUPLEX_MODE; //Update MAC configuration EMAC0_CFG_R |= EMAC_CFG_DUPM; } else { //Half-Duplex mode interface->duplexMode = NIC_HALF_DUPLEX_MODE; //Update MAC configuration EMAC0_CFG_R &= ~EMAC_CFG_DUPM; } //Update link state interface->linkState = TRUE; } else { //Update link state interface->linkState = FALSE; } //Process link state change event nicNotifyLinkChange(interface); } } //Packet received? if(EMAC0_DMARIS_R & EMAC_DMARIS_RI) { //Clear interrupt flag EMAC0_DMARIS_R = EMAC_DMARIS_RI; //Process all pending packets do { //Read incoming packet error = tm4c129EthReceivePacket(interface, interface->ethFrame, ETH_MAX_FRAME_SIZE, &length); //Check whether a valid packet has been received if(!error) { //Pass the packet to the upper layer nicProcessPacket(interface, interface->ethFrame, length); } //No more data in the receive buffer? } while(error != ERROR_BUFFER_EMPTY); } //Re-enable DMA interrupts EMAC0_DMAIM_R |= EMAC_DMAIM_NIE | EMAC_DMAIM_RIE | EMAC_DMAIM_TIE; //Re-enable PHY interrupts EMAC0_EPHYIM_R |= EMAC_EPHYIM_INT; }