static void build_color_shaders(struct nir_shader **out_vs, struct nir_shader **out_fs, uint32_t frag_output) { nir_builder vs_b; nir_builder fs_b; nir_builder_init_simple_shader(&vs_b, NULL, MESA_SHADER_VERTEX, NULL); nir_builder_init_simple_shader(&fs_b, NULL, MESA_SHADER_FRAGMENT, NULL); vs_b.shader->info.name = ralloc_strdup(vs_b.shader, "meta_clear_color_vs"); fs_b.shader->info.name = ralloc_strdup(fs_b.shader, "meta_clear_color_fs"); const struct glsl_type *position_type = glsl_vec4_type(); const struct glsl_type *color_type = glsl_vec4_type(); nir_variable *vs_out_pos = nir_variable_create(vs_b.shader, nir_var_shader_out, position_type, "gl_Position"); vs_out_pos->data.location = VARYING_SLOT_POS; nir_intrinsic_instr *in_color_load = nir_intrinsic_instr_create(fs_b.shader, nir_intrinsic_load_push_constant); nir_intrinsic_set_base(in_color_load, 0); nir_intrinsic_set_range(in_color_load, 16); in_color_load->src[0] = nir_src_for_ssa(nir_imm_int(&fs_b, 0)); in_color_load->num_components = 4; nir_ssa_dest_init(&in_color_load->instr, &in_color_load->dest, 4, 32, "clear color"); nir_builder_instr_insert(&fs_b, &in_color_load->instr); nir_variable *fs_out_color = nir_variable_create(fs_b.shader, nir_var_shader_out, color_type, "f_color"); fs_out_color->data.location = FRAG_RESULT_DATA0 + frag_output; nir_store_var(&fs_b, fs_out_color, &in_color_load->dest.ssa, 0xf); nir_ssa_def *outvec = radv_meta_gen_rect_vertices(&vs_b); nir_store_var(&vs_b, vs_out_pos, outvec, 0xf); const struct glsl_type *layer_type = glsl_int_type(); nir_variable *vs_out_layer = nir_variable_create(vs_b.shader, nir_var_shader_out, layer_type, "v_layer"); vs_out_layer->data.location = VARYING_SLOT_LAYER; vs_out_layer->data.interpolation = INTERP_MODE_FLAT; nir_ssa_def *inst_id = nir_load_system_value(&vs_b, nir_intrinsic_load_instance_id, 0); nir_ssa_def *base_instance = nir_load_system_value(&vs_b, nir_intrinsic_load_base_instance, 0); nir_ssa_def *layer_id = nir_iadd(&vs_b, inst_id, base_instance); nir_store_var(&vs_b, vs_out_layer, layer_id, 0x1); *out_vs = vs_b.shader; *out_fs = fs_b.shader; }
static nir_shader * build_resolve_fragment_shader(struct radv_device *dev, bool is_integer, int samples) { nir_builder b; char name[64]; const struct glsl_type *vec2 = glsl_vector_type(GLSL_TYPE_FLOAT, 2); const struct glsl_type *vec4 = glsl_vec4_type(); const struct glsl_type *sampler_type = glsl_sampler_type(GLSL_SAMPLER_DIM_MS, false, false, GLSL_TYPE_FLOAT); snprintf(name, 64, "meta_resolve_fs-%d-%s", samples, is_integer ? "int" : "float"); nir_builder_init_simple_shader(&b, NULL, MESA_SHADER_FRAGMENT, NULL); b.shader->info.name = ralloc_strdup(b.shader, name); nir_variable *input_img = nir_variable_create(b.shader, nir_var_uniform, sampler_type, "s_tex"); input_img->data.descriptor_set = 0; input_img->data.binding = 0; nir_variable *fs_pos_in = nir_variable_create(b.shader, nir_var_shader_in, vec2, "fs_pos_in"); fs_pos_in->data.location = VARYING_SLOT_POS; nir_variable *color_out = nir_variable_create(b.shader, nir_var_shader_out, vec4, "f_color"); color_out->data.location = FRAG_RESULT_DATA0; nir_ssa_def *pos_in = nir_load_var(&b, fs_pos_in); nir_intrinsic_instr *src_offset = nir_intrinsic_instr_create(b.shader, nir_intrinsic_load_push_constant); nir_intrinsic_set_base(src_offset, 0); nir_intrinsic_set_range(src_offset, 8); src_offset->src[0] = nir_src_for_ssa(nir_imm_int(&b, 0)); src_offset->num_components = 2; nir_ssa_dest_init(&src_offset->instr, &src_offset->dest, 2, 32, "src_offset"); nir_builder_instr_insert(&b, &src_offset->instr); nir_ssa_def *pos_int = nir_f2i32(&b, pos_in); nir_ssa_def *img_coord = nir_channels(&b, nir_iadd(&b, pos_int, &src_offset->dest.ssa), 0x3); nir_variable *color = nir_local_variable_create(b.impl, glsl_vec4_type(), "color"); radv_meta_build_resolve_shader_core(&b, is_integer, samples, input_img, color, img_coord); nir_ssa_def *outval = nir_load_var(&b, color); nir_store_var(&b, color_out, outval, 0xf); return b.shader; }
static void _vtn_load_store_tail(struct vtn_builder *b, nir_intrinsic_op op, bool load, nir_ssa_def *index, nir_ssa_def *offset, struct vtn_ssa_value **inout, const struct glsl_type *type) { nir_intrinsic_instr *instr = nir_intrinsic_instr_create(b->nb.shader, op); instr->num_components = glsl_get_vector_elements(type); int src = 0; if (!load) { nir_intrinsic_set_write_mask(instr, (1 << instr->num_components) - 1); instr->src[src++] = nir_src_for_ssa((*inout)->def); } /* We set the base and size for push constant load to the entire push * constant block for now. */ if (op == nir_intrinsic_load_push_constant) { nir_intrinsic_set_base(instr, 0); nir_intrinsic_set_range(instr, 128); } if (index) instr->src[src++] = nir_src_for_ssa(index); instr->src[src++] = nir_src_for_ssa(offset); if (load) { nir_ssa_dest_init(&instr->instr, &instr->dest, instr->num_components, glsl_get_bit_size(glsl_get_base_type(type)), NULL); (*inout)->def = &instr->dest.ssa; } nir_builder_instr_insert(&b->nb, &instr->instr); if (load && glsl_get_base_type(type) == GLSL_TYPE_BOOL) (*inout)->def = nir_ine(&b->nb, (*inout)->def, nir_imm_int(&b->nb, 0)); }
static nir_shader * create_passthrough_tcs(void *mem_ctx, const struct brw_compiler *compiler, const nir_shader_compiler_options *options, const struct brw_tcs_prog_key *key) { nir_builder b; nir_builder_init_simple_shader(&b, mem_ctx, MESA_SHADER_TESS_CTRL, options); nir_shader *nir = b.shader; nir_variable *var; nir_intrinsic_instr *load; nir_intrinsic_instr *store; nir_ssa_def *zero = nir_imm_int(&b, 0); nir_ssa_def *invoc_id = nir_load_system_value(&b, nir_intrinsic_load_invocation_id, 0); nir->info->inputs_read = key->outputs_written; nir->info->outputs_written = key->outputs_written; nir->info->tcs.vertices_out = key->input_vertices; nir->info->name = ralloc_strdup(nir, "passthrough"); nir->num_uniforms = 8 * sizeof(uint32_t); var = nir_variable_create(nir, nir_var_uniform, glsl_vec4_type(), "hdr_0"); var->data.location = 0; var = nir_variable_create(nir, nir_var_uniform, glsl_vec4_type(), "hdr_1"); var->data.location = 1; /* Write the patch URB header. */ for (int i = 0; i <= 1; i++) { load = nir_intrinsic_instr_create(nir, nir_intrinsic_load_uniform); load->num_components = 4; load->src[0] = nir_src_for_ssa(zero); nir_ssa_dest_init(&load->instr, &load->dest, 4, 32, NULL); nir_intrinsic_set_base(load, i * 4 * sizeof(uint32_t)); nir_builder_instr_insert(&b, &load->instr); store = nir_intrinsic_instr_create(nir, nir_intrinsic_store_output); store->num_components = 4; store->src[0] = nir_src_for_ssa(&load->dest.ssa); store->src[1] = nir_src_for_ssa(zero); nir_intrinsic_set_base(store, VARYING_SLOT_TESS_LEVEL_INNER - i); nir_intrinsic_set_write_mask(store, WRITEMASK_XYZW); nir_builder_instr_insert(&b, &store->instr); } /* Copy inputs to outputs. */ uint64_t varyings = key->outputs_written; while (varyings != 0) { const int varying = ffsll(varyings) - 1; load = nir_intrinsic_instr_create(nir, nir_intrinsic_load_per_vertex_input); load->num_components = 4; load->src[0] = nir_src_for_ssa(invoc_id); load->src[1] = nir_src_for_ssa(zero); nir_ssa_dest_init(&load->instr, &load->dest, 4, 32, NULL); nir_intrinsic_set_base(load, varying); nir_builder_instr_insert(&b, &load->instr); store = nir_intrinsic_instr_create(nir, nir_intrinsic_store_per_vertex_output); store->num_components = 4; store->src[0] = nir_src_for_ssa(&load->dest.ssa); store->src[1] = nir_src_for_ssa(invoc_id); store->src[2] = nir_src_for_ssa(zero); nir_intrinsic_set_base(store, varying); nir_intrinsic_set_write_mask(store, WRITEMASK_XYZW); nir_builder_instr_insert(&b, &store->instr); varyings &= ~BITFIELD64_BIT(varying); } nir_validate_shader(nir); nir = brw_preprocess_nir(compiler, nir); return nir; }