uint32_t Nmi_Tuner_Interface_init_chip(tTnrInit* pcfg)
{
int result;
nmi_tuner_os_memset((void *)&gChipNowInfo, 0, sizeof(tNmiInterfaceGlobal));
nmi_tuner_os_chip_power_on();
nmi_tuner_os_chip_enable();
result = nmi_drv_ctl(NMI_DRV_INIT, (void *)pcfg);
if(result < 0)
{
nmi_tuner_os_log(">> NMI_DRV_INIT failed. result = %d\n", result);
gChipNowInfo.bInit = FALSE;
return FALSE;
}
//Leo else
{
uint32_t chipid;
tNmiDriverVer ver;
nmi_drv_ctl(NMI_DRV_VERSION, &ver);
nmi_tuner_os_log("[NMI] driver version (%d.%d.%d.%d) build %d\n", ver.major, ver.minor, ver.rev1, ver.rev2, ver.buildrev);
nmi_drv_ctl(NMI_DRV_GET_CHIPID, &chipid);
nmi_tuner_os_log("[NMI] Chip ID:");
nmi_tuner_os_log("%4x:",(uint16_t)(chipid>>16));
nmi_tuner_os_log("%4x\n",(uint16_t)((chipid<<16)>>16));
gChipNowInfo.chip_id = chipid;
}
gChipNowInfo.bSleep = FALSE;
gChipNowInfo.bInit = TRUE;
gChipNowInfo.btuned = FALSE;
gChipNowInfo.jiffies = nmi_tuner_os_get_tick();
if(ISNM120(gChipNowInfo.chip_id))//only 120
{
Nmi_Tuner_Interface_LoopThrough();
nmi_tuner_os_log("before nmi_tuner_os_create_task\n");
nmi_tuner_os_create_mutex(&gChipNowInfo.mutex);
nmi_tuner_os_create_task((NmiTaskEntry)Nmi_Tuner_Task);
}
return TRUE;
}
static uint8_t Nmi_Tuner_Interface_Reset_Moaic(void)
{
if(gChipNowInfo.bSleep == TRUE)
return TRUE;
nmi_drv_ctl(NMI_DRV_RESET_DEMOD_MOSAIC,NULL);
return TRUE;
}
static uint8_t Nmi_Tuner_Interface_LoopThrough(void)
{
//int result;
tTnrInit cfg;
tTnrLtCtrl ltCtl;
//tTnrStatus status;
nmi_tuner_os_memset((void *)&cfg, 0, sizeof(tTnrInit));
ltCtl.enable = TRUE;
if(nmi_drv_ctl(NMI_DRV_LT_CTRL, (void *)<Ctl)<0)
{
return FALSE;
}
nmi_drv_ctl(NMI_DRV_WAKE_UP_LT, NULL);
return TRUE;
}
uint8_t GetLockStatus(void)
{
tTnrStatus status;
if(nmi_drv_ctl(NMI_DRV_GET_STATUS,(void *)&status)<0)
{
return 0;
}
return status.ds.agclock;
}
void Nmi_Tuner_Interface_Wake_Up_Lt(void)
{
gChipNowInfo.bSleep = FALSE;
nmi_drv_ctl(NMI_DRV_WAKE_UP_LT, NULL);
if(ISNM120(gChipNowInfo.chip_id))//only 120
{
nmi_tuner_os_create_task((NmiTaskEntry)Nmi_Tuner_Task);
}
}
void Nmi_Tuner_Interface_Sleep_Lt(void)
{
gChipNowInfo.bSleep = TRUE;
/*if(ISNM120(gChipNowInfo.chip_id))//only 120
{
nmi_tuner_os_delete_task();
nmi_tuner_os_log("nmi_tuner_os_delete_task~~~~~~~~111111111111~~~~~~~\n");
}*/
nmi_tuner_os_log("Nmi_Tuner_Interface_Sleep_Lt ~~~~~~~~~~~~\n");
nmi_drv_ctl(NMI_DRV_SLEEP_LT, NULL);
}
int Nmi_Tuner_Interface_GetLockStatus(void)
{
tTnrStatus status;
if(nmi_drv_ctl(NMI_DRV_GET_STATUS,&status)<0)
{
return 0;
}
return status.ds.agclock;
}
int16_t Nmi_Tuner_Interface_GetRSSI(void)
{
int16_t rssi;
tTnrStatus status;
if(nmi_drv_ctl(NMI_DRV_GET_STATUS,&status)<0)
{
return 0;
}
rssi = (int16_t)status.gain.rssix100/100;
return rssi;
}
uint32_t Nmi_Tuner_Interface_deinit_chip(void)
{
if(ISNM120(gChipNowInfo.chip_id))//only 120
{
nmi_tuner_os_log("Nmi_Tuner_Interface_deinit_chip\n");
nmi_tuner_os_delete_task();
nmi_tuner_os_delete_mutex(&gChipNowInfo.mutex);
}
nmi_drv_ctl(NMI_DRV_DEINIT, NULL);
nmi_tuner_os_chip_power_off();
gChipNowInfo.bSleep = FALSE;
gChipNowInfo.bInit = FALSE;
gChipNowInfo.btuned = FALSE;
return TRUE;
}
uint8_t GetRSSI(uint8_t outputChoice)
{
int rssi;
tTnrStatus status;
if(nmi_drv_ctl(NMI_DRV_GET_STATUS,(void *)&status)<0)
{
return 0;
}
rssi = (int)status.gain.rssix100/100;
if (1 == outputChoice) // for percent value
{
if ((rssi<=0) && (rssi>=-100))
{
rssi = ABS(rssi);
if(rssi>85)
rssi = 0;
else if(rssi > 45)
rssi = (85-rssi)*100/40;
else
rssi = 100;
}
else
{
if (rssi > 0)
{
rssi = 100;
}
if (rssi < -100)
{
rssi = 0;
}
}
}
// nmi_tuner_os_log("[NMI]SSI=%d\n",rssi);
return rssi;
}
static void NMI120_ShowAsicPara(void)
{
tTnrStatus status;
if(nmi_drv_ctl(NMI_DRV_GET_STATUS,(void*)(&status))<0)
{
//nmi_tuner_os_log("[NMI ASIC] Failed to get status!!!\n");
return ;
}
//nmi_tuner_os_log("[NMI ASIC] AGC Lock: %d\n", status.ds.agclock);
//nmi_tuner_os_log("[NMI ASIC] Dagc: %2.3f\n", ((double)status.ds.dagc)/(1ul << 15));
//nmi_tuner_os_log("[NMI ASIC] Rssi: %3.2f dBm\n", status.gain.rssix100/100.0);
//nmi_tuner_os_log("[NMI ASIC] Lna Code: %02x\n", (uint8_t)status.gain.lnacode);
//nmi_tuner_os_log("[NMI ASIC] Lna Gain: %2.1f\n", status.gain.lnadbx100/100.0);
//nmi_tuner_os_log("[NMI ASIC] BBLI Code: %02x\n", (uint8_t)status.gain.bblicode);
//nmi_tuner_os_log("[NMI ASIC] BBLI Cain: %2.1f\n", status.gain.bblidbx100/100.0);
return ;
}
static uint8_t Nmi_Tuner_Interface_SelfTune(tNMI_TUNE_PARAM* param)
{
uint8_t ret = TRUE;
tTnrTune tune;
nmi_tuner_os_memset((void *)&tune, 0x00, sizeof(tTnrTune));
tune.aif = param->aif;
tune.dacSel = param->dacsel;
tune.is_stereo = param->is_stereo;
tune.output = param->output;
tune.rf = param->freq;
tune.vif = param->if_freq;
tune.rfinvert = param->freq_invert;
switch(param->tvstd)
{
case NMI_NTSC:
{
//add codes
tune.std = nNTSC;
}
break;
case NMI_PAL_G:
{
//add codes
}
break;
case NMI_PAL_M:
{
//add codes
}
break;
case NMI_PAL_N:
{
//add codes
}
break;
case NMI_PAL_K:
{
//add codes
}
break;
case NMI_PAL_L:
{
//add codes
}
break;
case NMI_PAL_D:
{
//add codes
}
break;
case NMI_SECAM_L:
{
//add codes
}
break;
case NMI_SECAM_B:
{
//add codes
}
break;
case NMI_SECAM_D:
{
//add codes
}
break;
case NMI_ATSC_8VSB:
case NMI_ATSC_64QAM:
case NMI_ATSC_256QAM:
{
//add codes
nmi_tuner_os_log("mode NMI_ATSC %d\n",param->ucBw);
switch(param->ucBw)
{
case 0:
case 6: tune.std = nDTV_6; break;
case 1:
case 7: tune.std = nDTV_7; break;
case 2:
case 8:
default:
tune.std = nDTV_8; break;
}
}
break;
case NMI_DVBT:
case NMI_DVBT2:
{
//add codes
switch(param->ucBw)
{
case 0:
case 6: tune.std = nDTV_6; break;
case 1:
case 7: tune.std = nDTV_7; break;
case 2:
case 8:
default:
tune.std = nDTV_8; break;
}
}
break;
case NMI_DVBC:
{
//add codes
uint32_t tempfreq;
tempfreq = tune.rf/1000000;
if(tempfreq%3 != 0)
{
tune.rf = tune.rf + 1000;
}
switch(param->ucBw)
{
case 0:
case 6: tune.std = nDTV_6; break;
case 1:
case 7: tune.std = nDTV_7; break;
case 2:
case 8:
default:
tune.std = nDTV_8; break;
}
}
break;
case NMI_DTMB:
{
//add codes
switch(param->ucBw)
{
case 0:
case 6: tune.std = nDTV_6; break;
case 1:
case 7: tune.std = nDTV_7; break;
case 2:
case 8:
default:
tune.std = nDTV_8; break;
}
}
break;
case NMI_ISDBT:
{
//add codes
}
break;
default:
{
//add codes
}
break;
}
if(param->tvstd <= NMI_SECAM_D &&( param->output == nCvbsSif || param->output == nCvbsBBAud))
{
if(nmi_drv_ctl(NMI_DRV_TUNE, &tune) == 0)
{
nmi_tuner_os_log("\n tuneFail......\n");
ret = FALSE;
}
}
else
{
if(nmi_drv_ctl(NMI_DRV_TUNE, &tune) < 0)
{
nmi_tuner_os_log("\n tuneFail......\n");
ret = FALSE;
}
if(param->if_freq_invert == TRUE)
{
int spectrum = 1;
nmi_drv_ctl(NMI_DRV_INVERT_SPECTRUM, (void *)(&spectrum));
nmi_tuner_os_log("\n swan if invert \n");
}
}
if(param->tvstd == NMI_DVBC)//yao jin masic bugs //swan 2012_5_14 honestar
{
uint32_t tempfreq;
tempfreq = tune.rf/1000000;
if(tempfreq%3 == 0)
{
Nmi_Tuner_Interface_Wreg(0x1b,0x08);
}
else
{
Nmi_Tuner_Interface_Wreg(0x1b,0x0e);
}
if(tempfreq<726)
{
if(tempfreq == 602 || tempfreq ==650 || tempfreq ==690 || tempfreq ==698 || tempfreq ==706)
{
Nmi_Tuner_Interface_Wreg(0x05,0x85);
}
else
{
Nmi_Tuner_Interface_Wreg(0x05,0x05);
}
}
else
{
Nmi_Tuner_Interface_Wreg(0x05,0x85);
}
}
if(param->tvstd == NMI_DTMB)//swan 2012_6_1 honestar for C/N
{
Nmi_Tuner_Interface_Wreg(0x0e,0x25);
}
nmi_tuner_os_log("gChipNowInfo.currentparam.freq(%d) \n",gChipNowInfo.currentparam.freq);
nmi_tuner_os_memcpy((void*)&gChipNowInfo.currentparam,param,sizeof(tNMI_TUNE_PARAM));
return ret;
}
