ret_code_t nrf_drv_clock_calibration_start(uint8_t interval, nrf_drv_clock_event_handler_t handler) { #if CALIBRATION_SUPPORT ASSERT(m_clock_cb.cal_state == CAL_STATE_IDLE); ret_code_t ret = NRF_SUCCESS; if (m_clock_cb.lfclk_on == false) { ret = NRF_ERROR_INVALID_STATE; } else if (m_clock_cb.cal_state == CAL_STATE_IDLE) { m_clock_cb.cal_done_handler = handler; m_clock_cb.cal_hfclk_started_handler_item.event_handler = clock_calibration_hf_started; if (interval == 0) { m_clock_cb.cal_state = CAL_STATE_HFCLK_REQ; nrf_drv_clock_hfclk_request(&m_clock_cb.cal_hfclk_started_handler_item); } else { m_clock_cb.cal_state = CAL_STATE_CT; nrf_clock_cal_timer_timeout_set(interval); nrf_clock_int_enable(NRF_CLOCK_INT_CTTO_MASK); nrf_clock_task_trigger(NRF_CLOCK_TASK_CTSTART); } } else { ret = NRF_ERROR_BUSY; } return ret; #else //CALIBRATION_SUPPORT return NRF_ERROR_FORBIDDEN; #endif }
otError otPlatUartEnable(void) { otError error = OT_ERROR_NONE; otEXPECT_ACTION(sUartEnabled == false, error = OT_ERROR_ALREADY); // Set up TX and RX pins. nrf_gpio_pin_set(UART_PIN_TX); nrf_gpio_cfg_output(UART_PIN_TX); nrf_gpio_cfg_input(UART_PIN_RX, NRF_GPIO_PIN_NOPULL); nrf_uart_txrx_pins_set(UART_INSTANCE, UART_PIN_TX, UART_PIN_RX); #if (UART_HWFC == NRF_UART_HWFC_ENABLED) // Set up CTS and RTS pins. nrf_gpio_cfg_input(UART_PIN_CTS, NRF_GPIO_PIN_NOPULL); nrf_gpio_pin_set(UART_PIN_RTS); nrf_gpio_cfg_output(UART_PIN_RTS); nrf_uart_hwfc_pins_set(UART_INSTANCE, UART_PIN_RTS, UART_PIN_CTS); #endif // Configure baudrate. nrf_uart_baudrate_set(UART_INSTANCE, UART_BAUDRATE); // Configure parity and hardware flow control. nrf_uart_configure(UART_INSTANCE, UART_PARITY, UART_HWFC); // Clear UART specific events. nrf_uart_event_clear(UART_INSTANCE, NRF_UART_EVENT_TXDRDY); nrf_uart_event_clear(UART_INSTANCE, NRF_UART_EVENT_ERROR); nrf_uart_event_clear(UART_INSTANCE, NRF_UART_EVENT_RXDRDY); // Enable interrupts for TX. nrf_uart_int_enable(UART_INSTANCE, NRF_UART_INT_MASK_TXDRDY); // Enable interrupts for RX. nrf_uart_int_enable(UART_INSTANCE, NRF_UART_INT_MASK_RXDRDY | NRF_UART_INT_MASK_ERROR); // Configure NVIC to handle UART interrupts. NVIC_SetPriority(UART_IRQN, UART_IRQ_PRIORITY); NVIC_ClearPendingIRQ(UART_IRQN); NVIC_EnableIRQ(UART_IRQN); // Start HFCLK nrf_drv_clock_hfclk_request(NULL); while (!nrf_drv_clock_hfclk_is_running()) { } // Enable UART instance, and start RX on it. nrf_uart_enable(UART_INSTANCE); nrf_uart_task_trigger(UART_INSTANCE, NRF_UART_TASK_STARTRX); sUartEnabled = true; exit: return error; }
otError otPlatUartEnable(void) { // Start HFCLK nrf_drv_clock_hfclk_request(NULL); while (!nrf_drv_clock_hfclk_is_running()) {} // Enable UART instance, and start RX on it. nrf_uart_enable(UART_INSTANCE); nrf_uart_task_trigger(UART_INSTANCE, NRF_UART_TASK_STARTRX); return OT_ERROR_NONE; }
void POWER_CLOCK_IRQHandler(void) #endif { if (nrf_clock_event_check(NRF_CLOCK_EVENT_HFCLKSTARTED)) { nrf_clock_event_clear(NRF_CLOCK_EVENT_HFCLKSTARTED); NRF_LOG_DEBUG("Event: %s.\r\n", (uint32_t)EVT_TO_STR(NRF_CLOCK_EVENT_HFCLKSTARTED)); nrf_clock_int_disable(NRF_CLOCK_INT_HF_STARTED_MASK); m_clock_cb.hfclk_on = true; clock_clk_started_notify(NRF_DRV_CLOCK_EVT_HFCLK_STARTED); } if (nrf_clock_event_check(NRF_CLOCK_EVENT_LFCLKSTARTED)) { nrf_clock_event_clear(NRF_CLOCK_EVENT_LFCLKSTARTED); NRF_LOG_DEBUG("Event: %s.\r\n", (uint32_t)EVT_TO_STR(NRF_CLOCK_EVENT_LFCLKSTARTED)); nrf_clock_int_disable(NRF_CLOCK_INT_LF_STARTED_MASK); m_clock_cb.lfclk_on = true; clock_clk_started_notify(NRF_DRV_CLOCK_EVT_LFCLK_STARTED); } #if CALIBRATION_SUPPORT if (nrf_clock_event_check(NRF_CLOCK_EVENT_CTTO)) { nrf_clock_event_clear(NRF_CLOCK_EVENT_CTTO); NRF_LOG_DEBUG("Event: %s.\r\n", (uint32_t)EVT_TO_STR(NRF_CLOCK_EVENT_CTTO)); nrf_clock_int_disable(NRF_CLOCK_INT_CTTO_MASK); nrf_drv_clock_hfclk_request(&m_clock_cb.cal_hfclk_started_handler_item); } if (nrf_clock_event_check(NRF_CLOCK_EVENT_DONE)) { nrf_clock_event_clear(NRF_CLOCK_EVENT_DONE); NRF_LOG_DEBUG("Event: %s.\r\n", (uint32_t)EVT_TO_STR(NRF_CLOCK_EVENT_DONE)); nrf_clock_int_disable(NRF_CLOCK_INT_DONE_MASK); nrf_drv_clock_hfclk_release(); bool aborted = (m_clock_cb.cal_state == CAL_STATE_ABORT); m_clock_cb.cal_state = CAL_STATE_IDLE; if (m_clock_cb.cal_done_handler) { m_clock_cb.cal_done_handler(aborted ? NRF_DRV_CLOCK_EVT_CAL_ABORTED : NRF_DRV_CLOCK_EVT_CAL_DONE); } } #endif // CALIBRATION_SUPPORT }
void POWER_CLOCK_IRQHandler(void) { if (nrf_clock_event_check(NRF_CLOCK_EVENT_HFCLKSTARTED)) { nrf_clock_event_clear(NRF_CLOCK_EVENT_HFCLKSTARTED); nrf_clock_int_disable(NRF_CLOCK_INT_HF_STARTED_MASK); m_clock_cb.hfclk_on = true; clock_clk_started_notify((nrf_drv_clock_handler_item_t **)&m_clock_cb.p_hf_head, NRF_DRV_CLOCK_EVT_HFCLK_STARTED); } if (nrf_clock_event_check(NRF_CLOCK_EVENT_LFCLKSTARTED)) { nrf_clock_event_clear(NRF_CLOCK_EVENT_LFCLKSTARTED); nrf_clock_int_disable(NRF_CLOCK_INT_LF_STARTED_MASK); m_clock_cb.lfclk_on = true; clock_clk_started_notify((nrf_drv_clock_handler_item_t **)&m_clock_cb.p_lf_head, NRF_DRV_CLOCK_EVT_LFCLK_STARTED); } #if CALIBRATION_SUPPORT if (nrf_clock_event_check(NRF_CLOCK_EVENT_CTTO)) { nrf_clock_event_clear(NRF_CLOCK_EVENT_CTTO); nrf_clock_int_disable(NRF_CLOCK_INT_CTTO_MASK); nrf_drv_clock_hfclk_request(&m_clock_cb.cal_hfclk_started_handler_item); } if (nrf_clock_event_check(NRF_CLOCK_EVENT_DONE)) { nrf_clock_event_clear(NRF_CLOCK_EVENT_DONE); nrf_clock_int_disable(NRF_CLOCK_INT_DONE_MASK); nrf_drv_clock_hfclk_release(); nrf_drv_clock_evt_type_t evt_type = (m_clock_cb.cal_state == CAL_STATE_ABORT) ? NRF_DRV_CLOCK_EVT_CAL_ABORTED : NRF_DRV_CLOCK_EVT_CAL_DONE; m_clock_cb.cal_state = CAL_STATE_IDLE; if (m_clock_cb.cal_done_handler) { m_clock_cb.cal_done_handler(evt_type); } } #endif //CALIBRATION_SUPPORT }
ret_code_t nrf_drv_clock_calibration_start(uint8_t interval, nrf_drv_clock_event_handler_t handler) { ret_code_t err_code = NRF_SUCCESS; #if CALIBRATION_SUPPORT ASSERT(m_clock_cb.cal_state == CAL_STATE_IDLE); if (m_clock_cb.lfclk_on == false) { err_code = NRF_ERROR_INVALID_STATE; } else if (m_clock_cb.cal_state == CAL_STATE_IDLE) { m_clock_cb.cal_done_handler = handler; m_clock_cb.cal_hfclk_started_handler_item.event_handler = clock_calibration_hf_started; if (interval == 0) { m_clock_cb.cal_state = CAL_STATE_HFCLK_REQ; nrf_drv_clock_hfclk_request(&m_clock_cb.cal_hfclk_started_handler_item); } else { m_clock_cb.cal_state = CAL_STATE_CT; nrf_clock_cal_timer_timeout_set(interval); nrf_clock_event_clear(NRF_CLOCK_EVENT_CTTO); nrf_clock_int_enable(NRF_CLOCK_INT_CTTO_MASK); nrf_clock_task_trigger(NRF_CLOCK_TASK_CTSTART); } } else { err_code = NRF_ERROR_BUSY; } NRF_LOG_WARNING("Function: %s, error code: %s.\r\n", (uint32_t)__func__, (uint32_t)ERR_TO_STR(err_code)); return err_code; #else err_code = NRF_ERROR_FORBIDDEN; NRF_LOG_WARNING("Function: %s, error code: %s.\r\n", (uint32_t)__func__, (uint32_t)ERR_TO_STR(err_code)); return err_code; #endif // CALIBRATION_SUPPORT }
/** @brief Function starting the HFCLK oscillator. */ static void hfclk_config(void) { ret_code_t err_code = nrf_drv_clock_init(); APP_ERROR_CHECK(err_code); nrf_drv_clock_hfclk_request(NULL); }