static int mulle_nvram_init(void)
{
union {
uint32_t u32;
uint8_t u8[sizeof(uint32_t)];
} rec;
rec.u32 = 0;
if (spi_init_master(MULLE_NVRAM_SPI_DEV, SPI_CONF_FIRST_RISING, SPI_SPEED_5MHZ) != 0) {
return -1;
}
if (nvram_spi_init(mulle_nvram, &nvram_spi_params, MULLE_NVRAM_CAPACITY) != 0) {
return -2;
}
if (mulle_nvram->read(mulle_nvram, &rec.u8[0], MULLE_NVRAM_MAGIC, sizeof(rec.u32)) != sizeof(rec.u32)) {
return -3;
}
if (rec.u32 != MULLE_NVRAM_MAGIC_EXPECTED) {
int i;
union {
uint64_t u64;
uint8_t u8[sizeof(uint64_t)];
} zero;
zero.u64 = 0;
for (i = 0; i < MULLE_NVRAM_CAPACITY; i += sizeof(zero)) {
if (mulle_nvram->write(mulle_nvram, &zero.u8[0], i, sizeof(zero.u64)) != sizeof(zero.u64)) {
return -4;
}
}
rec.u32 = MULLE_NVRAM_MAGIC_EXPECTED;
if (mulle_nvram->write(mulle_nvram, &rec.u8[0], MULLE_NVRAM_MAGIC, sizeof(rec.u32)) != sizeof(rec.u32)) {
return -5;
}
}
return 0;
}
static int mulle_nvram_init(void)
{
union {
uint32_t u32;
uint8_t u8[sizeof(uint32_t)];
} rec;
rec.u32 = 0;
if (nvram_spi_init(mulle_nvram, &nvram_spi_params, MULLE_NVRAM_CAPACITY) != 0) {
return -2;
}
if (mulle_nvram->read(mulle_nvram, &rec.u8[0], MULLE_NVRAM_MAGIC, sizeof(rec.u32)) != sizeof(rec.u32)) {
return -3;
}
if (rec.u32 != MULLE_NVRAM_MAGIC_EXPECTED) {
int i;
union {
uint64_t u64;
uint8_t u8[sizeof(uint64_t)];
} zero;
zero.u64 = 0;
for (i = 0; i < MULLE_NVRAM_CAPACITY; i += sizeof(zero)) {
if (mulle_nvram->write(mulle_nvram, &zero.u8[0], i, sizeof(zero.u64)) != sizeof(zero.u64)) {
return -4;
}
}
rec.u32 = MULLE_NVRAM_MAGIC_EXPECTED;
if (mulle_nvram->write(mulle_nvram, &rec.u8[0], MULLE_NVRAM_MAGIC, sizeof(rec.u32)) != sizeof(rec.u32)) {
return -5;
}
}
/* Register DevFS node */
devfs_register(&mulle_nvram_devfs);
return 0;
}
int main(void)
{
uint32_t i;
nvram_spi_params_t spi_params = {
.spi = TEST_NVRAM_SPI_DEV,
.cs = TEST_NVRAM_SPI_CS,
.address_count = TEST_NVRAM_SPI_ADDRESS_COUNT,
};
nvram_t dev;
uint32_t start_delay = 10;
puts("NVRAM SPI test application starting...");
printf("Initializing SPI_%i... ", TEST_NVRAM_SPI_DEV);
if (spi_init_master(TEST_NVRAM_SPI_DEV, SPI_CONF, SPI_SPEED_10MHZ) == 0) {
puts("[OK]");
}
else {
puts("[Failed]\n");
return 1;
}
puts("Initializing NVRAM SPI device descriptor... ");
if (nvram_spi_init(&dev, &spi_params, TEST_NVRAM_SPI_SIZE) == 0) {
puts("[OK]");
}
else {
puts("[Failed]\n");
return 1;
}
puts("NVRAM SPI init done.\n");
puts("!!! This test will erase everything on the NVRAM !!!");
puts("!!! Unplug/reset/halt device now if this is not acceptable !!!");
puts("Waiting for 10 seconds before continuing...");
xtimer_sleep(start_delay);
puts("Reading current memory contents...");
for (i = 0; i < TEST_NVRAM_SPI_SIZE; ++i) {
if (dev.read(&dev, &buf_in[i], i, 1) != 1) {
puts("[Failed]\n");
return 1;
}
}
puts("[OK]");
puts("NVRAM contents before test:");
print_buffer(buf_in, sizeof(buf_in));
puts("Writing bytewise 0xFF to device");
memset(buf_out, 0xff, sizeof(buf_out));
for (i = 0; i < TEST_NVRAM_SPI_SIZE; ++i) {
if (dev.write(&dev, &buf_out[i], i, 1) != 1) {
puts("[Failed]\n");
return 1;
}
if (buf_out[i] != 0xff) {
puts("nvram_spi_write modified *src!");
printf(" i = %08lx\n", (unsigned long) i);
puts("[Failed]\n");
return 1;
}
}
puts("Reading back blockwise");
memset(buf_in, 0x00, sizeof(buf_in));
if (dev.read(&dev, buf_in, 0, TEST_NVRAM_SPI_SIZE) != TEST_NVRAM_SPI_SIZE) {
puts("[Failed]\n");
return 1;
}
puts("[OK]");
puts("Verifying contents...");
if (memcmp(buf_in, buf_out, TEST_NVRAM_SPI_SIZE) != 0) {
puts("[Failed]\n");
return 1;
}
puts("[OK]");
puts("Writing blockwise address complement to device");
for (i = 0; i < TEST_NVRAM_SPI_SIZE; ++i) {
buf_out[i] = (~(i)) & 0xff;
}
if (dev.write(&dev, buf_out, 0, TEST_NVRAM_SPI_SIZE) != TEST_NVRAM_SPI_SIZE) {
puts("[Failed]\n");
return 1;
}
puts("[OK]");
puts("buf_out:");
print_buffer(buf_out, sizeof(buf_out));
puts("Reading back blockwise");
memset(buf_in, 0x00, sizeof(buf_in));
if (dev.read(&dev, buf_in, 0, TEST_NVRAM_SPI_SIZE) != TEST_NVRAM_SPI_SIZE) {
puts("[Failed]\n");
return 1;
}
puts("[OK]");
puts("Verifying contents...");
if (memcmp(buf_in, buf_out, TEST_NVRAM_SPI_SIZE) != 0) {
puts("buf_in:");
print_buffer(buf_in, sizeof(buf_in));
puts("[Failed]\n");
return 1;
}
puts("[OK]");
puts("Generating pseudo-random test data...");
for (i = 0; i < TEST_NVRAM_SPI_SIZE; ++i) {
buf_out[i] = lcg_rand8();
}
puts("buf_out:");
print_buffer(buf_out, sizeof(buf_out));
puts("Writing blockwise data to device");
if (dev.write(&dev, buf_out, 0, TEST_NVRAM_SPI_SIZE) != TEST_NVRAM_SPI_SIZE) {
puts("[Failed]\n");
return 1;
}
puts("[OK]");
puts("Reading back blockwise");
memset(buf_in, 0x00, sizeof(buf_in));
if (dev.read(&dev, buf_in, 0, TEST_NVRAM_SPI_SIZE) != TEST_NVRAM_SPI_SIZE) {
puts("[Failed]\n");
return 1;
}
puts("[OK]");
puts("Verifying contents...");
if (memcmp(buf_in, buf_out, TEST_NVRAM_SPI_SIZE) != 0) {
puts("buf_in:");
print_buffer(buf_in, sizeof(buf_in));
puts("[Failed]\n");
return 1;
}
puts("[OK]");
puts("All tests passed!");
while(1);
return 0;
}
