static ssize_t omap_set_thermal_hw_reset(struct device *dev,
struct device_attribute *devattr,
const char *buf, size_t count)
{
u32 reg_val;
long val;
if (!cpu_is_omap447x()) {
pr_err("Not available\n");
count = -EINVAL;
goto out;
} else if (strict_strtol(buf, 10, &val)) {
count = -EINVAL;
goto out;
}
reg_val = omap4_ctrl_wk_pad_readl(\
OMAP4_CTRL_MODULE_PAD_WKUP_WKUP_CONTROL_SPARE_RW);
if (val == 0)
reg_val &= ~OMAP4_HW_TSHUT_MASK;
else
reg_val |= OMAP4_HW_TSHUT_MASK;
omap4_ctrl_wk_pad_writel(reg_val,
OMAP4_CTRL_MODULE_PAD_WKUP_WKUP_CONTROL_SPARE_RW);
out:
return count;
}
static ssize_t omap_show_thermal_hw_reset(struct device *dev,
struct device_attribute *devattr,
char *buf)
{
return sprintf(buf, "%x\n",
omap4_ctrl_wk_pad_readl(\
OMAP4_CTRL_MODULE_PAD_WKUP_WKUP_CONTROL_SPARE_RW));
}
static void __init t1_i2c_init(void)
{
u32 reg_val;
/* Disable internal pull ups for i2c 1 and 2
and enable for i2c 3 and 4 */
reg_val = omap4_ctrl_pad_readl(
OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_I2C_0);
PULLUP_DISABLE(reg_val, SCL, I2C1);
PULLUP_DISABLE(reg_val, SDA, I2C1);
PULLUP_DISABLE(reg_val, SCL, I2C2);
PULLUP_DISABLE(reg_val, SDA, I2C2);
PULLUP_ENABLE(reg_val, SCL, I2C3);
PULLUP_ENABLE(reg_val, SDA, I2C3);
PULLUP_ENABLE(reg_val, SCL, I2C4);
PULLUP_ENABLE(reg_val, SDA, I2C4);
SET_LOAD(reg_val, SCL, I2C3, LOAD_860_OHM);
SET_LOAD(reg_val, SDA, I2C3, LOAD_860_OHM);
SET_LOAD(reg_val, SCL, I2C4, LOAD_860_OHM);
SET_LOAD(reg_val, SDA, I2C4, LOAD_860_OHM);
omap4_ctrl_pad_writel(reg_val,
OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_I2C_0);
/* 860 k, SR Enable Internal Pull up */
reg_val = omap4_ctrl_wk_pad_readl(
OMAP4_CTRL_MODULE_PAD_WKUP_CONTROL_I2C_2);
PULLUP_ENABLE(reg_val, SCL, SR);
PULLUP_ENABLE(reg_val, SDA, SR);
SET_LOAD(reg_val, SCL, SR, LOAD_860_OHM);
SET_LOAD(reg_val, SDA, SR, LOAD_860_OHM);
omap4_ctrl_wk_pad_writel(reg_val,
OMAP4_CTRL_MODULE_PAD_WKUP_CONTROL_I2C_2);
omap_i2c_hwspinlock_init(1, 0, &t1_i2c1_bus_pdata);
omap_i2c_hwspinlock_init(2, 1, &t1_i2c2_bus_pdata);
omap_i2c_hwspinlock_init(3, 2, &t1_i2c3_bus_pdata);
omap_i2c_hwspinlock_init(4, 3, &t1_i2c4_bus_pdata);
omap_register_i2c_bus_board_data(1, &t1_i2c1_bus_pdata);
omap_register_i2c_bus_board_data(2, &t1_i2c2_bus_pdata);
omap_register_i2c_bus_board_data(3, &t1_i2c3_bus_pdata);
omap_register_i2c_bus_board_data(4, &t1_i2c4_bus_pdata);
/*
* Phoenix Audio IC needs I2C1 to
* start with 400 KHz or less
*/
#ifdef CONFIG_REGULATOR_TPS6130X
omap_register_i2c_bus(1, 400, t1_i2c1_board_info,
ARRAY_SIZE(t1_i2c_board_info));
#else
omap_register_i2c_bus(1, 400, NULL, 0);
#endif
omap_register_i2c_bus(2, 400, t1_i2c_board_info,
ARRAY_SIZE(t1_i2c_board_info));
omap_register_i2c_bus(3, 400, NULL, 0);
omap_register_i2c_bus(4, 400, NULL, 0);
}
static void __init t1_i2c_init(void)
{
u32 reg_val;
/* Disable internal pull ups for i2c 1 and 2
and enable for i2c 3 and 4 */
reg_val = omap4_ctrl_pad_readl(
OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_I2C_0);
PULLUP_DISABLE(reg_val, SCL, I2C1);
PULLUP_DISABLE(reg_val, SDA, I2C1);
PULLUP_DISABLE(reg_val, SCL, I2C2);
PULLUP_DISABLE(reg_val, SDA, I2C2);
PULLUP_ENABLE(reg_val, SCL, I2C3);
PULLUP_ENABLE(reg_val, SDA, I2C3);
PULLUP_ENABLE(reg_val, SCL, I2C4);
PULLUP_ENABLE(reg_val, SDA, I2C4);
SET_LOAD(reg_val, SCL, I2C3, LOAD_860_OHM);
SET_LOAD(reg_val, SDA, I2C3, LOAD_860_OHM);
SET_LOAD(reg_val, SCL, I2C4, LOAD_860_OHM);
SET_LOAD(reg_val, SDA, I2C4, LOAD_860_OHM);
omap4_ctrl_pad_writel(reg_val,
OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_I2C_0);
/* 860 k, SR Enable Internal Pull up */
reg_val = omap4_ctrl_wk_pad_readl(
OMAP4_CTRL_MODULE_PAD_WKUP_CONTROL_I2C_2);
PULLUP_ENABLE(reg_val, SCL, SR);
PULLUP_ENABLE(reg_val, SDA, SR);
SET_LOAD(reg_val, SCL, SR, LOAD_860_OHM);
SET_LOAD(reg_val, SDA, SR, LOAD_860_OHM);
omap4_ctrl_wk_pad_writel(reg_val,
OMAP4_CTRL_MODULE_PAD_WKUP_CONTROL_I2C_2);
/*
* Phoenix Audio IC needs I2C1 to
* start with 400 KHz or less
*/
omap_register_i2c_bus(1, 400, NULL, 0);
omap_register_i2c_bus(2, 400, t1_i2c_board_info,
ARRAY_SIZE(t1_i2c_board_info));
omap_register_i2c_bus(3, 400, NULL, 0);
omap_register_i2c_bus(4, 400, NULL, 0);
}
