void __init omap4_superior_display_init(void)
{
struct panel_s6e8aa0a01_data *panel;
int oled_det_gpio;
/* Removed ENABLE_ON_INIT flag for dss_sys_clk(functional clock)
* in arch/arm/mach-omap2/clock44xx_data.c, manually
* enabling the functional clock by getting dss_sys_fclk.
* NOTE: It will be disabled, during disable path.
*/
#ifdef CONFIG_FB_OMAP_BOOTLOADER_INIT
dss_ick = clk_get(NULL, "ick");
if (IS_ERR(dss_ick)) {
pr_err("Could not get dss interface clock\n");
/* return -ENOENT; */
}
dss_sys_fclk = omap_clk_get_by_name("dss_sys_clk");
if (IS_ERR(dss_sys_fclk)) {
pr_err("Could not get dss system clock\n");
/* return -ENOENT; */
}
clk_enable(dss_sys_fclk);
dss_dss_fclk = omap_clk_get_by_name("dss_dss_clk");
if (IS_ERR(dss_dss_fclk)) {
pr_err("Could not get dss functional clock\n");
/* return -ENOENT; */
}
#endif
panel = &superior_oled_data;
superior_oled_device.data = panel;
omap4_ctrl_pad_writel(0x1FF80000,
OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_DSIPHY);
panel->reset_gpio =
omap_muxtbl_get_gpio_by_name("MLCD_RST");
panel->oled_id_gpio =
omap_muxtbl_get_gpio_by_name("OLED_ID");
oled_det_gpio = omap_muxtbl_get_gpio_by_name("OLED_DET");
gpio_request(oled_det_gpio, "OLED_DET");
gpio_direction_input(oled_det_gpio);
panel->oled_det_irq = gpio_to_irq(oled_det_gpio);
get_panel_data(panel_data, panel);
omap_display_init(&superior_dss_data);
}
void __init omap4_kona_display_init(void)
{
/* Removed ENABLE_ON_INIT flag for dss_sys_clk(functional clock)
* in arch/arm/mach-omap2/clock44xx_data.c, manually
* enabling the functional clock by getting dss_sys_fclk.
* NOTE: It will be disabled, during disable path.
*/
#ifdef CONFIG_FB_OMAP_BOOTLOADER_INIT
dss_ick = clk_get(NULL, "ick");
if (IS_ERR(dss_ick)) {
pr_err("Could not get dss interface clock\n");
return;
}
dss_sys_fclk = omap_clk_get_by_name("dss_sys_clk");
if (IS_ERR(dss_sys_fclk)) {
pr_err("Could not get dss system clock\n");
return;
}
clk_enable(dss_sys_fclk);
dss_dss_fclk = omap_clk_get_by_name("dss_dss_clk");
if (IS_ERR(dss_dss_fclk)) {
pr_err("Could not get dss functional clock\n");
return;
}
#endif
kona_display_gpio_init();
kona_panel_data_cmc624.gpio_ima_sleep =
display_gpios[GPIO_IMA_SLEEP].gpio;
kona_panel_data_cmc624.gpio_ima_nrst =
display_gpios[GPIO_IMA_NRST].gpio;
kona_panel_data_cmc624.gpio_ima_cmc_en =
display_gpios[GPIO_IMA_CMC_EN].gpio;
kona_init_cmc624_pwr_luts();
omap_display_init(&kona_dss_data);
i2c_register_board_info(13, kona_i2c13_boardinfo,
ARRAY_SIZE(kona_i2c13_boardinfo));
i2c_register_board_info(7, kona_i2c7_boardinfo,
ARRAY_SIZE(kona_i2c7_boardinfo));
pr_info("%s: real board display\n", __func__);
}
/**
* _add_optional_clock_clkdev - Add clkdev entry for hwmod optional clocks
* @od: struct omap_device *od
*
* For every optional clock present per hwmod per omap_device, this function
* adds an entry in the clkdev table of the form <dev-id=dev_name, con-id=role>
* if it does not exist already.
*
* The function is called from inside omap_device_build_ss(), after
* omap_device_register.
*
* This allows drivers to get a pointer to its optional clocks based on its role
* by calling clk_get(<dev*>, <role>).
*
* No return value.
*/
static void _add_optional_clock_clkdev(struct omap_device *od,
struct omap_hwmod *oh)
{
int i;
for (i = 0; i < oh->opt_clks_cnt; i++) {
struct omap_hwmod_opt_clk *oc;
struct clk *r;
struct clk_lookup *l;
oc = &oh->opt_clks[i];
if (!oc->_clk)
continue;
r = clk_get_sys(dev_name(&od->pdev.dev), oc->role);
if (!IS_ERR(r))
continue; /* clkdev entry exists */
r = omap_clk_get_by_name((char *)oc->clk);
if (IS_ERR(r)) {
pr_err("omap_device: %s: omap_clk_get_by_name for %s failed\n",
dev_name(&od->pdev.dev), oc->clk);
continue;
}
l = clkdev_alloc(r, oc->role, dev_name(&od->pdev.dev));
if (!l) {
pr_err("omap_device: %s: clkdev_alloc for %s failed\n",
dev_name(&od->pdev.dev), oc->role);
return;
}
clkdev_add(l);
}
}
static void _add_clkdev(struct omap_device *od, const char *clk_alias,
const char *clk_name)
{
struct clk *r;
struct clk_lookup *l;
if (!clk_alias || !clk_name)
return;
dev_dbg(&od->pdev->dev, "Creating %s -> %s\n", clk_alias, clk_name);
r = clk_get_sys(dev_name(&od->pdev->dev), clk_alias);
if (!IS_ERR(r)) {
dev_warn(&od->pdev->dev,
"alias %s already exists\n", clk_alias);
clk_put(r);
return;
}
r = omap_clk_get_by_name(clk_name);
if (IS_ERR(r)) {
dev_err(&od->pdev->dev,
"omap_clk_get_by_name for %s failed\n", clk_name);
return;
}
l = clkdev_alloc(r, clk_alias, dev_name(&od->pdev->dev));
if (!l) {
dev_err(&od->pdev->dev,
"clkdev_alloc for %s failed\n", clk_alias);
return;
}
clkdev_add(l);
}
static void __init omap_opp_set_min_rate(struct omap_opp_def *opp_def)
{
struct clk *clk;
long round_rate;
clk = omap_clk_get_by_name(opp_def->dev_info->clk_name);
if (clk) {
round_rate = clk_round_rate(clk, opp_def->freq);
clk_set_rate(clk, round_rate);
pr_info("%s: Missing opp info for hwmod %s\n",
__func__, opp_def->dev_info->hwmod_name);
pr_info("Forcing clock %s to minimum rate %ld\n",
opp_def->dev_info->clk_name, round_rate);
}
}
static int __init omap2_rprm_init(void)
{
struct platform_device *pdev;
struct omap_rprm_pdata *pdata = &omap2_rprm_data;
int ret;
if (cpu_is_omap54xx()) {
auxclks = omap5_auxclks;
auxclk_cnt = ARRAY_SIZE(omap5_auxclks);
} else if (cpu_is_omap44xx()) {
auxclks = omap4_auxclks;
auxclk_cnt = ARRAY_SIZE(omap4_auxclks);
}
pdev = platform_device_alloc("omap-rprm", -1);
if (!pdev)
return -ENOMEM;
if (pdata->iss_opt_clk_name) {
pdata->iss_opt_clk =
omap_clk_get_by_name(pdata->iss_opt_clk_name);
if (!pdata->iss_opt_clk) {
dev_err(&pdev->dev, "error getting iss opt clk\n");
ret = -ENOENT;
goto err;
}
}
ret = platform_device_add_data(pdev, pdata, sizeof *pdata);
if (ret)
goto err;
ret = platform_device_add(pdev);
if (ret)
goto err;
return 0;
err:
platform_device_put(pdev);
return ret;
}
static void _add_clkdev(struct omap_device *od, const char *clk_alias,
const char *clk_name)
{
struct clk *r;
struct clk_lookup *l;
if (!clk_alias || !clk_name)
return;
pr_debug("omap_device: %s: Creating %s -> %s\n",
dev_name(&od->pdev.dev), clk_alias, clk_name);
r = clk_get_sys(dev_name(&od->pdev.dev), clk_alias);
if (!IS_ERR(r)) {
pr_warning("omap_device: %s: alias %s already exists\n",
dev_name(&od->pdev.dev), clk_alias);
clk_put(r);
return;
}
r = omap_clk_get_by_name(clk_name);
if (IS_ERR(r)) {
pr_err("omap_device: %s: omap_clk_get_by_name for %s failed\n",
dev_name(&od->pdev.dev), clk_name);
return;
}
l = clkdev_alloc(r, clk_alias, dev_name(&od->pdev.dev));
if (!l) {
pr_err("omap_device: %s: clkdev_alloc for %s failed\n",
dev_name(&od->pdev.dev), clk_alias);
return;
}
clkdev_add(l);
}
/**
* omap_init_opp_table() - Initialize opp table as per the CPU type
* @opp_def: opp default list for this silicon
* @opp_def_size: number of opp entries for this silicon
*
* Register the initial OPP table with the OPP library based on the CPU
* type. This is meant to be used only by SoC specific registration.
*/
int __init omap_init_opp_table(struct omap_opp_def *opp_def,
u32 opp_def_size)
{
int i, r;
struct clk *clk;
long round_rate;
if (!opp_def || !opp_def_size) {
pr_err("%s: invalid params!\n", __func__);
return -EINVAL;
}
/*
* Initialize only if not already initialized even if the previous
* call failed, because, no reason we'd succeed again.
*/
if (omap_table_init)
return -EEXIST;
omap_table_init = 1;
/* Lets now register with OPP library */
for (i = 0; i < opp_def_size; i++, opp_def++) {
struct omap_hwmod *oh;
struct device *dev;
if (!opp_def->hwmod_name) {
WARN(1, "%s: NULL name of omap_hwmod, failing"
" [%d].\n", __func__, i);
return -EINVAL;
}
oh = omap_hwmod_lookup(opp_def->hwmod_name);
if (!oh || !oh->od) {
WARN(1, "%s: no hwmod or odev for %s, [%d] "
"cannot add OPPs.\n", __func__,
opp_def->hwmod_name, i);
return -EINVAL;
}
dev = &oh->od->pdev.dev;
clk = omap_clk_get_by_name(opp_def->clk_name);
if (clk) {
round_rate = clk_round_rate(clk, opp_def->freq);
if (round_rate > 0) {
opp_def->freq = round_rate;
} else {
WARN(1, "%s: round_rate for clock %s failed\n",
__func__, opp_def->clk_name);
return -EINVAL; /* skip Bad OPP */
}
} else {
WARN(1, "%s: No clock by name %s found\n", __func__,
opp_def->clk_name);
return -EINVAL; /* skip Bad OPP */
}
r = opp_add(dev, opp_def->freq, opp_def->u_volt);
if (r) {
dev_err(dev, "%s: add OPP %ld failed for %s [%d] "
"result=%d\n",
__func__, opp_def->freq,
opp_def->hwmod_name, i, r);
} else {
if (!opp_def->default_available)
r = opp_disable(dev, opp_def->freq);
if (r)
dev_err(dev, "%s: disable %ld failed for %s "
"[%d] result=%d\n",
__func__, opp_def->freq,
opp_def->hwmod_name, i, r);
r = omap_dvfs_register_device(dev,
opp_def->voltdm_name, opp_def->clk_name);
if (r)
dev_err(dev, "%s:%s:err dvfs register %d %d\n",
__func__, opp_def->hwmod_name, r, i);
}
}
return 0;
}
/**
* omap_opp_register() - Initialize opp table as per the CPU type
* @dev: device registering for OPP
* @hwmod_name: hemod name of registering device
*
* Register the given device with the OPP/DVFS framework. Intended to
* be called when omap_device is built.
*/
int omap_opp_register(struct device *dev, const char *hwmod_name)
{
int i, r;
struct clk *clk;
long round_rate;
struct omap_opp_def *opp_def = opp_table;
u32 opp_def_size = opp_table_size;
if (!opp_def || !opp_def_size) {
pr_err("%s: invalid params!\n", __func__);
return -EINVAL;
}
if (IS_ERR(dev)) {
pr_err("%s: Unable to get dev pointer\n", __func__);
return -EINVAL;
}
/* Lets now register with OPP library */
for (i = 0; i < opp_def_size; i++, opp_def++) {
if (!opp_def->default_available)
continue;
if (!opp_def->dev_info->hwmod_name) {
WARN_ONCE(1, "%s: NULL name of omap_hwmod, failing [%d].\n",
__func__, i);
return -EINVAL;
}
if (!strcmp(hwmod_name, opp_def->dev_info->hwmod_name)) {
clk = omap_clk_get_by_name(opp_def->dev_info->clk_name);
if (clk) {
round_rate = clk_round_rate(clk, opp_def->freq);
if (round_rate > 0) {
opp_def->freq = round_rate;
} else {
pr_warn("%s: round_rate for clock %s failed\n",
__func__, opp_def->dev_info->clk_name);
continue; /* skip Bad OPP */
}
} else {
pr_warn("%s: No clock by name %s found\n",
__func__, opp_def->dev_info->clk_name);
continue; /* skip Bad OPP */
}
r = opp_add(dev, opp_def->freq, opp_def->u_volt);
if (r) {
dev_err(dev,
"%s: add OPP %ld failed for %s [%d] result=%d\n",
__func__, opp_def->freq,
opp_def->dev_info->hwmod_name, i, r);
continue;
}
r = omap_dvfs_register_device(dev,
opp_def->dev_info->voltdm_name,
opp_def->dev_info->clk_name);
if (r)
dev_err(dev, "%s:%s:err dvfs register %d %d\n",
__func__, opp_def->dev_info->hwmod_name,
r, i);
}
}
return 0;
}
void __init omap4_espresso10_display_init(void)
{
struct ltn101al03_panel_data *panel;
int ret, i;
u8 board_type;
/* Default setting vlaue for SEC panel*/
int platform_brightness[] = {
BRIGHTNESS_OFF, BRIGHTNESS_DIM, BRIGHTNESS_MIN,
BRIGHTNESS_25, BRIGHTNESS_DEFAULT, BRIGHTNESS_MAX};
int kernel_brightness[] = {0, 3, 3, 8, 47, 81};
if (espresso10_panel_data.panel_id == PANEL_BOE) {
kernel_brightness[4] = 47;
kernel_brightness[5] = 81;
}
#ifdef CONFIG_FB_OMAP_BOOTLOADER_INIT
dss_ick = clk_get(NULL, "ick");
if (IS_ERR(dss_ick)) {
pr_err("Could not get dss interface clock\n");
/* return -ENOENT; */
}
dss_sys_fclk = omap_clk_get_by_name("dss_sys_clk");
if (IS_ERR(dss_sys_fclk)) {
pr_err("Could not get dss system clock\n");
/* return -ENOENT; */
}
clk_enable(dss_sys_fclk);
dss_dss_fclk = omap_clk_get_by_name("dss_dss_clk");
if (IS_ERR(dss_dss_fclk)) {
pr_err("Could not get dss functional clock\n");
/* return -ENOENT; */
}
#endif
espresso10_panel_data.lvds_nshdn_gpio =
omap_muxtbl_get_gpio_by_name("LVDS_nSHDN");
espresso10_panel_data.lcd_en_gpio =
omap_muxtbl_get_gpio_by_name("LCD_EN");
espresso10_panel_data.led_backlight_reset_gpio =
omap_muxtbl_get_gpio_by_name("LED_BACKLIGHT_RESET");
espresso10_panel_data.backlight_gptimer_num = 10;
espresso10_panel_data.set_power = espresso10_lcd_set_power;
espresso10_panel_data.set_gptimer_idle =
espresso10_lcd_set_gptimer_idle;
for (i = 0 ; i < NUM_BRIGHTNESS_LEVEL ; i++) {
espresso10_panel_data.brightness_table.platform_value[i] =
platform_brightness[i];
espresso10_panel_data.brightness_table.kernel_value[i] =
kernel_brightness[i];
}
ret = gpio_request(espresso10_panel_data.lcd_en_gpio, "lcd_en");
if (ret < 0)
pr_err("(%s): gpio_request %d failed!\n", __func__,
espresso10_panel_data.lcd_en_gpio);
gpio_direction_output(espresso10_panel_data.lcd_en_gpio, 1);
panel = &espresso10_panel_data;
espresso10_lcd_device.data = panel;
board_type = omap4_espresso10_get_board_type();
if (board_type == SEC_MACHINE_ESPRESSO10_USA_BBY) {
/* Two DSS devices: LCD & HDMI */
espresso10_dss_data.num_devices = 2;
espresso10_hdmi_device.hpd_gpio =
omap_muxtbl_get_gpio_by_name("HDMI_HPD");
espresso10_hdmi_mux_init();
} else
/* LCD only */
espresso10_dss_data.num_devices = 1;
omapfb_set_platform_data(&espresso10_fb_pdata);
omap_display_init(&espresso10_dss_data);
}
