static void __init mx27pdk_init(void)
{
imx27_soc_init();
mxc_gpio_setup_multiple_pins(mx27pdk_pins, ARRAY_SIZE(mx27pdk_pins),
"mx27pdk");
mx27_3ds_sdhc1_enable_level_translator();
imx27_add_imx_uart0(&uart_pdata);
imx27_add_fec(NULL);
imx27_add_imx_keypad(&mx27_3ds_keymap_data);
imx27_add_mxc_mmc(0, &sdhc1_pdata);
imx27_add_imx2_wdt(NULL);
otg_phy_init();
if (otg_mode_host) {
otg_pdata.otg = imx_otg_ulpi_create(ULPI_OTG_DRVVBUS |
ULPI_OTG_DRVVBUS_EXT);
if (otg_pdata.otg)
imx27_add_mxc_ehci_otg(&otg_pdata);
}
if (!otg_mode_host)
imx27_add_fsl_usb2_udc(&otg_device_pdata);
imx27_add_spi_imx1(&spi2_pdata);
imx27_add_spi_imx0(&spi1_pdata);
spi_register_board_info(mx27_3ds_spi_devs,
ARRAY_SIZE(mx27_3ds_spi_devs));
if (mxc_expio_init(MX27_CS5_BASE_ADDR, EXPIO_PARENT_INT))
pr_warn("Init of the debugboard failed, all devices on the debugboard are unusable.\n");
imx27_add_imx_i2c(0, &mx27_3ds_i2c0_data);
imx27_add_imx_fb(&mx27_3ds_fb_data);
}
void usb_host_clk_en(void) {
struct clk *otg_clk;
switch (S3C_USB_CLKSRC) {
case 0: /* epll clk */
writel((readl(S3C_CLK_SRC)& ~S3C6400_CLKSRC_UHOST_MASK)
|S3C_CLKSRC_EPLL_CLKSEL|S3C_CLKSRC_UHOST_EPLL,
S3C_CLK_SRC);
/* USB host colock divider ratio is 2 */
writel((readl(S3C_CLK_DIV1)& ~S3C6400_CLKDIV1_UHOST_MASK)
|(1<<20), S3C_CLK_DIV1);
break;
case 1: /* oscillator 48M clk */
otg_clk = clk_get(NULL, "otg");
clk_enable(otg_clk);
writel(readl(S3C_CLK_SRC)& ~S3C6400_CLKSRC_UHOST_MASK, S3C_CLK_SRC);
otg_phy_init();
/* USB host colock divider ratio is 1 */
writel(readl(S3C_CLK_DIV1)& ~S3C6400_CLKDIV1_UHOST_MASK, S3C_CLK_DIV1);
break;
default:
printk(KERN_INFO "Unknown USB Host Clock Source\n");
BUG();
break;
}
writel(readl(S3C_HCLK_GATE)|S3C_CLKCON_HCLK_UHOST|S3C_CLKCON_HCLK_SECUR,
S3C_HCLK_GATE);
writel(readl(S3C_SCLK_GATE)|S3C_CLKCON_SCLK_UHOST, S3C_SCLK_GATE);
}
void usb_host_clk_en(int usb_host_clksrc, u32 otg_phy_clk) {
switch (usb_host_clksrc) {
case 0: /* epll clk */
writel((readl(S3C_CLK_SRC)& ~S3C_CLKSRC_UHOST_MASK)
|S3C_CLKSRC_EPLL_CLKSEL|S3C_CLKSRC_UHOST_EPLL,
S3C_CLK_SRC);
/* USB host colock divider ratio is 2 */
writel((readl(S3C_CLK_DIV1)& ~S3C_CLKDIVN_UHOST_MASK)
|S3C_CLKDIV1_USBDIV2, S3C_CLK_DIV1);
break;
case 1: /* oscillator 48M clk */
writel(readl(S3C_CLK_SRC)& ~S3C_CLKSRC_UHOST_MASK, S3C_CLK_SRC);
otg_phy_init(otg_phy_clk);
/* USB host colock divider ratio is 1 */
writel(readl(S3C_CLK_DIV1)& ~S3C_CLKDIVN_UHOST_MASK, S3C_CLK_DIV1);
break;
default:
printk(KERN_INFO "Unknown USB Host Clock Source\n");
BUG();
break;
}
writel(readl(S3C_HCLK_GATE)|S3C_CLKCON_HCLK_UHOST|S3C_CLKCON_HCLK_SECUR,
S3C_HCLK_GATE);
writel(readl(S3C_SCLK_GATE)|S3C_CLKCON_SCLK_UHOST, S3C_SCLK_GATE);
}
/*
* udc_disable - disable USB device controller
*/
static void udc_disable(struct s3c_udc *dev)
{
DEBUG_SETUP("%s: %p\n", __FUNCTION__, dev);
udc_set_address(dev, 0);
dev->ep0state = WAIT_FOR_SETUP;
dev->gadget.speed = USB_SPEED_UNKNOWN;
dev->usb_address = 0;
//writel(readl(S3C_USBOTG_PHYPWR)|(0x7<<1), S3C_USBOTG_PHYPWR);
otg_phy_init(0x42); /* 2010-0208, added by CVKK(JC) */
dev->udc_state = USB_STATE_NOTATTACHED;
}
static void __init mx27pdk_init(void)
{
int ret;
imx27_soc_init();
mxc_gpio_setup_multiple_pins(mx27pdk_pins, ARRAY_SIZE(mx27pdk_pins),
"mx27pdk");
mx27_3ds_sdhc1_enable_level_translator();
imx27_add_imx_uart0(&uart_pdata);
imx27_add_fec(NULL);
imx27_add_imx_keypad(&mx27_3ds_keymap_data);
imx27_add_mxc_mmc(0, &sdhc1_pdata);
imx27_add_imx2_wdt();
otg_phy_init();
if (otg_mode_host) {
otg_pdata.otg = imx_otg_ulpi_create(ULPI_OTG_DRVVBUS |
ULPI_OTG_DRVVBUS_EXT);
if (otg_pdata.otg)
imx27_add_mxc_ehci_otg(&otg_pdata);
}
if (!otg_mode_host)
imx27_add_fsl_usb2_udc(&otg_device_pdata);
imx27_add_spi_imx1(&spi2_pdata);
imx27_add_spi_imx0(&spi1_pdata);
mx27_3ds_spi_devs[0].irq = gpio_to_irq(PMIC_INT);
spi_register_board_info(mx27_3ds_spi_devs,
ARRAY_SIZE(mx27_3ds_spi_devs));
if (mxc_expio_init(MX27_CS5_BASE_ADDR, IMX_GPIO_NR(3, 28)))
pr_warn("Init of the debugboard failed, all devices on the debugboard are unusable.\n");
imx27_add_imx_i2c(0, &mx27_3ds_i2c0_data);
platform_add_devices(devices, ARRAY_SIZE(devices));
imx27_add_imx_fb(&mx27_3ds_fb_data);
ret = gpio_request_array(mx27_3ds_camera_gpios,
ARRAY_SIZE(mx27_3ds_camera_gpios));
if (ret) {
pr_err("Failed to request camera gpios");
iclink_ov2640.power = NULL;
}
imx27_add_mx2_camera(&mx27_3ds_cam_pdata);
imx27_add_imx_ssi(0, &mx27_3ds_ssi_pdata);
imx_add_platform_device("imx_mc13783", 0, NULL, 0, NULL, 0);
}
/*
* until it becomes enabled, this UDC should be completely invisible
* to any USB host.
*/
static int s3c_udc_enable(struct s3c_udc *dev)
{
u32 reg_val;
DEBUG_SETUP("%s: %p\n", __func__, dev);
#if USING_MACH_OTG_PHY
otg_phy_init();
#else
writel(1, S5P_USB_PHY_CONTROL);
writel(0xa0, S3C_USBOTG_PHYPWR); /* Power up */
writel(OTGH_PHY_CLK_VALUE, S3C_USBOTG_PHYCLK);
writel(0x1, S3C_USBOTG_RSTCON);
udelay(50);
writel(0x0, S3C_USBOTG_RSTCON);
udelay(50);
#endif
dev->udc_state = USB_STATE_POWERED;
dev->gadget.speed = USB_SPEED_UNKNOWN;
/* 14. Initialize OTG Link Core. */
writel(GAHBCFG_INIT, S3C_UDC_OTG_GAHBCFG);
writel( 0<<15 // PHY Low Power Clock sel
|1<<14 // Non-Periodic TxFIFO Rewind Enable
|0x5<<10 // Turnaround time
|0<<9|0<<8 // [0:HNP disable, 1:HNP enable][ 0:SRP disable, 1:SRP enable] H1= 1,1
|0<<7 // Ulpi DDR sel
|0<<6 // 0: high speed utmi+, 1: full speed serial
|0<<4 // 0: utmi+, 1:ulpi
|1<<3 // phy i/f 0:8bit, 1:16bit
|0x7<<0, // HS/FS Timeout*
S3C_UDC_OTG_GUSBCFG);
s3c_udc_initialize(dev);
//change proper register instead of S3C_UDC_OTG_GINTMSK
reg_val = readl(S3C_UDC_OTG_GINTMSK);
if(!reg_val)
{
DEBUG_ERROR("[%s] Fail to set GINTMSK 0x%x\n", __func__, reg_val);
return -1;
}
return 0;
}
void usb_host_clk_en(void) {
struct clk *otg_clk;
switch (S3C_USB_CLKSRC) {
case 0: /* epll clk */
/* Setting the epll clk to 48 MHz, P=3, M=96, S=3 */
writel((readl(S5P_EPLL_CON) & ~(S5P_EPLL_MASK)) | (S5P_EPLL_EN \
| S5P_EPLLVAL(96,3,3)), S5P_EPLL_CON);
writel((readl(S5P_CLK_SRC0) | S5P_CLKSRC0_EPLL_MASK), S5P_CLK_SRC0);
writel((readl(S5P_CLK_SRC1)& ~S5P_CLKSRC1_UHOST_MASK), S5P_CLK_SRC1);
/* USB host clock divider ratio is 1 */
writel((readl(S5P_CLK_DIV2)& ~S5P_CLKDIV2_UHOST_MASK), S5P_CLK_DIV2);
break;
case 1: /* oscillator 12M clk */
otg_clk = clk_get(NULL, "otg");
clk_enable(otg_clk);
otg_phy_init();
writel((readl(S5P_CLK_SRC1) | S5P_CLKSRC1_CLK48M_MASK) \
| S5P_CLKSRC1_UHOST_MASK, S5P_CLK_SRC1);
//USB host colock divider ratio is 1
writel(readl(S5P_CLK_DIV2)& ~S5P_CLKDIV2_UHOST_MASK, S5P_CLK_DIV2);
break;
/* Add other clock sources here */
default:
printk(KERN_INFO "Unknown USB Host Clock Source\n");
BUG();
break;
}
writel(readl(S5P_CLKGATE_D10)|S5P_CLKGATE_D10_USBHOST, S5P_CLKGATE_D10);
writel(readl(S5P_SCLKGATE0)|S5P_CLKGATE_SCLK0_USBHOST, S5P_SCLKGATE0);
}
static void connectivity_switching_init(struct work_struct *ignored)
{
int usb_sel, uart_sel, samsung_kies_sel, ums_sel, mtp_sel, vtp_sel, askon_sel;
int lpm_mode_check = charging_mode_get();
switch_sel = 0;
dmsg("\n");
if (sec_get_param_value) {
sec_get_param_value(__SWITCH_SEL, &switch_sel);
cancel_delayed_work(&switch_init_work);
}
else {
schedule_delayed_work(&switch_init_work, msecs_to_jiffies(100));
return;
}
if(BOOTUP) {
BOOTUP = 0;
otg_phy_init(); //USB Power on after boot up.
}
usb_sel = switch_sel & (int)(USB_SEL_MASK);
uart_sel = (switch_sel & (int)(UART_SEL_MASK)) >> 1;
samsung_kies_sel = (switch_sel & (int)(USB_SAMSUNG_KIES_MASK)) >> 2;
ums_sel = (switch_sel & (int)(USB_UMS_MASK)) >> 3;
mtp_sel = (switch_sel & (int)(USB_MTP_MASK)) >> 4;
#if !defined(CONFIG_TARGET_LOCALE_NTT) // disable tethering xmoondash
vtp_sel = (switch_sel & (int)(USB_VTP_MASK)) >> 5;
#endif
askon_sel = (switch_sel & (int)(USB_ASKON_MASK)) >> 6;
printk("\n[WJ] %s, %s, switch_sel=%d\n", __FILE__, __FUNCTION__, switch_sel);
if( samsung_kies_sel ) currentusbstatus = USBSTATUS_SAMSUNG_KIES;
else if(ums_sel) currentusbstatus = USBSTATUS_UMS;
else if(mtp_sel) currentusbstatus = USBSTATUS_MTPONLY;
else if(askon_sel) currentusbstatus = USBSTATUS_ASKON;
if((switch_sel == 0x1) || (factoryresetstatus == 0xAE)) {
PathSelStore(AP_USB_MODE);
Ap_Cp_Switch_Config(AP_USB_MODE);
usb_switching_value_update(SWITCH_PDA);
PathSelStore(CP_UART_MODE);
Ap_Cp_Switch_Config(CP_UART_MODE);
uart_switching_value_update(SWITCH_MODEM);
}
else {
if(usb_sel) {
Ap_Cp_Switch_Config(AP_USB_MODE);
usb_switching_value_update(SWITCH_PDA);
}
else {
if(MicroJigUARTOffStatus) {
Ap_Cp_Switch_Config(AP_USB_MODE);
}
else {
Ap_Cp_Switch_Config(CP_USB_MODE);
usb_switching_value_update(SWITCH_MODEM);
}
}
if(uart_sel) {
Ap_Cp_Switch_Config(AP_UART_MODE);
uart_switching_value_update(SWITCH_PDA);
}
else {
Ap_Cp_Switch_Config(CP_UART_MODE);
uart_switching_value_update(SWITCH_MODEM);
}
}
/*Turn off usb power when LPM mode*/
if(lpm_mode_check)
otg_phy_off();
switching_value_update();
if((switch_sel == 1) || (factoryresetstatus == 0xAE)) {
usb_switch_select(USBSTATUS_SAMSUNG_KIES);
mtp_mode_on = 1;
ap_usb_power_on(0);
UsbMenuSelStore(0);
}
else {
if(usb_sel) {
if(samsung_kies_sel) {
usb_switch_select(USBSTATUS_SAMSUNG_KIES);
/*USB Power off till MTP Appl launching*/
#ifdef _SUPPORT_SAMSUNG_AUTOINSTALLER_
//mtp_mode_on = 1;
//ap_usb_power_on(0);
#else
mtp_mode_on = 1;
ap_usb_power_on(0);
#endif
}
else if(mtp_sel) {
usb_switch_select(USBSTATUS_MTPONLY);
/*USB Power off till MTP Appl launching*/
mtp_mode_on = 1;
ap_usb_power_on(0);
}
else if(ums_sel) {
usb_switch_select(USBSTATUS_UMS);
}
#if !defined(CONFIG_TARGET_LOCALE_NTT) // disable tethering xmoondash
else if(vtp_sel) {
usb_switch_select(USBSTATUS_VTP);
}
#endif
else if(askon_sel) {
usb_switch_select(USBSTATUS_ASKON);
}
}
}
if(!FSA9480_Get_USB_Status()) {
s3c_usb_cable(1);
mdelay(5);
s3c_usb_cable(0);
}
else {
s3c_usb_cable(1);
indicator_dev.state = 1;
}
dmsg("switch_sel : 0x%x\n", switch_sel);
microusb_uart_status(1);
connectivity_switching_init_state=1;
}
