void Cartridge::parse_markup_cartridge(Markup::Node root) {
if(root.exists() == false) return;
parse_markup_memory(rom, root["rom"], ID::ROM, false);
parse_markup_memory(ram, root["ram"], ID::RAM, true);
for(auto& node : root) {
if(node.name != "map") continue;
if(node["id"].data == "rom") {
Mapping m(rom);
parse_markup_map(m, node);
if(m.size == 0) m.size = rom.size();
m.fastmode = Mapping::fastmode_readonly;
m.fastptr = rom.data();
mapping.append(m);
}
if(node["id"].data == "ram") {
Mapping m(ram);
parse_markup_map(m, node);
if(m.size == 0) m.size = ram.size();
m.fastmode = Mapping::fastmode_readwrite;
m.fastptr = ram.data();
mapping.append(m);
}
}
}
void Cartridge::parse_markup_sdd1(Markup::Node root) {
if(root.exists() == false) return;
has_sdd1 = true;
parse_markup_memory(sdd1.rom, root["rom"], ID::SDD1ROM, false);
parse_markup_memory(sdd1.ram, root["ram"], ID::SDD1RAM, true);
for(auto& node : root) {
if(node.name != "map") continue;
if(node["id"].data == "io") {
Mapping m({&SDD1::read, &sdd1}, {&SDD1::write, &sdd1});
parse_markup_map(m, node);
mapping.append(m);
}
if(node["id"].data == "rom") {
Mapping m({&SDD1::mcurom_read, &sdd1}, {&SDD1::mcurom_write, &sdd1});
parse_markup_map(m, node);
mapping.append(m);
}
if(node["id"].data == "ram") {
Mapping m({&SDD1::mcuram_read, &sdd1}, {&SDD1::mcuram_write, &sdd1});
parse_markup_map(m, node);
mapping.append(m);
}
}
}
void Cartridge::parse_markup_bsx(Markup::Node root) {
if(root.exists() == false) return;
has_bs_cart = true;
has_bs_slot = true;
interface->loadRequest(ID::Satellaview, "BS-X Satellaview", "bs");
parse_markup_memory(bsxcartridge.rom, root["rom"], ID::BsxROM, false);
parse_markup_memory(bsxcartridge.ram, root["ram"], ID::BsxRAM, true);
parse_markup_memory(bsxcartridge.psram, root["psram"], ID::BsxPSRAM, true);
for(auto& node : root) {
if(node.name != "map") continue;
if(node["id"].data == "rom"
|| node["id"].data == "ram") {
Mapping m({&BSXCartridge::mcu_read, &bsxcartridge}, {&BSXCartridge::mcu_write, &bsxcartridge});
parse_markup_map(m, node);
mapping.append(m);
}
if(node["id"].data == "io") {
Mapping m({&BSXCartridge::mmio_read, &bsxcartridge}, {&BSXCartridge::mmio_write, &bsxcartridge});
parse_markup_map(m, node);
mapping.append(m);
}
}
}
void Cartridge::parse_markup_spc7110(Markup::Node root) {
if(root.exists() == false) return;
has_spc7110 = true;
parse_markup_memory(spc7110.prom, root["rom[0]"], ID::SPC7110PROM, false);
parse_markup_memory(spc7110.drom, root["rom[1]"], ID::SPC7110DROM, false);
parse_markup_memory(spc7110.ram, root["ram"], ID::SPC7110RAM, true);
for(auto& node : root) {
if(node.name != "map") continue;
if(node["id"].data == "io") {
Mapping m({&SPC7110::read, &spc7110}, {&SPC7110::write, &spc7110});
parse_markup_map(m, node);
mapping.append(m);
}
if(node["id"].data == "rom") {
Mapping m({&SPC7110::mcurom_read, &spc7110}, {&SPC7110::mcurom_write, &spc7110});
parse_markup_map(m, node);
mapping.append(m);
}
if(node["id"].data == "ram") {
Mapping m({&SPC7110::mcuram_read, &spc7110}, {&SPC7110::mcuram_write, &spc7110});
parse_markup_map(m, node);
mapping.append(m);
}
}
}
void Cartridge::parse_markup_superfx(Markup::Node root) {
if(root.exists() == false) return;
has_superfx = true;
parse_markup_memory(superfx.rom, root["rom"], ID::SuperFXROM, false);
parse_markup_memory(superfx.ram, root["ram"], ID::SuperFXRAM, true);
for(auto& node : root) {
if(node.name != "map") continue;
if(node["id"].data == "io") {
Mapping m({&SuperFX::mmio_read, &superfx}, {&SuperFX::mmio_write, &superfx});
parse_markup_map(m, node);
mapping.append(m);
}
if(node["id"].data == "rom") {
Mapping m(superfx.cpurom);
parse_markup_map(m, node);
if(m.size == 0) m.size = superfx.rom.size();
mapping.append(m);
}
if(node["id"].data == "ram") {
Mapping m(superfx.cpuram);
parse_markup_map(m, node);
if(m.size == 0) m.size = superfx.ram.size();
mapping.append(m);
}
}
}
void Cartridge::parse_markup_sdd1(Markup::Node root) {
if(!root) return;
has_sdd1 = true;
auto rom = root.find("rom");
auto ram = root.find("ram");
parse_markup_memory(sdd1.rom, rom(0), ID::SDD1ROM, false);
parse_markup_memory(sdd1.ram, ram(0), ID::SDD1RAM, true);
for(auto node : root.find("map")) {
if(node["id"].text() == "io") {
Mapping m({&SDD1::read, &sdd1}, {&SDD1::write, &sdd1});
parse_markup_map(m, node);
mapping.append(m);
}
if(node["id"].text() == "rom") {
Mapping m({&SDD1::mcurom_read, &sdd1}, {&SDD1::mcurom_write, &sdd1});
parse_markup_map(m, node);
mapping.append(m);
}
if(node["id"].text() == "ram") {
Mapping m({&SDD1::mcuram_read, &sdd1}, {&SDD1::mcuram_write, &sdd1});
parse_markup_map(m, node);
mapping.append(m);
}
}
}
void Cartridge::parse_markup_spc7110(Markup::Node root) {
if(!root) return;
has_spc7110 = true;
auto rom = root.find("rom");
auto ram = root.find("ram");
parse_markup_memory(spc7110.prom, rom(0), ID::SPC7110PROM, false);
parse_markup_memory(spc7110.drom, rom(1), ID::SPC7110DROM, false);
parse_markup_memory(spc7110.ram, ram(0), ID::SPC7110RAM, true);
for(auto node : root.find("map")) {
if(node["id"].text() == "io") {
Mapping m({&SPC7110::read, &spc7110}, {&SPC7110::write, &spc7110});
parse_markup_map(m, node);
mapping.append(m);
}
if(node["id"].text() == "rom") {
Mapping m({&SPC7110::mcurom_read, &spc7110}, {&SPC7110::mcurom_write, &spc7110});
parse_markup_map(m, node);
mapping.append(m);
}
if(node["id"].text() == "ram") {
Mapping m({&SPC7110::mcuram_read, &spc7110}, {&SPC7110::mcuram_write, &spc7110});
parse_markup_map(m, node);
mapping.append(m);
}
}
}
void Cartridge::parse_markup_superfx(Markup::Node root) {
if(!root) return;
has_superfx = true;
auto rom = root.find("rom");
auto ram = root.find("ram");
parse_markup_memory(superfx.rom, rom(0), ID::SuperFXROM, false);
parse_markup_memory(superfx.ram, ram(0), ID::SuperFXRAM, true);
for(auto node : root.find("map")) {
if(node["id"].text() == "io") {
Mapping m({&SuperFX::mmio_read, &superfx}, {&SuperFX::mmio_write, &superfx});
parse_markup_map(m, node);
mapping.append(m);
}
if(node["id"].text() == "rom") {
Mapping m(superfx.cpurom);
parse_markup_map(m, node);
if(m.size == 0) m.size = superfx.rom.size();
mapping.append(m);
}
if(node["id"].text() == "ram") {
Mapping m(superfx.cpuram);
parse_markup_map(m, node);
if(m.size == 0) m.size = superfx.ram.size();
mapping.append(m);
}
}
}
void Cartridge::parse_markup_hitachidsp(Markup::Node root, unsigned roms) {
if(root.exists() == false) return;
if(interface->bind->altImplementation(Alt::ForDSP) == Alt::DSP::HLE)
{
//this is after checking existence because we don't want to ask which DSP to use and then use none of them
parse_markup_hitachidsp_hle(root);
return;
}
has_hitachidsp = true;
parse_markup_memory(hitachidsp.rom, root["rom[0]"], ID::HitachiDSPROM, false);
parse_markup_memory(hitachidsp.ram, root["ram[0]"], ID::HitachiDSPRAM, true);
for(auto& word : hitachidsp.dataROM) word = 0x000000;
for(auto& word : hitachidsp.dataRAM) word = 0x00;
hitachidsp.Frequency = numeral(root["frequency"].data);
if(hitachidsp.Frequency == 0) hitachidsp.frequency = 20000000;
hitachidsp.Roms = roms;
string dataROMName = root["rom[1]/name"].data;
string dataRAMName = root["ram[1]/name"].data;
interface->loadRequest(ID::HitachiDSPDROM, dataROMName);
if(dataRAMName.empty() == false) {
interface->loadRequest(ID::HitachiDSPDRAM, dataRAMName);
}
for(auto& node : root) {
if(node.name != "map") continue;
if(node["id"].data == "io") {
Mapping m({&HitachiDSP::dsp_read, &hitachidsp}, {&HitachiDSP::dsp_write, &hitachidsp});
parse_markup_map(m, node);
mapping.append(m);
}
if(node["id"].data == "rom") {
Mapping m({&HitachiDSP::rom_read, &hitachidsp}, {&HitachiDSP::rom_write, &hitachidsp});
parse_markup_map(m, node);
if(m.size == 0) m.size = hitachidsp.rom.size();
mapping.append(m);
}
if(node["id"].data == "ram") {
Mapping m({&HitachiDSP::ram_read, &hitachidsp}, {&HitachiDSP::ram_write, &hitachidsp});
parse_markup_map(m, node);
if(m.size == 0) m.size = hitachidsp.ram.size();
mapping.append(m);
}
}
}
void Cartridge::parse_markup_event(Markup::Node root) {
if(root.exists() == false) return;
has_event = true;
for(auto& node : root) {
if(node.name != "rom") continue;
unsigned id = numeral(node["id"].data);
if(id > 3) continue;
parse_markup_memory(event.rom[id], node, ID::EventROM0 + id, false);
}
parse_markup_memory(event.ram, root["ram"], ID::EventRAM, true);
event.board = Event::Board::CampusChallenge92;
if(root["name"].data == "Campus Challenge '92") event.board = Event::Board::CampusChallenge92;
if(root["name"].data == "Powerfest '94") event.board = Event::Board::Powerfest94;
event.revision = root["revision"].data == "B" ? 2 : 1;
lstring part = root["timer"].data.split<1>(":");
if(part.size() == 1) event.timer = decimal(part(0));
if(part.size() == 2) event.timer = decimal(part(0)) * 60 + decimal(part(1));
for(auto& node : root) {
if(node.name != "map") continue;
if(node["id"].data == "rom") {
Mapping m({&Event::rom_read, &event}, [](unsigned, uint8) {});
parse_markup_map(m, node);
mapping.append(m);
}
if(node["id"].data == "ram") {
Mapping m({&Event::ram_read, &event}, {&Event::ram_write, &event});
parse_markup_map(m, node);
mapping.append(m);
}
if(node["id"].data == "dr") {
Mapping m([](unsigned) -> uint8 { return cpu.regs.mdr; }, {&Event::dr, &event});
parse_markup_map(m, node);
mapping.append(m);
}
if(node["id"].data == "sr") {
Mapping m({&Event::sr, &event}, [](unsigned, uint8) {});
parse_markup_map(m, node);
mapping.append(m);
}
}
}
void Cartridge::parse_markup_hitachidsp(Markup::Node root, unsigned roms) {
if(!root) return;
has_hitachidsp = true;
auto rom = root.find("rom");
auto ram = root.find("ram");
parse_markup_memory(hitachidsp.rom, rom(0), ID::HitachiDSPROM, false);
parse_markup_memory(hitachidsp.ram, ram(0), ID::HitachiDSPRAM, true);
for(auto& word : hitachidsp.dataROM) word = 0x000000;
for(auto& word : hitachidsp.dataRAM) word = 0x00;
hitachidsp.Frequency = root["frequency"].decimal();
if(hitachidsp.Frequency == 0) hitachidsp.frequency = 20000000;
hitachidsp.Roms = roms;
string dataROMName = rom(1)["name"].text();
string dataRAMName = ram(1)["name"].text();
interface->loadRequest(ID::HitachiDSPDROM, dataROMName);
if(dataRAMName.empty() == false) {
interface->loadRequest(ID::HitachiDSPDRAM, dataRAMName);
}
for(auto node : root.find("map")) {
if(node["id"].text() == "io") {
Mapping m({&HitachiDSP::dsp_read, &hitachidsp}, {&HitachiDSP::dsp_write, &hitachidsp});
parse_markup_map(m, node);
mapping.append(m);
}
if(node["id"].text() == "rom") {
Mapping m({&HitachiDSP::rom_read, &hitachidsp}, {&HitachiDSP::rom_write, &hitachidsp});
parse_markup_map(m, node);
if(m.size == 0) m.size = hitachidsp.rom.size();
mapping.append(m);
}
if(node["id"].text() == "ram") {
Mapping m({&HitachiDSP::ram_read, &hitachidsp}, {&HitachiDSP::ram_write, &hitachidsp});
parse_markup_map(m, node);
if(m.size == 0) m.size = hitachidsp.ram.size();
mapping.append(m);
}
}
}
void Cartridge::parse_markup_cartridge(Markup::Node root) {
if(!root) return;
parse_markup_memory(rom, root["rom"], ID::ROM, false);
parse_markup_memory(ram, root["ram"], ID::RAM, true);
for(auto node : root.find("map")) {
if(node["id"].text() == "rom") {
Mapping m(rom);
parse_markup_map(m, node);
if(m.size == 0) m.size = rom.size();
mapping.append(m);
}
if(node["id"].text() == "ram") {
Mapping m(ram);
parse_markup_map(m, node);
if(m.size == 0) m.size = ram.size();
mapping.append(m);
}
}
}
void Cartridge::parse_markup_sa1(Markup::Node root) {
if(!root) return;
has_sa1 = true;
auto rom = root.find("rom");
auto ram = root.find("ram");
parse_markup_memory(sa1.rom, rom(0), ID::SA1ROM, false);
parse_markup_memory(sa1.bwram, ram(0), ID::SA1BWRAM, true);
parse_markup_memory(sa1.iram, ram(1), ID::SA1IRAM, true);
for(auto node : root.find("map")) {
if(node["id"].text() == "io") {
Mapping m({&SA1::mmio_read, &sa1}, {&SA1::mmio_write, &sa1});
parse_markup_map(m, node);
mapping.append(m);
}
if(node["id"].text() == "rom") {
Mapping m({&SA1::mmcrom_read, &sa1}, {&SA1::mmcrom_write, &sa1});
parse_markup_map(m, node);
mapping.append(m);
}
if(node["id"].text() == "bwram") {
Mapping m({&SA1::mmcbwram_read, &sa1}, {&SA1::mmcbwram_write, &sa1});
parse_markup_map(m, node);
mapping.append(m);
}
if(node["id"].text() == "iram") {
Mapping m(sa1.cpuiram);
parse_markup_map(m, node);
if(m.size == 0) m.size = sa1.cpuiram.size();
mapping.append(m);
}
}
}
void Cartridge::parse_markup_obc1(Markup::Node root) {
if(!root) return;
has_obc1 = true;
parse_markup_memory(obc1.ram, root["ram"], ID::OBC1RAM, true);
for(auto node : root.find("map")) {
if(node["id"].text() == "io") {
Mapping m({&OBC1::read, &obc1}, {&OBC1::write, &obc1});
parse_markup_map(m, node);
mapping.append(m);
}
}
}
void Cartridge::parse_markup_sa1(Markup::Node root) {
if(root.exists() == false) return;
has_sa1 = true;
parse_markup_memory(sa1.rom, root["rom"], ID::SA1ROM, false);
parse_markup_memory(sa1.bwram, root["ram[0]"], ID::SA1BWRAM, true);
parse_markup_memory(sa1.iram, root["ram[1]"], ID::SA1IRAM, true);
for(auto& node : root) {
if(node.name != "map") continue;
if(node["id"].data == "io") {
Mapping m({&SA1::mmio_read, &sa1}, {&SA1::mmio_write, &sa1});
parse_markup_map(m, node);
mapping.append(m);
}
if(node["id"].data == "rom") {
Mapping m({&SA1::mmcrom_read, &sa1}, {&SA1::mmcrom_write, &sa1});
parse_markup_map(m, node);
mapping.append(m);
}
if(node["id"].data == "bwram") {
Mapping m({&SA1::mmcbwram_read, &sa1}, {&SA1::mmcbwram_write, &sa1});
parse_markup_map(m, node);
mapping.append(m);
}
if(node["id"].data == "iram") {
Mapping m(sa1.cpuiram);
parse_markup_map(m, node);
if(m.size == 0) m.size = sa1.cpuiram.size();
mapping.append(m);
}
}
}
void Cartridge::parse_markup_obc1(Markup::Node root) {
if(root.exists() == false) return;
has_obc1 = true;
parse_markup_memory(obc1.ram, root["ram"], ID::OBC1RAM, true);
for(auto& node : root) {
if(node.name != "map") continue;
if(node["id"].data == "io") {
Mapping m({&OBC1::read, &obc1}, {&OBC1::write, &obc1});
parse_markup_map(m, node);
mapping.append(m);
}
}
}
