void mmc_read_partition_table(uint8_t arg)
{
void *dev;
uint8_t lun = 0;
uint8_t max_luns;
dev = target_mmc_device();
if(!target_mmc_device())
{
max_luns = ufs_get_num_of_luns((struct ufs_dev*)dev);
ASSERT(max_luns);
for(lun = arg; lun < max_luns; lun++)
{
mmc_set_lun(lun);
if(partition_read_table())
{
dprintf(CRITICAL, "Error reading the partition table info for lun %d\n", lun);
}
}
mmc_set_lun(0);
}
else
{
if(partition_read_table())
{
dprintf(CRITICAL, "Error reading the partition table info\n");
}
}
}
static void target_mmc_sdhci_init()
{
static uint32_t mmc_clks[] = {
MMC_CLK_200MHZ, MMC_CLK_96MHZ, MMC_CLK_50MHZ };
struct mmc_config_data config;
unsigned int i;
memset(&config, 0, sizeof config);
config.bus_width = DATA_BUS_WIDTH_8BIT;
/* Trying Slot 1*/
config.slot = 1;
config.sdhc_base = mmc_sdhci_base[config.slot - 1];
config.pwrctl_base = mmc_sdc_base[config.slot - 1];
config.pwr_irq = mmc_sdc_pwrctl_irq[config.slot - 1];
config.hs400_support = 0;
for (i = 0; i < ARRAY_SIZE(mmc_clks); ++i) {
config.max_clk_rate = mmc_clks[i];
dprintf(INFO, "SDHC Running at %u MHz\n",
config.max_clk_rate / 1000000);
dev = mmc_init(&config);
if (dev && partition_read_table() == 0)
return;
}
if (dev == NULL)
dprintf(CRITICAL, "mmc init failed!");
else
dprintf(CRITICAL, "Error reading the partition table info\n");
ASSERT(0);
}
static void target_mmc_sdhci_init()
{
struct mmc_config_data config = {0};
config.bus_width = DATA_BUS_WIDTH_8BIT;
config.max_clk_rate = MMC_CLK_200MHZ;
/* Trying Slot 1*/
config.slot = 1;
config.sdhc_base = mmc_sdhci_base[config.slot - 1];
config.pwrctl_base = mmc_sdc_base[config.slot - 1];
config.pwr_irq = mmc_sdc_pwrctl_irq[config.slot - 1];
if (!(dev = mmc_init(&config))) {
/* Trying Slot 2 next */
config.slot = 2;
config.sdhc_base = mmc_sdhci_base[config.slot - 1];
config.pwrctl_base = mmc_sdc_base[config.slot - 1];
config.pwr_irq = mmc_sdc_pwrctl_irq[config.slot - 1];
if (!(dev = mmc_init(&config))) {
dprintf(CRITICAL, "mmc init failed!");
ASSERT(0);
}
}
/*
* MMC initialization is complete, read the partition table info
*/
if (partition_read_table()) {
dprintf(CRITICAL, "Error reading the partition table info\n");
ASSERT(0);
}
}
void target_init(void)
{
dprintf(INFO, "target_init()\n");
spmi_init(PMIC_ARB_CHANNEL_NUM, PMIC_ARB_OWNER_ID);
target_keystatus();
target_sdc_init();
if (partition_read_table())
{
dprintf(CRITICAL, "Error reading the partition table info\n");
ASSERT(0);
}
#if LONG_PRESS_POWER_ON
shutdown_detect();
#endif
#if PON_VIB_SUPPORT
/* turn on vibrator to indicate that phone is booting up to end user */
vib_timed_turn_on(VIBRATE_TIME);
#endif
if (target_use_signed_kernel())
target_crypto_init_params();
#if SMD_SUPPORT
rpm_smd_init();
#endif
}
void target_init(void)
{
dprintf(INFO, "target_init()\n");
spmi_init(PMIC_ARB_CHANNEL_NUM, PMIC_ARB_OWNER_ID);
target_keystatus();
target_sdc_init();
if (partition_read_table())
{
dprintf(CRITICAL, "Error reading the partition table info\n");
ASSERT(0);
}
#if LONG_PRESS_POWER_ON
shutdown_detect();
#endif
if (target_use_signed_kernel())
target_crypto_init_params();
#if SMD_SUPPORT
rpm_smd_init();
#endif
}
void target_init(void)
{
dprintf(INFO, "target_init()\n");
spmi_init(PMIC_ARB_CHANNEL_NUM, PMIC_ARB_OWNER_ID);
target_keystatus();
if (target_use_signed_kernel())
target_crypto_init_params();
platform_read_boot_config();
if (platform_boot_dev_isemmc())
target_sdc_init();
else
{
ufs_device.base = UFS_BASE;
ufs_init(&ufs_device);
}
/* Storage initialization is complete, read the partition table info */
if (partition_read_table())
{
dprintf(CRITICAL, "Error reading the partition table info\n");
ASSERT(0);
}
}
void target_sdc_init(void)
{
struct mmc_config_data config;
struct mmc_device *tmpdev;
target_sdc_pre_init_actions();
config.bus_width = DATA_BUS_WIDTH_8BIT;
config.max_clk_rate = MMC_CLK_200MHZ;
/* Try slot 1*/
config.slot = 1;
config.sdhc_base = mmc_sdhci_base[config.slot - 1];
config.pwrctl_base = mmc_pwrctl_base[config.slot - 1];
config.pwr_irq = mmc_sdc_pwrctl_irq[config.slot - 1];
config.hs400_support = 0;
/* Set drive strength & pull ctrl values */
set_sdc_power_ctrl(config.slot);
if (!(dev = mmc_init(&config)))
{
dprintf(CRITICAL, "mmc1 init failed!");
}
/* Try slot 2 */
config.slot = 2;
config.sdhc_base = mmc_sdhci_base[config.slot - 1];
config.pwrctl_base = mmc_pwrctl_base[config.slot - 1];
config.pwr_irq = mmc_sdc_pwrctl_irq[config.slot - 1];
/* Set drive strength & pull ctrl values */
set_sdc_power_ctrl(config.slot);
if (!(tmpdev = mmc_init(&config)))
{
dprintf(CRITICAL, "mmc2 init failed!");
}
else if(!dev)
dev = tmpdev;
/* we need at least one mmc device */
ASSERT(dev);
/* MMC initialization is complete, read the partition table info */
if (partition_read_table())
{
dprintf(CRITICAL, "Error reading the partition table info\n");
ASSERT(0);
}
}
void target_init(void)
{
dprintf(INFO, "target_init()\n");
spmi_init(PMIC_ARB_CHANNEL_NUM, PMIC_ARB_OWNER_ID);
/* Save PM8941 version info. */
pmic_ver = pm8x41_get_pmic_rev();
target_keystatus();
if (target_use_signed_kernel())
target_crypto_init_params();
/* Display splash screen if enabled */
#if DISPLAY_SPLASH_SCREEN
dprintf(INFO, "Display Init: Start\n");
display_init();
dprintf(INFO, "Display Init: Done\n");
#endif
/*
* Set drive strength & pull ctrl for
* emmc
*/
set_sdc_power_ctrl();
#if MMC_SDHCI_SUPPORT
target_mmc_sdhci_init();
#else
target_mmc_mci_init();
#endif
/*
* MMC initialization is complete, read the partition table info
*/
if (partition_read_table()) {
dprintf(CRITICAL, "Error reading the partition table info\n");
ASSERT(0);
}
}
void target_init(void)
{
dprintf(INFO, "target_init()\n");
spmi_init(PMIC_ARB_CHANNEL_NUM, PMIC_ARB_OWNER_ID);
target_keystatus();
if (target_use_signed_kernel())
target_crypto_init_params();
platform_read_boot_config();
if (platform_boot_dev_isemmc())
{
target_sdc_init();
}
else
{
ufs_device.base = UFS_BASE;
ufs_init(&ufs_device);
}
/* Storage initialization is complete, read the partition table info */
if (partition_read_table())
{
dprintf(CRITICAL, "Error reading the partition table info\n");
ASSERT(0);
}
rpm_smd_init();
/* QPNP WLED init for display backlight */
pm8x41_wled_config_slave_id(PMIC_WLED_SLAVE_ID);
qpnp_wled_init();
}
static void target_mmc_sdhci_init()
{
struct mmc_config_data config = {0};
uint32_t soc_ver = 0;
soc_ver = board_soc_version();
/*
* 8974 v1 fluid devices, have a hardware bug
* which limits the bus width to 4 bit.
*/
switch(board_hardware_id())
{
case HW_PLATFORM_FLUID:
if (platform_is_8974() && BOARD_SOC_VERSION1(soc_ver))
config.bus_width = DATA_BUS_WIDTH_4BIT;
else
config.bus_width = DATA_BUS_WIDTH_8BIT;
break;
default:
config.bus_width = DATA_BUS_WIDTH_8BIT;
};
/* Trying Slot 1*/
config.slot = 1;
/*
* For 8974 AC platform the software clock
* plan recommends to use the following frequencies:
* 200 MHz --> 192 MHZ
* 400 MHZ --> 384 MHZ
* only for emmc slot
*/
if (platform_is_8974ac())
config.max_clk_rate = MMC_CLK_192MHZ;
else
config.max_clk_rate = MMC_CLK_200MHZ;
config.sdhc_base = mmc_sdhci_base[config.slot - 1];
config.pwrctl_base = mmc_sdc_base[config.slot - 1];
config.pwr_irq = mmc_sdc_pwrctl_irq[config.slot - 1];
config.hs400_support = 1;
if (!(dev = mmc_init(&config))) {
/* Trying Slot 2 next */
config.slot = 2;
config.max_clk_rate = MMC_CLK_200MHZ;
config.sdhc_base = mmc_sdhci_base[config.slot - 1];
config.pwrctl_base = mmc_sdc_base[config.slot - 1];
config.pwr_irq = mmc_sdc_pwrctl_irq[config.slot - 1];
if (!(dev = mmc_init(&config))) {
dprintf(CRITICAL, "mmc init failed!");
ASSERT(0);
}
}
/*
* MMC initialization is complete, read the partition table info
*/
if (partition_read_table()) {
dprintf(CRITICAL, "Error reading the partition table info\n");
ASSERT(0);
}
}
