コード例 #1
0
ファイル: if_patm_rx.c プロジェクト: 2asoft/freebsd
/*
 * open the VCC
 */
void
patm_rx_vcc_open(struct patm_softc *sc, struct patm_vcc *vcc)
{
	uint32_t w1 = IDT_RCT_OPEN;

	patm_debug(sc, VCC, "%u.%u RX opening", vcc->vcc.vpi, vcc->vcc.vci);

	switch (vcc->vcc.aal) {
	  case ATMIO_AAL_0:
		w1 |= IDT_RCT_AAL0 | IDT_RCT_FBP2 | IDT_RCT_RCI;
		break;
	  case ATMIO_AAL_34:
		w1 |= IDT_RCT_AAL34;
		break;
	  case ATMIO_AAL_5:
		w1 |= IDT_RCT_AAL5;
		break;
	  case ATMIO_AAL_RAW:
		w1 |= IDT_RCT_AALRAW | IDT_RCT_RCI;
		break;
	}

	if (vcc->cid != 0)
		patm_sram_write4(sc, sc->mmap->rct + vcc->cid *
		    IDT_RCT_ENTRY_SIZE, w1, 0, 0, 0xffffffff);
	else {
		/* switch the interface into promiscuous mode */
		patm_nor_write(sc, IDT_NOR_CFG, patm_nor_read(sc, IDT_NOR_CFG) |
		    IDT_CFG_ICAPT | IDT_CFG_VPECA);
	}

	vcc->vflags |= PATM_VCC_RX_OPEN;
}
コード例 #2
0
ファイル: if_patm_rx.c プロジェクト: 2asoft/freebsd
/* close the given vcc for transmission */
void
patm_rx_vcc_close(struct patm_softc *sc, struct patm_vcc *vcc)
{
	u_int w1;

	patm_debug(sc, VCC, "%u.%u RX closing", vcc->vcc.vpi, vcc->vcc.vci);

	if (vcc->cid == 0) {
		/* switch off promiscuous mode */
		patm_nor_write(sc, IDT_NOR_CFG, patm_nor_read(sc, IDT_NOR_CFG) &
		    ~(IDT_CFG_ICAPT | IDT_CFG_VPECA));
		vcc->vflags &= ~PATM_VCC_RX_OPEN;
		return;
	}

	/* close the connection but keep state */
	w1 = rct_read(sc, vcc->cid, 0);
	w1 &= ~IDT_RCT_OPEN;
	rct_write(sc, vcc->cid, 0, w1);

	/* minimum idle count */
	w1 = (w1 & ~IDT_RCT_IACT_CNT_MASK) | (1 << IDT_RCT_IACT_CNT_SHIFT);
	rct_write(sc, vcc->cid, 0, w1);

	/* initialize scan */
	patm_nor_write(sc, IDT_NOR_IRCP, vcc->cid);

	vcc->vflags &= ~PATM_VCC_RX_OPEN;
	vcc->vflags |= PATM_VCC_RX_CLOSING;

	/*
	 * check the RSQ
	 * This is a hack. The problem is, that although an entry is written
	 * to the RSQ, no interrupt is generated. Also we must wait 1 cell
	 * time for the SAR to process the scan of our connection.
	 */
	DELAY(1);
	patm_intr_rsq(sc);
}
コード例 #3
0
/*
 * Stop the card and reset it
 */
void
patm_reset(struct patm_softc *sc)
{

	patm_debug(sc, ATTACH, "resetting...");

	patm_nor_write(sc, IDT_NOR_CFG, IDT_CFG_SWRST);
	DELAY(200);
	patm_nor_write(sc, IDT_NOR_CFG, 0);
	DELAY(200);

	patm_nor_write(sc, IDT_NOR_RSQH, 0);
	patm_nor_write(sc, IDT_NOR_TSQH, 0);

	patm_nor_write(sc, IDT_NOR_GP, IDT_GP_PHY_RST);
	DELAY(50);
	patm_nor_write(sc, IDT_NOR_GP, IDT_GP_EEDO | IDT_GP_EECS);
	DELAY(50);
}
コード例 #4
0
int
patm_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data)
{
	struct ifreq *ifr = (struct ifreq *)data;
	struct ifaddr *ifa = (struct ifaddr *)data;
	struct patm_softc *sc = ifp->if_softc;
	int error = 0;
	uint32_t cfg;
	struct atmio_vcctable *vtab;

	switch (cmd) {

	  case SIOCSIFADDR:
		mtx_lock(&sc->mtx);
		ifp->if_flags |= IFF_UP;
		if (!(ifp->if_drv_flags & IFF_DRV_RUNNING))
			patm_initialize(sc);
		switch (ifa->ifa_addr->sa_family) {

#ifdef INET
		  case AF_INET:
		  case AF_INET6:
			ifa->ifa_rtrequest = atm_rtrequest;
			break;
#endif
		  default:
			break;
		}
		mtx_unlock(&sc->mtx);
		break;

	  case SIOCSIFFLAGS:
		mtx_lock(&sc->mtx);
		if (ifp->if_flags & IFF_UP) {
			if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) {
				patm_initialize(sc);
			}
		} else {
			if (ifp->if_drv_flags & IFF_DRV_RUNNING) {
				patm_stop(sc);
			}
		}
		mtx_unlock(&sc->mtx);
		break;

	  case SIOCGIFMEDIA:
	  case SIOCSIFMEDIA:
		error = ifmedia_ioctl(ifp, ifr, &sc->media, cmd);

		/*
		 * We need to toggle unassigned/idle cells ourself because
		 * the 77252 generates null cells for spacing. When switching
		 * null cells of it gets the timing wrong.
		 */
		mtx_lock(&sc->mtx);
		if (ifp->if_drv_flags & IFF_DRV_RUNNING) {
			if (sc->utopia.state & UTP_ST_UNASS) {
				if (!(sc->flags & PATM_UNASS)) {
					cfg = patm_nor_read(sc, IDT_NOR_CFG);
					cfg &= ~IDT_CFG_IDLECLP;
					patm_nor_write(sc, IDT_NOR_CFG, cfg);
					sc->flags |= PATM_UNASS;
				}
			} else {
				if (sc->flags & PATM_UNASS) {
					cfg = patm_nor_read(sc, IDT_NOR_CFG);
					cfg |= IDT_CFG_IDLECLP;
					patm_nor_write(sc, IDT_NOR_CFG, cfg);
					sc->flags &= ~PATM_UNASS;
				}
			}
		} else {
			if (sc->utopia.state & UTP_ST_UNASS)
				sc->flags |= PATM_UNASS;
			else
				sc->flags &= ~PATM_UNASS;
		}
		mtx_unlock(&sc->mtx);
		break;

	  case SIOCSIFMTU:
		/*
		 * Set the interface MTU.
		 */
		if (ifr->ifr_mtu > ATMMTU)
			error = EINVAL;
		else
			ifp->if_mtu = ifr->ifr_mtu;
		break;

	  case SIOCATMOPENVCC:		/* kernel internal use */
		error = patm_open_vcc(sc, (struct atmio_openvcc *)data);
		break;

	  case SIOCATMCLOSEVCC:		/* kernel internal use */
		error = patm_close_vcc(sc, (struct atmio_closevcc *)data);
		break;

	  case SIOCATMGVCCS:	/* external use */
#ifdef CPU_CHERI
#error Unvalidatable ifr_data use.  Unsafe with CheriABI.
#endif
		/* return vcc table */
		vtab = atm_getvccs((struct atmio_vcc **)sc->vccs,
		    sc->mmap->max_conn, sc->vccs_open, &sc->mtx, 1);
		error = copyout(vtab, ifr->ifr_data, sizeof(*vtab) +
		    vtab->count * sizeof(vtab->vccs[0]));
		free(vtab, M_DEVBUF);
		break;

	  case SIOCATMGETVCCS:	/* netgraph internal use */
		vtab = atm_getvccs((struct atmio_vcc **)sc->vccs,
		    sc->mmap->max_conn, sc->vccs_open, &sc->mtx, 0);
		if (vtab == NULL) {
			error = ENOMEM;
			break;
		}
		*(void **)data = vtab;
		break;

	  default:
		patm_debug(sc, IOCTL, "unknown cmd=%08lx arg=%p", cmd, data);
		error = EINVAL;
		break;
	}

	return (error);
}
コード例 #5
0
/*
 * Start the card. This assumes the mutex to be held
 */
void
patm_initialize(struct patm_softc *sc)
{
	uint32_t cfg;
	u_int i;

	patm_debug(sc, ATTACH, "configuring...");

	/* clear SRAM */
	for (i = 0; i < sc->mmap->sram * 1024; i += 4)
		patm_sram_write4(sc, i, 0, 0, 0, 0);
	patm_scd_init(sc);

	/* configuration register. Setting NOIDLE makes the timing wrong! */
	cfg = IDT_CFG_TXFIFO9 | IDT_CFG_RXQ512 | PATM_CFG_VPI |
	    /* IDT_CFG_NOIDLE | */ sc->mmap->rxtab;
	if (!(sc->flags & PATM_UNASS))
		cfg |= IDT_CFG_IDLECLP;
	patm_nor_write(sc, IDT_NOR_CFG, cfg);

	/* clean all the status queues and the Raw handle */
	memset(sc->tsq, 0, sc->sq_size);

	/* initialize RSQ */
	patm_debug(sc, ATTACH, "RSQ %llx", (unsigned long long)sc->rsq_phy);
	patm_nor_write(sc, IDT_NOR_RSQB, sc->rsq_phy);
	patm_nor_write(sc, IDT_NOR_RSQT, sc->rsq_phy);
	patm_nor_write(sc, IDT_NOR_RSQH, 0);
	sc->rsq_last = PATM_RSQ_SIZE - 1;

	/* initialize TSTB */
	patm_nor_write(sc, IDT_NOR_TSTB, sc->mmap->tst1base << 2);
	patm_tst_init(sc);

	/* initialize TSQ */
	for (i = 0; i < IDT_TSQ_SIZE; i++)
		sc->tsq[i].stamp = htole32(IDT_TSQE_EMPTY);
	patm_nor_write(sc, IDT_NOR_TSQB, sc->tsq_phy);
	patm_nor_write(sc, IDT_NOR_TSQH, 0);
	patm_nor_write(sc, IDT_NOR_TSQT, 0);
	sc->tsq_next = sc->tsq;

	/* GP */
#if BYTE_ORDER == BIG_ENDIAN && 0
	patm_nor_write(sc, IDT_NOR_GP, IDT_GP_BIGE);
#else
	patm_nor_write(sc, IDT_NOR_GP, 0);
#endif

	/* VPM */
	patm_nor_write(sc, IDT_NOR_VPM, 0);

	/* RxFIFO */
	patm_nor_write(sc, IDT_NOR_RXFD,
	    IDT_RXFD(sc->mmap->rxfifo_addr, sc->mmap->rxfifo_code));
	patm_nor_write(sc, IDT_NOR_RXFT, 0);
	patm_nor_write(sc, IDT_NOR_RXFH, 0);

	/* RAWHND */
	patm_debug(sc, ATTACH, "RWH %llx",
	    (unsigned long long)sc->rawhnd_phy);
	patm_nor_write(sc, IDT_NOR_RAWHND, sc->rawhnd_phy);

	/* ABRSTD */
	patm_nor_write(sc, IDT_NOR_ABRSTD,
	    IDT_ABRSTD(sc->mmap->abrstd_addr, sc->mmap->abrstd_code));
	for (i = 0; i < sc->mmap->abrstd_size; i++)
		patm_sram_write(sc, sc->mmap->abrstd_addr + i, 0);
	patm_nor_write(sc, IDT_NOR_ABRRQ, 0);
	patm_nor_write(sc, IDT_NOR_VBRRQ, 0);

	/* rate tables */
	if (sc->flags & PATM_25M) {
		for (i = 0; i < patm_rtables_size; i++)
			patm_sram_write(sc, sc->mmap->rtables + i,
			    patm_rtables25[i]);
	} else {
		for (i = 0; i < patm_rtables_size; i++)
			patm_sram_write(sc, sc->mmap->rtables + i,
			    patm_rtables155[i]);
	}
	patm_nor_write(sc, IDT_NOR_RTBL, sc->mmap->rtables << 2);

	/* Maximum deficit */
	patm_nor_write(sc, IDT_NOR_MXDFCT, 32 | IDT_MDFCT_LCI | IDT_MDFCT_LNI);

	/* Free buffer queues */
	patm_nor_write(sc, IDT_NOR_FBQP0, 0);
	patm_nor_write(sc, IDT_NOR_FBQP1, 0);
	patm_nor_write(sc, IDT_NOR_FBQP2, 0);
	patm_nor_write(sc, IDT_NOR_FBQP3, 0);

	patm_nor_write(sc, IDT_NOR_FBQWP0, 0);
	patm_nor_write(sc, IDT_NOR_FBQWP1, 0);
	patm_nor_write(sc, IDT_NOR_FBQWP2, 0);
	patm_nor_write(sc, IDT_NOR_FBQWP3, 0);

	patm_nor_write(sc, IDT_NOR_FBQS0,
	    (SMBUF_THRESHOLD << 28) |
	    (SMBUF_NI_THRESH << 24) |
	    (SMBUF_CI_THRESH << 20) |
	    SMBUF_CELLS);
	patm_nor_write(sc, IDT_NOR_FBQS1,
	    (LMBUF_THRESHOLD << 28) |
	    (LMBUF_NI_THRESH << 24) |
	    (LMBUF_CI_THRESH << 20) |
	    LMBUF_CELLS);
	patm_nor_write(sc, IDT_NOR_FBQS2,
	    (VMBUF_THRESHOLD << 28) | VMBUF_CELLS);
	patm_nor_write(sc, IDT_NOR_FBQS3, 0);

	/* make SCD0 for UBR0 */
	if ((sc->scd0 = patm_scd_alloc(sc)) == NULL) {
		patm_printf(sc, "cannot create UBR0 SCD\n");
		patm_reset(sc);
		return;
	}
	sc->scd0->q.ifq_maxlen = PATM_DLFT_MAXQ;

	patm_scd_setup(sc, sc->scd0);
	patm_tct_setup(sc, sc->scd0, NULL);

	patm_debug(sc, ATTACH, "go...");

	sc->utopia.flags &= ~UTP_FL_POLL_CARRIER;
	sc->ifp->if_drv_flags |= IFF_DRV_RUNNING;

	/* enable interrupts, Tx and Rx paths */
	cfg |= IDT_CFG_RXPTH | IDT_CFG_RXIIMM | IDT_CFG_RAWIE | IDT_CFG_RQFIE |
	    IDT_CFG_TIMOIE | IDT_CFG_FBIE | IDT_CFG_TXENB | IDT_CFG_TXINT |
	    IDT_CFG_TXUIE | IDT_CFG_TXSFI | IDT_CFG_PHYIE;
	patm_nor_write(sc, IDT_NOR_CFG, cfg);

	for (i = 0; i < sc->mmap->max_conn; i++)
		if (sc->vccs[i] != NULL)
			patm_load_vc(sc, sc->vccs[i], 1);

	ATMEV_SEND_IFSTATE_CHANGED(IFP2IFATM(sc->ifp),
	    sc->utopia.carrier == UTP_CARR_OK);
}