int pgt_cardbus_enable(struct pgt_softc *sc) { struct pgt_cardbus_softc *csc = (struct pgt_cardbus_softc *)sc; cardbus_devfunc_t ct = csc->sc_ct; cardbus_chipset_tag_t cc = ct->ct_cc; cardbus_function_tag_t cf = ct->ct_cf; /* power on the socket */ Cardbus_function_enable(ct); /* setup the PCI configuration registers */ pgt_cardbus_setup(csc); /* map and establish the interrupt handler */ csc->sc_ih = cardbus_intr_establish(cc, cf, csc->sc_intrline, IPL_NET, pgt_intr, sc, sc->sc_dev.dv_xname); if (csc->sc_ih == NULL) { printf("%s: could not establish interrupt at %d\n", sc->sc_dev.dv_xname, csc->sc_intrline); Cardbus_function_disable(ct); return (1); } return (0); }
void pgt_cardbus_attach(struct device *parent, struct device *self, void *aux) { struct pgt_cardbus_softc *csc = (struct pgt_cardbus_softc *)self; struct pgt_softc *sc = &csc->sc_pgt; struct cardbus_attach_args *ca = aux; cardbus_devfunc_t ct = ca->ca_ct; bus_addr_t base; int error; sc->sc_dmat = ca->ca_dmat; csc->sc_ct = ct; csc->sc_tag = ca->ca_tag; csc->sc_intrline = ca->ca_intrline; csc->sc_pc = ca->ca_pc; /* power management hooks */ sc->sc_enable = pgt_cardbus_enable; sc->sc_disable = pgt_cardbus_disable; sc->sc_power = pgt_cardbus_power; /* remember chipset */ if (PCI_PRODUCT(ca->ca_id) == PCI_PRODUCT_INTERSIL_ISL3877) sc->sc_flags |= SC_ISL3877; /* map control / status registers */ error = Cardbus_mapreg_map(ct, CARDBUS_BASE0_REG, PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_32BIT, 0, &sc->sc_iotag, &sc->sc_iohandle, &base, &csc->sc_mapsize); if (error != 0) { printf(": can't map mem space\n"); return; } csc->sc_bar0_val = base | PCI_MAPREG_TYPE_MEM; /* disable all interrupts */ bus_space_write_4(sc->sc_iotag, sc->sc_iohandle, PGT_REG_INT_EN, 0); (void)bus_space_read_4(sc->sc_iotag, sc->sc_iohandle, PGT_REG_INT_EN); DELAY(PGT_WRITEIO_DELAY); /* set up the PCI configuration registers */ pgt_cardbus_setup(csc); printf(": irq %d\n", csc->sc_intrline); if (rootvp == NULL) mountroothook_establish(pgt_attach, sc); else pgt_attach(sc); }