static bool
msr_pass_write_msr (u32 msrindex, u64 msrdata)
{
u64 tmp;
int num;
struct msrarg m;
/* FIXME: Exception handling */
switch (msrindex) {
case MSR_IA32_BIOS_UPDT_TRIG:
return ia32_bios_updt (msrdata);
case MSR_IA32_TSC_ADJUST:
current->tsc_offset = msrdata;
current->vmctl.tsc_offset_changed ();
break;
case MSR_IA32_TIME_STAMP_COUNTER:
asm_rdmsr64 (MSR_IA32_TIME_STAMP_COUNTER, &tmp);
current->tsc_offset = msrdata - tmp;
current->vmctl.tsc_offset_changed ();
break;
case MSR_IA32_APIC_BASE_MSR:
if (msrdata & MSR_IA32_APIC_BASE_MSR_APIC_GLOBAL_ENABLE_BIT) {
tmp = msrdata & MSR_IA32_APIC_BASE_MSR_APIC_BASE_MASK;
if (phys_in_vmm (tmp))
panic ("relocating APIC Base to VMM address!");
}
localapic_change_base_msr (msrdata);
goto pass;
case MSR_IA32_X2APIC_ICR:
localapic_x2apic_icr (msrdata);
goto pass;
default:
pass:
m.msrindex = msrindex;
m.msrdata = &msrdata;
num = callfunc_and_getint (do_write_msr_sub, &m);
switch (num) {
case -1:
break;
case EXCEPTION_GP:
return true;
default:
panic ("msr_pass_write_msr: exception %d", num);
}
}
return false;
}
/* fakerom=false: writable */
u64
gmm_pass_gp2hp (u64 gp, bool *fakerom)
{
bool f;
u64 r;
if (phys_in_vmm (gp)) {
r = phys_blank;
f = true;
} else {
r = gp;
f = false;
}
if (fakerom)
*fakerom = f;
return r;
}
