/* CFI Query 8-bit */
static void _cfi_query8(long base, uint8_t *buf, int offset, int blen, int buswidth)
{
physaddr_t src;
phys_write8(base + FLASH_CFI_QUERY_ADDR*buswidth, FLASH_CFI_QUERY_MODE);
for (src = base + offset*buswidth; blen; src += buswidth, buf++, blen--)
*buf = phys_read8(src);
phys_write8(base + FLASH_CFI_QUERY_ADDR*buswidth, FLASH_CFI_QUERY_EXIT);
}
static int
sb1250_host_read(cfe_devctx_t *ctx, iocb_buffer_t *buffer)
{
sb1250_host_t *softc = ctx->dev_softc;
uint32_t boffset;
uint32_t blen;
/* For random-access devices, there is an implicit seek with every
read. We maintain a current offset in case a sequential mode is
added. */
boffset = (uint32_t)buffer->buf_offset;
if (boffset >= softc->limit) {
blen = 0;
softc->offset = softc->limit;
}
else {
uint64_t src;
uint8_t b, *bptr;
int i;
src = softc->pci_base + boffset;
bptr = buffer->buf_ptr;
blen = buffer->buf_length;
if (blen > softc->limit - boffset)
blen = softc->limit - boffset;
/* copy the bytes (better to use the data mover?) */
for (i = 0; i < blen; i++) {
b = phys_read8(src);
*bptr++ = b;
src++;
}
softc->offset = boffset;
}
buffer->buf_retlen = blen;
return 0;
}
/* AMD erase (8-bit) */
static int _amd_erase8(long base, int offset, int buswidth)
{
physaddr_t dst = base + offset;
/* Do an "unlock write" sequence (cycles 1-2) */
phys_write8(base + AMD_FLASH_MAGIC_ADDR_1*buswidth, AMD_FLASH_MAGIC_1);
phys_write8(base + AMD_FLASH_MAGIC_ADDR_2*buswidth, AMD_FLASH_MAGIC_2);
/* send the erase command (cycle 3) */
phys_write8(base + AMD_FLASH_MAGIC_ADDR_1*buswidth, AMD_FLASH_ERASE_3);
/* Do an "unlock write" sequence (cycles 4-5) */
phys_write8(base + AMD_FLASH_MAGIC_ADDR_1*buswidth, AMD_FLASH_MAGIC_1);
phys_write8(base + AMD_FLASH_MAGIC_ADDR_2*buswidth, AMD_FLASH_MAGIC_2);
/* Send the "erase sector" qualifier (cycle 6) */
phys_write8(dst, AMD_FLASH_ERASE_SEC_6);
/* Wait for the erase to complete */
while (phys_read8(dst) != 0xff);
return 0;
}
