void irq_install(void) {
// Remap the irq table.
//The PICs are communicated with via the I/O bus. Each has a command port and a data port:
//Master - command: 0x20, data: 0x21
//Slave - command: 0xA0, data: 0xA1
debug_noargs("irq", "Remapping PIC...");
pic_remap(0x20, 0x28);
idt_set_gate(IRQ0, (uint32_t) irq0, 0x08, 0x8E);
idt_set_gate(IRQ1, (uint32_t) irq1, 0x08, 0x8E);
idt_set_gate(IRQ2, (uint32_t) irq2, 0x08, 0x8E);
idt_set_gate(IRQ3, (uint32_t) irq3, 0x08, 0x8E);
idt_set_gate(IRQ4, (uint32_t) irq4, 0x08, 0x8E);
idt_set_gate(IRQ5, (uint32_t) irq5, 0x08, 0x8E);
idt_set_gate(IRQ6, (uint32_t) irq6, 0x08, 0x8E);
idt_set_gate(IRQ7, (uint32_t) irq7, 0x08, 0x8E);
idt_set_gate(IRQ8, (uint32_t) irq8, 0x08, 0x8E);
idt_set_gate(IRQ9, (uint32_t) irq9, 0x08, 0x8E);
idt_set_gate(IRQ10, (uint32_t) irq10, 0x08, 0x8E);
idt_set_gate(IRQ11, (uint32_t) irq11, 0x08, 0x8E);
idt_set_gate(IRQ12, (uint32_t) irq12, 0x08, 0x8E);
idt_set_gate(IRQ13, (uint32_t) irq13, 0x08, 0x8E);
idt_set_gate(IRQ14, (uint32_t) irq14, 0x08, 0x8E);
idt_set_gate(IRQ15, (uint32_t) irq15, 0x08, 0x8E);
}
void main(){
pic_remap();
irq_handlers_init();
idt_init();
keyboard_init();
gdt_install();
cls();
printk("> ",'s');
asm("sti");
}
void
idt_init ()
{
for (int i = 0; i < MAX_IDT; i++)
{
idt[i].base_lo = 0;
idt[i].sel = 0;
idt[i].always0 = 0;
idt[i].flags = 0;
idt[i].base_hi = 0;
idt[i].base_64 = 0;
idt[i].reserved = 0;
}
//Remap the irq table.
//IRQ 0-15 -> INT 32-47
pic_remap ();
}
/**
* Inits IRQ-support
*/
void irq_init()
{
pic_remap();
idt_fill_entry(32, (uint32)irq0, 0x8, 0x8E);
idt_fill_entry(33, (uint32)irq1, 0x8, 0x8E);
idt_fill_entry(34, (uint32)irq2, 0x8, 0x8E);
idt_fill_entry(35, (uint32)irq3, 0x8, 0x8E);
idt_fill_entry(36, (uint32)irq4, 0x8, 0x8E);
idt_fill_entry(37, (uint32)irq5, 0x8, 0x8E);
idt_fill_entry(38, (uint32)irq6, 0x8, 0x8E);
idt_fill_entry(39, (uint32)irq7, 0x8, 0x8E);
idt_fill_entry(40, (uint32)irq8, 0x8, 0x8E);
idt_fill_entry(41, (uint32)irq9, 0x8, 0x8E);
idt_fill_entry(42, (uint32)irq10, 0x8, 0x8E);
idt_fill_entry(43, (uint32)irq11, 0x8, 0x8E);
idt_fill_entry(44, (uint32)irq12, 0x8, 0x8E);
idt_fill_entry(45, (uint32)irq13, 0x8, 0x8E);
idt_fill_entry(46, (uint32)irq14, 0x8, 0x8E);
idt_fill_entry(47, (uint32)irq15, 0x8, 0x8E);
}
void irq_init()
{
pic_remap(0x20, 0x28);
irq_mask_all();
interrupts_set_isr(32, &isr32, ISR_KERNEL);
interrupts_set_isr(33, &isr33, ISR_KERNEL);
interrupts_set_isr(34, &isr34, ISR_KERNEL);
interrupts_set_isr(35, &isr35, ISR_KERNEL);
interrupts_set_isr(36, &isr36, ISR_KERNEL);
interrupts_set_isr(37, &isr37, ISR_KERNEL);
interrupts_set_isr(38, &isr38, ISR_KERNEL);
interrupts_set_isr(39, &isr39, ISR_KERNEL);
interrupts_set_isr(40, &isr40, ISR_KERNEL);
interrupts_set_isr(41, &isr41, ISR_KERNEL);
interrupts_set_isr(42, &isr42, ISR_KERNEL);
interrupts_set_isr(43, &isr43, ISR_KERNEL);
interrupts_set_isr(44, &isr44, ISR_KERNEL);
interrupts_set_isr(45, &isr45, ISR_KERNEL);
interrupts_set_isr(46, &isr46, ISR_KERNEL);
interrupts_set_isr(47, &isr47, ISR_KERNEL);
}
void
descriptor_table_idt_init(void)
{
uint32 index;
idt_reg.limit = sizeof(idt_entry_list) - 1;
idt_reg.base = (ptr_t)&idt_entry_list;
kmemset(&idt_entry_list, 0, sizeof(idt_entry_list));
pic_remap();
index = 0;
while (index < ARRAY_CNT_OF(isr_handler)) {
descriptor_table_idt_entry_set(index, isr_handler[index],
IDT_CODE_SEL, ATTR_INT_32);
index++;
}
idt_table_flush((uint32)&idt_reg);
printf_vga_ts("IDT table initialized.\n");
}
void pic_init()
{
pic_remap(OL_INTERRUPT_BASE, OL_INTERRUPT_BASE+8);
initPIT(100); // program pic to 100 hertz
}
void irq_configure(void){
// Remap IRQ to avoid conflict with Intel Interrupts (thx IBM)
pic_remap(MPIC_IRQ_OFFSET, SPIC_IRQ_OFFSET);
irq_clear_mask(1);
}
void setup_i8259a(void)
{
pic_remap(HW_INTERRUPT_OFFSET);
irqchip_register(&i8259a);
}
int main(NULONG magic,NADDR addr) {
//Clear screen
vid_clear_mem();
/*
Multiboot stuff
*/
/* Am I booted by a Multiboot-compliant boot loader? */
if (magic != MULTIBOOT_BOOTLOADER_MAGIC)
panic("NoOS was not booted by a Multiboot-compliant boot loader. MAGIC_VALUE is not correct");
multiboot_info_t *mbi;
/* Set MBI to the address of the Multiboot information structure. */
mbi = (multiboot_info_t *) addr;
/* Are mem_* valid? */
if (NCHECK_FLAG(mbi->flags,0) == 0)
panic("NoOS detected that flag 0 in the mbi is not set. MBI_FLAGS are not correct");
if (NCHECK_FLAG(mbi->flags,5) == 0)
panic("NoOS detected that flog 5 in the mbi is not set. MBI_FLAGS are not correct");
/* Init debug */
debug_init(addr);
/*
vid_print("Error caused in: ",0x8);
Elf32_Sym* symbol = elf_find_sym((dword)0x1001ef);
char* name = elf_get_str(symbol->st_name);
vid_print(name,0x6);vid_print("\r\n",0x06); kstop();
*/
kprint("Kernel loaded\r\n");
kprint("Setting up IDT...\r\n");
idt_setup_ptr();
nmemset(&idt, 0, sizeof(struct IDTDescr)*256);
idt_load_idt();
idt_setup_isr();
kprint("Creating Handlers...\r\n");
idt_set_handlers();
kprint("Remapping PIC...\r\n");
pic_remap();
kprint("Initializing GDT...\r\n");
init_gdt();
kprint("Initializing Memory Manager...\r\n");
mem_init(addr);
kprint("Setting up RPC...\r\n");
rpc_init();
kprint("Setting up Services..\r\n");
srvc_init();
kprint("Initializing Keyboard driver...\r\n");
kbd_init();
kprint("Initializing Video driver...\r\n");
vid_init_drv();
kprint("Initializing Floppy driver...\r\n");
floppy_detect_drive();
kprint("Initializing Memory Manager [[SERVICE]]...\r\n");
mem_init_srvc();
kprint("Initializing RPC [[SERVICE]]...\r\n");
rpc_init_srvc();
kprint("Enabling interrupts...\r\n");
asm("sti");
nash_start();
while(1) asm("hlt");
}
void pic_init(void)
{
pic_disable();
pic_remap(MASTER_OFFSET, SLAVE_OFFSET);
}
