void gic_init(void)
{
lvaddr_t gic_base = paging_map_device(PIC_BASE, ARM_L1_SECTION_BYTES);
pl130_gic_initialize(&gic, (mackerel_addr_t)gic_base + DIST_OFFSET,
(mackerel_addr_t)gic_base + CPU_OFFSET);
//read GIC configuration
gic_config = pl130_gic_ICDICTR_rd(&gic);
it_num_lines = pl130_gic_ICDICTR_it_lines_num_extract(gic_config);
cpu_number = pl130_gic_ICDICTR_cpu_number_extract(gic_config);
sec_extn_implemented = pl130_gic_ICDICTR_TZ_extract(gic_config);
gic_cpu_interface_init();
if(hal_cpu_is_bsp())
{
gic_distributor_init();
}
}
/*
* Initialize the global interrupt controller
*
* There are three types of interrupts
* 1) Software generated Interrupts (SGI) - IDs 0-15
* 2) Private Peripheral Interrupts (PPI) - IDs 16-31
* 3) Shared Peripheral Interrups (SPI) - IDs 32...
*/
void gic_init(void)
{
lvaddr_t gic_dist_base =
paging_map_device( platform_get_distributor_address(), DIST_SIZE );
lvaddr_t gic_cpu_base =
paging_map_device( platform_get_gic_cpu_address(), CPU_SIZE );
pl130_gic_initialize(&gic, (mackerel_addr_t)gic_dist_base,
(mackerel_addr_t)gic_cpu_base );
// read GIC configuration
gic_config = pl130_gic_ICDICTR_rd(&gic);
// ARM GIC 2.0 TRM, Table 4-6
// This is the number of ICDISERs, i.e. #SPIs
// Number of SGIs (0-15) and PPIs (16-31) is fixed
uint32_t it_num_lines_tmp =
pl130_gic_ICDICTR_it_lines_num_extract(gic_config);
it_num_lines = 32*(it_num_lines_tmp + 1);
MSG("%d interrupt lines detected\n", it_num_lines);
cpu_number = pl130_gic_ICDICTR_cpu_number_extract(gic_config) + 1;
// set priority mask of cpu interface, currently set to lowest priority
// to accept all interrupts
pl130_gic_ICCPMR_wr(&gic, 0xff);
// set binary point to define split of group- and subpriority
// currently we allow for 8 subpriorities
pl130_gic_ICCBPR_wr(&gic, 0x2);
// enable interrupt forwarding to processor
pl130_gic_ICCICR_enable_wrf(&gic, 0x1);
// Distributor:
// enable interrupt forwarding from distributor to cpu interface
pl130_gic_ICDDCR_enable_wrf(&gic, 0x1);
MSG("gic_init done\n");
}
/*
* Initialize the global interrupt controller
*
* There are three types of interrupts
* 1) Software generated Interrupts (SGI) - IDs 0-15
* 2) Private Peripheral Interrupts (PPI) - IDs 16-31
* 3) Shared Peripheral Interrups (SPI) - IDs 32...
*/
void gic_init(void)
{
// this function is implemented in platform-specific code
gic_map_and_init(&gic);
// read GIC configuration
gic_config = pl130_gic_ICDICTR_rd(&gic);
// ARM GIC TRM, 3.1.2
// This is the number of ICDISERs, i.e. #SPIs
// Number of SIGs (0-15) and PPIs (16-31) is fixed
// XXX: Why (x+1)*32?
uint32_t it_num_lines_tmp = pl130_gic_ICDICTR_it_lines_num_extract(gic_config);
it_num_lines = 32*(it_num_lines_tmp + 1);
printf("GIC: %d interrupt lines detected\n", it_num_lines_tmp);
cpu_number = pl130_gic_ICDICTR_cpu_number_extract(gic_config);
sec_extn_implemented = pl130_gic_ICDICTR_TZ_extract(gic_config);
// set priority mask of cpu interface, currently set to lowest priority
// to accept all interrupts
pl130_gic_ICCPMR_wr(&gic, 0xff);
// set binary point to define split of group- and subpriority
// currently we allow for 8 subpriorities
pl130_gic_ICCBPR_wr(&gic, 0x2);
// enable interrupt forwarding to processor
pl130_gic_ICCICR_enable_wrf(&gic, 0x1);
// Distributor:
// enable interrupt forwarding from distributor to cpu interface
pl130_gic_ICDDCR_enable_wrf(&gic, 0x1);
printf("gic_init: done\n");
}
