/****************************************************************************** * This function implements a part of the critical interface between the psci * generic layer and the platform that allows the former to query the platform * to convert an MPIDR to a unique linear index. An error code (-1) is * returned in case the MPIDR is invalid. *****************************************************************************/ int plat_core_pos_by_mpidr(u_register_t mpidr) { if (arm_check_mpidr(mpidr) == 0) return plat_arm_calc_core_pos(mpidr); return -1; }
int plat_core_pos_by_mpidr(u_register_t mpidr) { if (mpidr & MPIDR_CLUSTER_MASK) return -1; if ((mpidr & MPIDR_CPU_MASK) >= PLATFORM_CORE_COUNT) return -1; return plat_arm_calc_core_pos(mpidr); }
/* * MPIDR hashing function for translating MPIDRs read from GICR_TYPER register * to core position. * * Calculating core position is dependent on MPIDR_EL1.MT bit. However, affinity * values read from GICR_TYPER don't have an MT field. To reuse the same * translation used for CPUs, we insert MT bit read from the PE's MPIDR into * that read from GICR_TYPER. * * Assumptions: * * - All CPUs implemented in the system have MPIDR_EL1.MT bit set; * - No CPUs implemented in the system use affinity level 3. */ static unsigned int arm_gicv3_mpidr_hash(u_register_t mpidr) { mpidr |= (read_mpidr_el1() & MPIDR_MT_MASK); return plat_arm_calc_core_pos(mpidr); }