static void thread_wakeup(void *arg)
{
platform_uart_driver_t* driver = arg;
while(1) {
if( mico_rtos_get_semaphore( driver->sem_wakeup, 1000) != kNoErr )
{
platform_gpio_irq_enable( driver->peripheral->pin_rx, IRQ_TRIGGER_FALLING_EDGE, RX_PIN_WAKEUP_handler, driver );
platform_mcu_powersave_enable( );
}
}
}
wwd_result_t host_enable_oob_interrupt( void )
{
/* Enable OOB interrupt */
platform_gpio_irq_enable( &wifi_sdio_pins[WWD_PIN_SDIO_OOB_IRQ], IOPORT_SENSE_RISING, sdio_oob_irq_handler, NULL);
if( wifi_sdio_pins[WWD_PIN_SDIO_OOB_IRQ].wakeup_pin_config != NULL )
{
platform_powersave_enable_wakeup_pin( wifi_sdio_pins[WWD_PIN_SDIO_OOB_IRQ].wakeup_pin_config );
}
return WICED_SUCCESS;
}
OSStatus MicoGpioEnableIRQ( mico_gpio_t gpio, mico_gpio_irq_trigger_t trigger, mico_gpio_irq_handler_t handler, void* arg )
{
if ( gpio >= MICO_GPIO_NONE )
return kUnsupportedErr;
return (OSStatus) platform_gpio_irq_enable( &platform_gpio_pins[gpio], trigger, handler, arg );
}
wwd_result_t host_platform_bus_enable_interrupt( void )
{
platform_gpio_irq_enable( &wifi_spi_pins[WWD_PIN_SPI_IRQ], IRQ_TRIGGER_RISING_EDGE, spi_irq_handler, 0 );
return WICED_SUCCESS;
}
OSStatus host_platform_bus_init( void )
{
SPI_InitTypeDef spi_init;
DMA_InitTypeDef dma_init_structure;
uint32_t a;
platform_mcu_powersave_disable();
mico_rtos_init_semaphore(&spi_transfer_finished_semaphore, 1);
/* Enable SPI_SLAVE DMA clock */
if ( wifi_spi.tx_dma.controller == DMA1 )
{
RCC->AHB1ENR |= RCC_AHB1Periph_DMA1;
}
else
{
RCC->AHB1ENR |= RCC_AHB1Periph_DMA2;
}
if ( wifi_spi.rx_dma.controller == DMA1 )
{
RCC->AHB1ENR |= RCC_AHB1Periph_DMA1;
}
else
{
RCC->AHB1ENR |= RCC_AHB1Periph_DMA2;
}
/* Enable SPI_SLAVE Periph clock */
(wifi_spi.peripheral_clock_func)( wifi_spi.peripheral_clock_reg, ENABLE );
/* Enable SYSCFG. Needed for selecting EXTI interrupt line */
RCC_APB2PeriphClockCmd( RCC_APB2Periph_SYSCFG, ENABLE );
/* Setup the interrupt input for WLAN_IRQ */
platform_gpio_init( &wifi_spi_pins[WIFI_PIN_SPI_IRQ], INPUT_HIGH_IMPEDANCE );
platform_gpio_irq_enable( &wifi_spi_pins[WIFI_PIN_SPI_IRQ], IRQ_TRIGGER_RISING_EDGE, spi_irq_handler, 0 );
/* Setup SPI slave select GPIOs */
platform_gpio_init( &wifi_spi_pins[WIFI_PIN_SPI_CS], OUTPUT_PUSH_PULL );
platform_gpio_output_high( &wifi_spi_pins[WIFI_PIN_SPI_CS] );
/* Setup the SPI lines */
for ( a = WIFI_PIN_SPI_CLK; a < WIFI_PIN_SPI_MAX; a++ )
{
platform_gpio_set_alternate_function( wifi_spi_pins[ a ].port, wifi_spi_pins[ a ].pin_number, GPIO_OType_PP, GPIO_PuPd_NOPULL, wifi_spi.gpio_af );
}
#if defined ( MICO_WIFI_USE_GPIO_FOR_BOOTSTRAP )
/* Set GPIO_B[1:0] to 01 to put WLAN module into gSPI mode */
platform_gpio_init( &wifi_control_pins[WIFI_PIN_BOOTSTRAP_0], OUTPUT_PUSH_PULL );
platform_gpio_output_high( &wifi_control_pins[WIFI_PIN_BOOTSTRAP_0] );
platform_gpio_init( &wifi_control_pins[WIFI_PIN_BOOTSTRAP_1], OUTPUT_PUSH_PULL );
platform_gpio_output_low( &wifi_control_pins[WIFI_PIN_BOOTSTRAP_1] );
#endif
/* Setup DMA for SPIX RX */
DMA_DeInit( wifi_spi.rx_dma.stream );
dma_init_structure.DMA_Channel = wifi_spi.rx_dma.channel;
dma_init_structure.DMA_PeripheralBaseAddr = (uint32_t) &(wifi_spi.port->DR);
dma_init_structure.DMA_Memory0BaseAddr = 0;
dma_init_structure.DMA_DIR = DMA_DIR_PeripheralToMemory;
dma_init_structure.DMA_BufferSize = 0;
dma_init_structure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
dma_init_structure.DMA_MemoryInc = DMA_MemoryInc_Enable;
dma_init_structure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte;
dma_init_structure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte;
dma_init_structure.DMA_Mode = DMA_Mode_Normal;
dma_init_structure.DMA_Priority = DMA_Priority_VeryHigh;
dma_init_structure.DMA_FIFOMode = DMA_FIFOMode_Disable;
dma_init_structure.DMA_FIFOThreshold = DMA_FIFOThreshold_Full;
dma_init_structure.DMA_MemoryBurst = DMA_MemoryBurst_Single;
dma_init_structure.DMA_PeripheralBurst = DMA_PeripheralBurst_Single;
DMA_Init( wifi_spi.rx_dma.stream, &dma_init_structure );
/* Setup DMA for SPIX TX */
DMA_DeInit( wifi_spi.tx_dma.stream );
dma_init_structure.DMA_Channel = wifi_spi.tx_dma.channel;
dma_init_structure.DMA_PeripheralBaseAddr = (uint32_t) &(wifi_spi.port->DR);
dma_init_structure.DMA_Memory0BaseAddr = 0;
dma_init_structure.DMA_DIR = DMA_DIR_MemoryToPeripheral;
dma_init_structure.DMA_BufferSize = 0;
dma_init_structure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
dma_init_structure.DMA_MemoryInc = DMA_MemoryInc_Enable;
dma_init_structure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte;
dma_init_structure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte;
dma_init_structure.DMA_Mode = DMA_Mode_Normal;
dma_init_structure.DMA_Priority = DMA_Priority_VeryHigh;
dma_init_structure.DMA_FIFOMode = DMA_FIFOMode_Disable;
dma_init_structure.DMA_FIFOThreshold = DMA_FIFOThreshold_Full;
dma_init_structure.DMA_MemoryBurst = DMA_MemoryBurst_Single;
dma_init_structure.DMA_PeripheralBurst = DMA_PeripheralBurst_Single;
DMA_Init( wifi_spi.tx_dma.stream, &dma_init_structure );
/* Must be lower priority than the value of configMAX_SYSCALL_INTERRUPT_PRIORITY */
/* otherwise FreeRTOS will not be able to mask the interrupt */
/* keep in mind that ARMCM3 interrupt priority logic is inverted, the highest value */
/* is the lowest priority */
NVIC_EnableIRQ( wifi_spi.rx_dma.irq_vector );
/* Enable DMA for TX */
SPI_I2S_DMACmd( wifi_spi.port, SPI_I2S_DMAReq_Tx | SPI_I2S_DMAReq_Rx, ENABLE );
/* Setup SPI */
spi_init.SPI_Direction = SPI_Direction_2Lines_FullDuplex;
spi_init.SPI_Mode = SPI_Mode_Master;
spi_init.SPI_DataSize = SPI_DataSize_8b;
spi_init.SPI_CPOL = SPI_CPOL_High;
spi_init.SPI_CPHA = SPI_CPHA_2Edge;
spi_init.SPI_NSS = SPI_NSS_Soft;
spi_init.SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_2;
spi_init.SPI_FirstBit = SPI_FirstBit_MSB;
spi_init.SPI_CRCPolynomial = (uint16_t) 7;
/* Init SPI and enable it */
SPI_Init( wifi_spi.port, &spi_init );
SPI_Cmd( wifi_spi.port, ENABLE );
platform_mcu_powersave_enable();
return kNoErr;
}
OSStatus host_platform_bus_init( void )
{
pdc_packet_t pdc_spi_packet;
Pdc* spi_pdc = spi_get_pdc_base( wifi_spi.port );
platform_mcu_powersave_disable( );
mico_rtos_init_semaphore( &spi_transfer_finished_semaphore, 1 );
/* Setup the SPI lines */
platform_gpio_peripheral_pin_init( wifi_spi.mosi_pin, ( wifi_spi.mosi_pin_mux_mode | IOPORT_MODE_PULLUP ) );
platform_gpio_peripheral_pin_init( wifi_spi.miso_pin, ( wifi_spi.miso_pin_mux_mode | IOPORT_MODE_PULLUP ) );
platform_gpio_peripheral_pin_init( wifi_spi.clock_pin, ( wifi_spi.clock_pin_mux_mode | IOPORT_MODE_PULLUP ) );
/* Setup the interrupt input for WLAN_IRQ */
platform_gpio_init( &wifi_spi_pins[WIFI_PIN_SPI_IRQ], INPUT_HIGH_IMPEDANCE );
platform_gpio_irq_enable( &wifi_spi_pins[WIFI_PIN_SPI_IRQ], IRQ_TRIGGER_RISING_EDGE, spi_irq_handler, 0 );
/* Setup SPI slave select GPIOs */
platform_gpio_init( &wifi_spi_pins[WIFI_PIN_SPI_CS], OUTPUT_PUSH_PULL );
platform_gpio_output_high( &wifi_spi_pins[WIFI_PIN_SPI_CS] );
#if defined ( MICO_WIFI_USE_GPIO_FOR_BOOTSTRAP )
/* Set GPIO_B[1:0] to 01 to put WLAN module into gSPI mode */
platform_gpio_init( &wifi_control_pins[WIFI_PIN_BOOTSTRAP_0], OUTPUT_PUSH_PULL );
platform_gpio_output_high( &wifi_control_pins[WIFI_PIN_BOOTSTRAP_0] );
platform_gpio_init( &wifi_control_pins[WIFI_PIN_BOOTSTRAP_1], OUTPUT_PUSH_PULL );
platform_gpio_output_low( &wifi_control_pins[WIFI_PIN_BOOTSTRAP_1] );
#endif
/* Enable the peripheral and set SPI mode. */
flexcom_enable( flexcom_base[ wifi_spi.spi_id ] );
flexcom_set_opmode( flexcom_base[ wifi_spi.spi_id ], FLEXCOM_SPI );
/* Init pdc, and clear RX TX. */
pdc_spi_packet.ul_addr = 0;
pdc_spi_packet.ul_size = 1;
pdc_tx_init( spi_pdc, &pdc_spi_packet, NULL );
pdc_rx_init( spi_pdc, &pdc_spi_packet, NULL );
spi_disable_interrupt(wifi_spi.port, 0xffffffff );
spi_disable( wifi_spi.port );
spi_reset( wifi_spi.port );
spi_set_lastxfer( wifi_spi.port );
spi_set_master_mode( wifi_spi.port );
spi_disable_mode_fault_detect( wifi_spi.port );
spi_set_clock_polarity( wifi_spi.port, 0, SPI_CLK_POLARITY );
spi_set_clock_phase( wifi_spi.port, 0, SPI_CLK_PHASE );
spi_set_bits_per_transfer( wifi_spi.port, 0, SPI_CSR_BITS_8_BIT );
spi_set_baudrate_div( wifi_spi.port, 0, (sysclk_get_cpu_hz() / SPI_BAUD_RATE) );
spi_set_transfer_delay( wifi_spi.port, 0, 0, 0 );
/* Must be lower priority than the value of configMAX_SYSCALL_INTERRUPT_PRIORITY */
/* otherwise FreeRTOS will not be able to mask the interrupt */
/* keep in mind that ARMCM4 interrupt priority logic is inverted, the highest value */
/* is the lowest priority */
/* Configure SPI interrupts . */
NVIC_EnableIRQ( platform_flexcom_irq_numbers[wifi_spi.spi_id] );
spi_enable(wifi_spi.port);
platform_mcu_powersave_enable( );
return kNoErr;
}
OSStatus host_platform_bus_init( void )
{
SDIO_InitTypeDef sdio_init_structure;
OSStatus result;
uint8_t a;
platform_mcu_powersave_disable();
result = mico_rtos_init_semaphore( &sdio_transfer_finished_semaphore, 1 );
if ( result != kNoErr )
{
return result;
}
/* Turn on SDIO IRQ */
SDIO->ICR = (uint32_t) 0xffffffff;
/* Must be lower priority than the value of configMAX_SYSCALL_INTERRUPT_PRIORITY */
/* otherwise FreeRTOS will not be able to mask the interrupt */
/* keep in mind that ARMCM3 interrupt priority logic is inverted, the highest value */
/* is the lowest priority */
NVIC_EnableIRQ( SDIO_IRQ_CHANNEL );
NVIC_EnableIRQ( DMA2_3_IRQ_CHANNEL );
/* Set GPIO_B[1:0] to 00 to put WLAN module into SDIO mode */
#if defined ( MICO_WIFI_USE_GPIO_FOR_BOOTSTRAP )
platform_gpio_init( &wifi_control_pins[WIFI_PIN_BOOTSTRAP_0], OUTPUT_PUSH_PULL );
platform_gpio_output_low( &wifi_control_pins[WIFI_PIN_BOOTSTRAP_0] );
platform_gpio_init( &wifi_control_pins[WIFI_PIN_BOOTSTRAP_1], OUTPUT_PUSH_PULL );
platform_gpio_output_low( &wifi_control_pins[WIFI_PIN_BOOTSTRAP_1] );
#endif
/* Setup GPIO pins for SDIO data & clock */
for ( a = WIFI_PIN_SDIO_CLK; a < WIFI_PIN_SDIO_MAX; a++ )
{
platform_gpio_set_alternate_function( wifi_sdio_pins[ a ].port, wifi_sdio_pins[ a ].pin_number, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_SDIO );
}
#ifdef SDIO_1_BIT
platform_gpio_init( &wifi_sdio_pins[WIFI_PIN_SDIO_IRQ], INPUT_PULL_UP );
platform_gpio_irq_enable( &wifi_sdio_pins[WIFI_PIN_SDIO_IRQ], IRQ_TRIGGER_FALLING_EDGE, sdio_int_pin_irq_handler, 0 );
#endif
/*!< Enable the SDIO AHB Clock and the DMA2 Clock */
RCC_AHB1PeriphClockCmd( RCC_AHB1Periph_DMA2, ENABLE );
RCC_APB2PeriphClockCmd( RCC_APB2Periph_SDIO, ENABLE );
SDIO_DeInit( );
sdio_init_structure.SDIO_ClockDiv = (uint8_t) 120; /* 0x78, clock is taken from the high speed APB bus ; */ /* About 400KHz */
sdio_init_structure.SDIO_ClockEdge = SDIO_ClockEdge_Rising;
sdio_init_structure.SDIO_ClockBypass = SDIO_ClockBypass_Disable;
sdio_init_structure.SDIO_ClockPowerSave = SDIO_ClockPowerSave_Enable;
sdio_init_structure.SDIO_BusWide = SDIO_BusWide_1b;
sdio_init_structure.SDIO_HardwareFlowControl = SDIO_HardwareFlowControl_Disable;
SDIO_Init( &sdio_init_structure );
SDIO_SetPowerState( SDIO_PowerState_ON );
SDIO_SetSDIOReadWaitMode( SDIO_ReadWaitMode_CLK );
SDIO_ClockCmd( ENABLE );
platform_mcu_powersave_enable();
return kNoErr;
}
OSStatus host_enable_oob_interrupt( void )
{
platform_gpio_init( &wifi_sdio_pins[WIFI_PIN_SDIO_OOB_IRQ], INPUT_HIGH_IMPEDANCE );
platform_gpio_irq_enable( &wifi_sdio_pins[WIFI_PIN_SDIO_OOB_IRQ], IRQ_TRIGGER_RISING_EDGE, sdio_oob_irq_handler, 0 );
return kNoErr;
}
