OSStatus platform_uart_receive_bytes( platform_uart_driver_t* driver, uint8_t* data_in, uint32_t expected_data_size, uint32_t timeout_ms )
{
OSStatus err = kNoErr;
platform_mcu_powersave_disable();
require_action_quiet( ( driver != NULL ) && ( data_in != NULL ) && ( expected_data_size != 0 ), exit, err = kParamErr);
require_action_quiet( driver->rx_ring_buffer != NULL , exit, err = kUnsupportedErr);
while ( expected_data_size != 0 )
{
uint32_t transfer_size = MIN(driver->rx_ring_buffer->size / 2, expected_data_size);
/* Check if ring buffer already contains the required amount of data. */
if ( transfer_size > ring_buffer_used_space( driver->rx_ring_buffer ) )
{
/* Set rx_size and wait in rx_complete semaphore until data reaches rx_size or timeout occurs */
driver->rx_size = transfer_size;
if ( mico_rtos_get_semaphore( &driver->rx_complete, timeout_ms ) != kNoErr )
{
driver->rx_size = 0;
err = kTimeoutErr;
goto exit;
}
/* Reset rx_size to prevent semaphore being set while nothing waits for the data */
driver->rx_size = 0;
}
expected_data_size -= transfer_size;
// Grab data from the buffer
do
{
uint8_t* available_data;
uint32_t bytes_available;
ring_buffer_get_data( driver->rx_ring_buffer, &available_data, &bytes_available );
bytes_available = MIN( bytes_available, transfer_size );
memcpy( data_in, available_data, bytes_available );
transfer_size -= bytes_available;
data_in = ( (uint8_t*)data_in + bytes_available );
ring_buffer_consume( driver->rx_ring_buffer, bytes_available );
}
while ( transfer_size != 0 );
}
require_action( expected_data_size == 0, exit, err = kReadErr);
exit:
platform_mcu_powersave_enable();
return err;
}
static OSStatus internalFlashInitialize( void )
{
platform_log_trace();
OSStatus err = kNoErr;
platform_mcu_powersave_disable();
require_action( flash_init(FLASH_ACCESS_MODE_128, 6) == FLASH_RC_OK, exit, err = kGeneralErr );
exit:
platform_mcu_powersave_enable();
return err;
}
platform_result_t platform_gpio_output_low( const platform_gpio_t* gpio )
{
wiced_assert( "bad argument", ( gpio != NULL ) );
platform_mcu_powersave_disable();
gpio->port->BSRRH = (uint16_t) ( 1 << gpio->pin_number );
platform_mcu_powersave_enable();
return PLATFORM_SUCCESS;
}
static void thread_wakeup(void *arg)
{
platform_uart_driver_t* driver = arg;
while(1) {
if( mico_rtos_get_semaphore( driver->sem_wakeup, 1000) != kNoErr )
{
platform_gpio_irq_enable( driver->peripheral->pin_rx, IRQ_TRIGGER_FALLING_EDGE, RX_PIN_WAKEUP_handler, driver );
platform_mcu_powersave_enable( );
}
}
}
OSStatus platform_gpio_output_trigger( const platform_gpio_t* gpio )
{
OSStatus err = kNoErr;
require_action_quiet( gpio != NULL, exit, err = kParamErr);
platform_mcu_powersave_disable();
ioport_toggle_pin_level( gpio->pin );
exit:
platform_mcu_powersave_enable();
return err;
}
OSStatus platform_gpio_output_low( const platform_gpio_t* gpio )
{
OSStatus err = kNoErr;
require_action_quiet( gpio != NULL, exit, err = kParamErr);
platform_mcu_powersave_disable();
ioport_set_pin_level( gpio->pin, IOPORT_PIN_LEVEL_LOW );
exit:
platform_mcu_powersave_enable();
return err;
}
OSStatus platform_gpio_deinit( const platform_gpio_t* gpio )
{
OSStatus err = kNoErr;
platform_mcu_powersave_disable();
require_action_quiet( gpio != NULL, exit, err = kParamErr);
ioport_disable_pin( gpio->pin );
exit:
platform_mcu_powersave_enable();
return err;
}
OSStatus host_platform_bus_deinit( void )
{
platform_mcu_powersave_disable();
#ifdef USE_OWN_SPI_DRV
pdc_disable_transfer(spi_m_pdc, PERIPH_PTCR_RXTDIS | PERIPH_PTCR_TXTDIS);
spi_disable(SPI_MASTER_BASE);
#else
spi_master_vec_disable(&spi_master);
#endif
platform_mcu_powersave_enable();
return kNoErr;
}
wiced_bool_t platform_gpio_input_get( const platform_gpio_t* gpio )
{
wiced_bool_t result;
wiced_assert( "bad argument", ( gpio != NULL ) );
platform_mcu_powersave_disable();
result = ( ( gpio->port->IDR & (uint32_t) ( 1 << gpio->pin_number ) ) != 0 ) ? WICED_TRUE : WICED_FALSE;
platform_mcu_powersave_enable();
return result;
}
bool platform_gpio_input_get( const platform_gpio_t* gpio )
{
bool result = false;
platform_mcu_powersave_disable();
require_quiet( gpio != NULL, exit);
result = ( ( gpio->port->IDR & (uint32_t) ( 1 << gpio->pin_number ) ) != 0 ) ? true : false;
exit:
platform_mcu_powersave_enable();
return result;
}
bool platform_gpio_input_get( const platform_gpio_t* gpio )
{
bool result = false;
platform_mcu_powersave_disable();
require_quiet( gpio != NULL, exit);
result = ( ioport_get_pin_level( gpio->pin ) == false ) ? false : true;
exit:
platform_mcu_powersave_enable();
return result;
}
OSStatus platform_uart_transmit_bytes( platform_uart_driver_t* driver, const uint8_t* data_out, uint32_t size )
{
OSStatus err = kNoErr;
platform_mcu_powersave_disable();
#ifndef NO_MICO_RTOS
mico_rtos_lock_mutex( &driver->tx_mutex );
#endif
require_action_quiet( ( driver != NULL ) && ( data_out != NULL ) && ( size != 0 ), exit, err = kParamErr);
/* Clear interrupt status before enabling DMA otherwise error occurs immediately */
clear_dma_interrupts( driver->peripheral->tx_dma_config.stream, driver->peripheral->tx_dma_config.complete_flags | driver->peripheral->tx_dma_config.error_flags );
/* Init DMA parameters and variables */
driver->last_transmit_result = kGeneralErr;
driver->tx_size = size;
driver->peripheral->tx_dma_config.stream->CR &= ~(uint32_t) DMA_SxCR_CIRC;
driver->peripheral->tx_dma_config.stream->NDTR = size;
driver->peripheral->tx_dma_config.stream->M0AR = (uint32_t)data_out;
USART_DMACmd( driver->peripheral->port, USART_DMAReq_Tx, ENABLE );
USART_ClearFlag( driver->peripheral->port, USART_FLAG_TC );
driver->peripheral->tx_dma_config.stream->CR |= DMA_SxCR_EN;
/* Wait for transmission complete */
#ifndef NO_MICO_RTOS
mico_rtos_get_semaphore( &driver->tx_complete, MICO_NEVER_TIMEOUT );
#else
while( driver->tx_complete == false );
driver->tx_complete = false;
#endif
while ( ( driver->peripheral->port->SR & USART_SR_TC ) == 0 )
{
}
/* Disable DMA and clean up */
USART_DMACmd( driver->peripheral->port, USART_DMAReq_Tx, DISABLE );
driver->tx_size = 0;
err = driver->last_transmit_result;
exit:
#ifndef NO_MICO_RTOS
mico_rtos_unlock_mutex( &driver->tx_mutex );
#endif
platform_mcu_powersave_enable();
return err;
}
OSStatus platform_gpio_output_trigger( const platform_gpio_t* gpio )
{
OSStatus err = kNoErr;
platform_mcu_powersave_disable();
require_action_quiet( gpio != NULL, exit, err = kParamErr);
gpio->port->ODR ^= (uint16_t) ( 1 << gpio->pin_number );
exit:
platform_mcu_powersave_enable();
return err;
}
OSStatus platform_gpio_output_low( const platform_gpio_t* gpio )
{
OSStatus err = kNoErr;
require_action_quiet( gpio != NULL, exit, err = kParamErr);
platform_mcu_powersave_disable();
GpioClrRegOneBit(GPIO_A_OUT + gpio->port , ((uint32_t)1 << gpio->pin) );
exit:
platform_mcu_powersave_enable();
return err;
}
OSStatus platform_pwm_stop( const platform_pwm_t* pwm )
{
OSStatus err = kNoErr;
platform_mcu_powersave_disable();
require_action_quiet( pwm != NULL, exit, err = kParamErr);
TIM_CtrlPWMOutputs( pwm->tim, DISABLE );
TIM_Cmd( pwm->tim, DISABLE );
exit:
platform_mcu_powersave_enable();
return err;
}
OSStatus platform_gpio_peripheral_pin_init( const platform_gpio_t* gpio, ioport_mode_t pin_mode )
{
OSStatus err = kNoErr;
platform_mcu_powersave_disable( );
require_action_quiet( gpio != NULL, exit, err = kParamErr);
/* Set pin mode and disable GPIO peripheral */
ioport_set_pin_mode( gpio->pin, pin_mode );
ioport_disable_pin( gpio->pin );
exit:
platform_mcu_powersave_enable();
return err;
}
OSStatus platform_adc_deinit( const platform_adc_t* adc )
{
OSStatus err = kNoErr;
platform_mcu_powersave_disable();
require_action_quiet( adc != NULL, exit, err = kParamErr);
adc_disable();
initialized = false;
exit:
platform_mcu_powersave_enable();
return err;
}
OSStatus host_platform_spi_transfer( bus_transfer_direction_t dir, uint8_t* buffer, uint16_t buffer_length )
{
OSStatus result;
uint32_t junk;
platform_mcu_powersave_disable();
wifi_spi.tx_dma.stream->NDTR = buffer_length;
wifi_spi.tx_dma.stream->M0AR = (uint32_t) buffer;
if ( dir == BUS_READ )
{
wifi_spi.rx_dma.stream->NDTR = buffer_length;
wifi_spi.rx_dma.stream->M0AR = (uint32_t) buffer;
wifi_spi.rx_dma.stream->CR |= DMA_MemoryInc_Enable | ( 1 << 4);
}
else
{
wifi_spi.rx_dma.stream->NDTR = buffer_length;
wifi_spi.rx_dma.stream->M0AR = (uint32_t) &junk;
wifi_spi.rx_dma.stream->CR &= ( ~DMA_MemoryInc_Enable ) | ( 1 << 4);
}
platform_gpio_output_low( &wifi_spi_pins[WIFI_PIN_SPI_CS] );
DMA_Cmd( wifi_spi.rx_dma.stream, ENABLE );
DMA_Cmd( wifi_spi.tx_dma.stream, ENABLE );
/* Wait for DMA TX to complete */
result = mico_rtos_get_semaphore( &spi_transfer_finished_semaphore, 100 );
// loop_count = 0;
// while ( ( DMA_GetFlagStatus( SPIX_DMA_RX_STREAM, DMA_FLAG_TCIF3 ) == RESET ) && ( loop_count < (uint32_t) DMA_TIMEOUT_LOOPS ) )
// {
// loop_count++;
// }
DMA_Cmd( wifi_spi.rx_dma.stream, DISABLE );
DMA_Cmd( wifi_spi.tx_dma.stream, DISABLE );
/* Clear the CS pin and the DMA status flag */
platform_gpio_output_high( &wifi_spi_pins[WIFI_PIN_SPI_CS] ); /* CS high (to deselect) */
clear_dma_interrupts( wifi_spi.rx_dma.stream, wifi_spi.rx_dma.complete_flags );
clear_dma_interrupts( wifi_spi.tx_dma.stream, wifi_spi.tx_dma.complete_flags );
platform_mcu_powersave_enable();
return result;
}
OSStatus platform_uart_deinit( platform_uart_driver_t* driver )
{
OSStatus err = kNoErr;
platform_mcu_powersave_disable();
require_action_quiet( ( driver != NULL ), exit, err = kParamErr);
usart_disable_interrupt( driver->peripheral->port, 0xffffffff );
NVIC_DisableIRQ( platform_flexcom_irq_numbers[driver->peripheral->uart_id] );
pdc_disable_transfer( usart_get_pdc_base( driver->peripheral->port ), PERIPH_PTCR_TXTDIS | PERIPH_PTCR_RXTDIS );
usart_disable_tx( driver->peripheral->port );
usart_disable_rx( driver->peripheral->port );
if( pmc_is_periph_clk_enabled( driver->peripheral->peripheral_id ) == 1 ) {
flexcom_disable( driver->peripheral->flexcom_base );
}
platform_gpio_deinit( driver->peripheral->tx_pin );
platform_gpio_deinit( driver->peripheral->rx_pin );
if ( driver->peripheral->cts_pin != NULL )
{
platform_gpio_deinit( driver->peripheral->cts_pin );
}
if ( driver->peripheral->rts_pin != NULL )
{
platform_gpio_deinit( driver->peripheral->rts_pin );
}
#ifndef NO_MICO_RTOS
mico_rtos_deinit_semaphore(&driver->rx_complete);
mico_rtos_deinit_semaphore(&driver->tx_complete);
#endif
driver->peripheral = NULL;
memset( driver, 0, sizeof(platform_uart_driver_t) );
exit:
platform_mcu_powersave_enable();
return err;
}
OSStatus platform_gpio_irq_disable( const platform_gpio_t* gpio )
{
uint8_t intPort;
int i;
OSStatus err = kNoErr;
platform_mcu_powersave_disable();
require_action_quiet( gpio != NULL, exit, err = kParamErr);
switch( gpio->port ){
case GPIOA:
intPort = GPIO_A_INT;
break;
case GPIOB:
intPort = GPIO_B_INT;
break;
case GPIOC:
intPort = GPIO_C_INT;
break;
default:
err = kParamErr;
goto exit;
}
GpioIntDis( intPort, ((uint32_t)1 << gpio->pin) );
for( i = 0; i < NUMBER_OF_GPIO_IRQ_LINES; i++ ){
if ( gpio_irq_data[i].port == gpio->port && gpio_irq_data[i].pin == gpio->pin){
gpio_irq_data[ i ].port = 0;
gpio_irq_data[ i ].pin = 0;
gpio_irq_data[ i ].handler = NULL;
gpio_irq_data[ i ].arg = NULL;
break;
}
}
if( i == NUMBER_OF_GPIO_IRQ_LINES){
err = kNotFoundErr;
goto exit;
}
exit:
platform_mcu_powersave_enable();
return err;
}
OSStatus platform_gpio_output_trigger( const platform_gpio_t* gpio )
{
OSStatus err = kNoErr;
uint32_t regValue;
uint32_t mask = (uint32_t)1 << gpio->pin;
platform_mcu_powersave_disable();
require_action_quiet( gpio != NULL, exit, err = kParamErr);
regValue = GpioGetReg( GPIO_A_OUT + gpio->port );
(regValue&mask)? platform_gpio_output_low( gpio ) : platform_gpio_output_high( gpio );
exit:
platform_mcu_powersave_enable();
return err;
}
bool platform_gpio_input_get( const platform_gpio_t* gpio )
{
bool result = false;
uint32_t regValue;
uint32_t mask = (uint32_t)1 << gpio->pin;
platform_mcu_powersave_disable();
require_quiet( gpio != NULL, exit);
regValue = GpioGetReg( GPIO_A_IN + gpio->port );
result = ((regValue&mask) == 0 )? false : true;
exit:
platform_mcu_powersave_enable();
return result;
}
OSStatus platform_gpio_deinit( const platform_gpio_t* gpio )
{
GPIO_InitTypeDef gpio_init_structure;
OSStatus err = kNoErr;
platform_mcu_powersave_disable();
require_action_quiet( gpio != NULL, exit, err = kParamErr);
/* Set to Input high-impedance */
gpio_init_structure.GPIO_Speed = GPIO_Speed_50MHz;
gpio_init_structure.GPIO_Mode = GPIO_Mode_IN;
gpio_init_structure.GPIO_OType = GPIO_OType_PP; /* arbitrary. not applicable */
gpio_init_structure.GPIO_PuPd = GPIO_PuPd_NOPULL;
gpio_init_structure.GPIO_Pin = (uint32_t) ( 1 << gpio->pin_number );
GPIO_Init( gpio->port, &gpio_init_structure );
exit:
platform_mcu_powersave_enable();
return err;
}
OSStatus internalFlashWrite(volatile uint32_t* flash_address, uint32_t* data ,uint32_t data_length)
{
platform_log_trace();
OSStatus err = kNoErr;
uint32_t start_address = * flash_address;
platform_mcu_powersave_disable();
//mem_flash_op_enter();
require_action( flash_unlock( start_address, start_address + data_length - 1, NULL, NULL ) == FLASH_RC_OK, exit, err = kGeneralErr );
require_action( flash_write((*flash_address), data, data_length, false) == FLASH_RC_OK, exit, err = kGeneralErr );
*flash_address += data_length;
require_action( flash_lock( start_address, start_address + data_length - 1, NULL, NULL ) == FLASH_RC_OK, exit, err = kGeneralErr );
//mem_flash_op_exit();
exit:
platform_mcu_powersave_enable();
return err;
}
platform_result_t platform_gpio_deinit( const platform_gpio_t* gpio )
{
GPIO_InitTypeDef gpio_init_structure;
wiced_assert( "bad argument", ( gpio != NULL ) );
platform_mcu_powersave_disable();
/* Set to Input high-impedance */
gpio_init_structure.GPIO_Speed = GPIO_Speed_50MHz;
gpio_init_structure.GPIO_Mode = GPIO_Mode_IN;
gpio_init_structure.GPIO_OType = GPIO_OType_PP; /* arbitrary. not applicable */
gpio_init_structure.GPIO_PuPd = GPIO_PuPd_NOPULL;
gpio_init_structure.GPIO_Pin = (uint32_t) ( 1 << gpio->pin_number );
GPIO_Init( gpio->port, &gpio_init_structure );
platform_mcu_powersave_enable();
return PLATFORM_SUCCESS;
}
OSStatus platform_gpio_init( const platform_gpio_t* gpio, platform_pin_config_t config )
{
OSStatus err = kNoErr;
platform_mcu_powersave_disable();
require_action_quiet( gpio != NULL, exit, err = kParamErr);
GpioClrRegOneBit(GPIO_A_OUTDS + gpio->port , ((uint32_t)1 << gpio->pin) );
if ( (config == INPUT_PULL_UP ) || (config == INPUT_HIGH_IMPEDANCE ) || (config == INPUT_PULL_DOWN )){
GpioClrRegOneBit(GPIO_A_OE + gpio->port , ((uint32_t)1 << gpio->pin) );
GpioSetRegOneBit(GPIO_A_IE + gpio->port , ((uint32_t)1 << gpio->pin) );
}else{
GpioClrRegOneBit(GPIO_A_IE + gpio->port , ((uint32_t)1 << gpio->pin) );
GpioSetRegOneBit(GPIO_A_OE + gpio->port , ((uint32_t)1 << gpio->pin) );
}
if ( (config == INPUT_PULL_UP ) || (config == OUTPUT_OPEN_DRAIN_PULL_UP ) )
{
GpioClrRegOneBit(GPIO_A_PU + gpio->port , ((uint32_t)1 << gpio->pin) );
GpioClrRegOneBit(GPIO_A_PD + gpio->port , ((uint32_t)1 << gpio->pin) );
}
else if (config == INPUT_PULL_DOWN )
{
GpioSetRegOneBit(GPIO_A_PU + gpio->port , ((uint32_t)1 << gpio->pin) );
GpioSetRegOneBit(GPIO_A_PD + gpio->port , ((uint32_t)1 << gpio->pin) );
}
else
{
GpioSetRegOneBit(GPIO_A_PU + gpio->port , ((uint32_t)1 << gpio->pin) );
GpioClrRegOneBit(GPIO_A_PD + gpio->port , ((uint32_t)1 << gpio->pin) );
}
if(config == OUTPUT_PUSH_PULL)
GpioSetRegOneBit(GPIO_A_OUTDS + gpio->port , ((uint32_t)1 << gpio->pin) );
exit:
platform_mcu_powersave_enable();
return err;
}
platform_result_t platform_spi_init( const platform_spi_t* spi, const platform_spi_config_t* config )
{
UNUSED_PARAMETER(spi);
UNUSED_PARAMETER(config);
platform_mcu_powersave_disable( );
Pdc* spi_pdc = spi_get_pdc_base( spi->peripheral );
/* Setup chip select pin */
platform_gpio_init( config->chip_select, OUTPUT_PUSH_PULL );
platform_gpio_output_high( config->chip_select );
/* Setup other pins */
platform_gpio_peripheral_pin_init( spi->mosi_pin, ( IOPORT_MODE_MUX_A | IOPORT_MODE_PULLUP ) );
platform_gpio_peripheral_pin_init( spi->miso_pin, ( IOPORT_MODE_MUX_A | IOPORT_MODE_PULLUP ) );
platform_gpio_peripheral_pin_init( spi->clk_pin, ( IOPORT_MODE_MUX_A | IOPORT_MODE_PULLUP ) );
/* Configure an SPI peripheral. */
pmc_enable_periph_clk( spi->peripheral_id );
spi_disable( spi->peripheral );
spi_reset( spi->peripheral );
spi_set_lastxfer( spi->peripheral );
spi_set_master_mode( spi->peripheral );
spi_disable_mode_fault_detect( spi->peripheral );
spi_set_peripheral_chip_select_value( spi->peripheral, 0 );
spi_set_clock_polarity( spi->peripheral, 0, ( ( config->mode && SPI_CLOCK_IDLE_HIGH ) ? (1) : (0) ) );
spi_set_clock_phase( spi->peripheral, 0, ( ( config->mode && SPI_CLOCK_RISING_EDGE ) ? (1) : (0) ) );
spi_set_bits_per_transfer( spi->peripheral, 0, SPI_CSR_BITS_8_BIT );
spi_set_baudrate_div( spi->peripheral, 0, (uint8_t)( CPU_CLOCK_HZ / config->speed ) );
spi_set_transfer_delay( spi->peripheral, 0, 0, 0 );
spi_enable( spi->peripheral );
pdc_disable_transfer( spi_pdc, PERIPH_PTCR_RXTDIS | PERIPH_PTCR_TXTDIS );
platform_mcu_powersave_enable( );
return PLATFORM_SUCCESS;
}
platform_result_t platform_gpio_init( const platform_gpio_t* gpio, platform_pin_config_t config )
{
GPIO_InitTypeDef gpio_init_structure;
uint8_t port_number;
wiced_assert( "bad argument", ( gpio != NULL ) );
platform_mcu_powersave_disable();
port_number = platform_gpio_get_port_number( gpio->port );
/* Enable peripheral clock for this port */
RCC->AHB1ENR |= gpio_peripheral_clocks[port_number];
gpio_init_structure.GPIO_Speed = GPIO_Speed_50MHz;
gpio_init_structure.GPIO_Mode = ( ( config == INPUT_PULL_UP ) || ( config == INPUT_PULL_DOWN ) || ( config == INPUT_HIGH_IMPEDANCE ) ) ? GPIO_Mode_IN : GPIO_Mode_OUT;
gpio_init_structure.GPIO_OType = ( config == OUTPUT_PUSH_PULL ) ? GPIO_OType_PP : GPIO_OType_OD;
if ( ( config == INPUT_PULL_UP ) || ( config == OUTPUT_OPEN_DRAIN_PULL_UP ) )
{
gpio_init_structure.GPIO_PuPd = GPIO_PuPd_UP;
}
else if ( config == INPUT_PULL_DOWN )
{
gpio_init_structure.GPIO_PuPd = GPIO_PuPd_DOWN;
}
else
{
gpio_init_structure.GPIO_PuPd = GPIO_PuPd_NOPULL;
}
gpio_init_structure.GPIO_Pin = (uint32_t) ( 1 << gpio->pin_number );
GPIO_Init( gpio->port, &gpio_init_structure );
platform_mcu_powersave_enable();
return PLATFORM_SUCCESS;
}
OSStatus host_platform_bus_deinit( void )
{
OSStatus result;
uint32_t a;
result = mico_rtos_deinit_semaphore( &sdio_transfer_finished_semaphore );
platform_mcu_powersave_disable();
/* Disable SPI and SPI DMA */
sdio_disable_bus_irq( );
SDIO_ClockCmd( DISABLE );
SDIO_SetPowerState( SDIO_PowerState_OFF );
SDIO_DeInit( );
RCC_APB2PeriphClockCmd( RCC_APB2Periph_SDIO, DISABLE );
#ifdef SDIO_1_BIT
platform_gpio_deinit( &wifi_sdio_pins[WIFI_PIN_SDIO_IRQ] );
platform_gpio_irq_disable( &wifi_sdio_pins[WIFI_PIN_SDIO_IRQ] );
#endif
for ( a = 0; a < WIFI_PIN_SDIO_MAX; a++ )
{
platform_gpio_deinit( &wifi_sdio_pins[ a ] );
}
#if defined ( MICO_WIFI_USE_GPIO_FOR_BOOTSTRAP )
platform_gpio_deinit( &wifi_control_pins[WIFI_PIN_BOOTSTRAP_0] );
platform_gpio_deinit( &wifi_control_pins[WIFI_PIN_BOOTSTRAP_1] );
#endif
/* Turn off SDIO IRQ */
NVIC_DisableIRQ( SDIO_IRQ_CHANNEL );
NVIC_DisableIRQ( DMA2_3_IRQ_CHANNEL );
platform_mcu_powersave_enable();
return result;
}
OSStatus host_platform_bus_deinit( void )
{
uint32_t a;
platform_mcu_powersave_disable();
/* Disable SPI and SPI DMA */
SPI_Cmd( wifi_spi.port, DISABLE );
SPI_I2S_DeInit( wifi_spi.port );
SPI_I2S_DMACmd( wifi_spi.port, SPI_I2S_DMAReq_Tx | SPI_I2S_DMAReq_Rx, DISABLE );
DMA_DeInit( wifi_spi.tx_dma.stream );
DMA_DeInit( wifi_spi.rx_dma.stream );
#if defined ( MICO_WIFI_USE_GPIO_FOR_BOOTSTRAP )
/* Clear GPIO_B[1:0] */
platform_gpio_init( &wifi_control_pins[WIFI_PIN_BOOTSTRAP_0], INPUT_HIGH_IMPEDANCE );
platform_gpio_init( &wifi_control_pins[WIFI_PIN_BOOTSTRAP_1], INPUT_HIGH_IMPEDANCE );
#endif
/* Clear SPI slave select GPIOs */
platform_gpio_init( &wifi_spi_pins[WIFI_PIN_SPI_CS], INPUT_HIGH_IMPEDANCE );
/* Clear the SPI lines */
for ( a = WIFI_PIN_SPI_CLK; a < WIFI_PIN_SPI_MAX; a++ )
{
platform_gpio_init( &wifi_spi_pins[ a ], INPUT_HIGH_IMPEDANCE );
}
platform_gpio_irq_disable( &wifi_spi_pins[WIFI_PIN_SPI_IRQ] );
platform_gpio_init( &wifi_spi_pins[WIFI_PIN_SPI_IRQ], INPUT_HIGH_IMPEDANCE );
/* Disable SPI_SLAVE Periph clock and DMA1 clock */
(wifi_spi.peripheral_clock_func)( wifi_spi.peripheral_clock_reg, DISABLE );
RCC_APB2PeriphClockCmd( RCC_APB2Periph_SYSCFG, DISABLE );
platform_mcu_powersave_enable();
return kNoErr;
}
