OT_INTERRUPT void palfi_tim_isr(void) {
/// When the pulse counter passes the 1st interval, log the pulse width.
/// When the pulse counter passes the 2nd interval, log the pulse width and
/// terminate the pulse measuring subprocess.
if (palfi.trim.count == palfi.trim.startcount) {
palfi.trim.startval = PALFI_TIM->CCR0;
}
palfi.trim.count++;
if (palfi.trim.count == palfi.trim.endcount) {
palfi.trim.endval = PALFI_TIM->CCR0;
PALFI_TIM->CCTL0 &= ~CCIE;
sys.evt.EXT.nextevent = 0;
platform_ot_preempt();
}
LPM4_EXIT;
}
OT_INTERRUPT void palfi_port_isr(void) {
/// Disable and clear the LF wakeup interrupt bit. It will need to be
/// re-enabled after the application runs, but with it off it will not get in
/// the way of non-blocking process.
// disable & clear P1.0 interrupt
PALFI_WAKE_PORT->IE &= ~PALFI_WAKE_PIN;
PALFI_WAKE_PORT->IFG &= ~PALFI_WAKE_PIN;
// if the SW2 is being held, then trimming will occur. If not, then the
// normal routine will occur. Both require an initial 15ms wait slot.
sys.evt.EXT.nextevent = 15;
sys.evt.EXT.event_no = \
((BOARD_SW2_PORT->DIN & BOARD_SW2_PIN) == 0) + 1;
// Pre-empt the kernel, which will clock events and attach the 15ms slot
platform_ot_preempt();
LPM4_EXIT;
}
void otapi_preempt() { platform_ot_preempt(); }
