コード例 #1
0
ファイル: system.c プロジェクト: Wangwenxue/Firefly-BLE
/**
 ****************************************************************************************
 * @brief  Setup the microcontroller system.
 *
 *  Initialize the system clock and pins.
 *****************************************************************************************
 */
void SystemInit(void)
{
    /*
     **************************
     * Sub module clock setting
     **************************
     */
    // DC-DC
    dc_dc_enable(true);

    // QN platform initialization
    plf_init(NORMAL_MODE, __XTAL, QN_32K_RCO, NULL, 0);
    

    // Disable all peripheral clock, will be enabled in the driver initilization.
    timer_clock_off(QN_TIMER0);
    timer_clock_off(QN_TIMER1);
    timer_clock_off(QN_TIMER2);
    timer_clock_off(QN_TIMER3);
    uart_clock_off(QN_UART0);
    uart_clock_off(QN_UART1);
    spi_clock_off(QN_SPI0);
    usart_reset((uint32_t) QN_SPI1);
    spi_clock_off(QN_SPI1);
    flash_clock_off();
    gpio_clock_off();
    adc_clock_off();
    dma_clock_off();
    pwm_clock_off();
    
    // calibration will change system clock setting
    // Configure sytem clock.  
    syscon_set_sysclk_src(CLK_XTAL, __XTAL);
    syscon_set_ahb_clk(__AHB_CLK);
    syscon_set_apb_clk(__APB_CLK);
    syscon_set_ble_clk(__BLE_CLK);
    syscon_set_timer_clk(__TIMER_CLK);
    syscon_set_usart_clk((uint32_t)QN_UART0, __USART_CLK);
    syscon_set_usart_clk((uint32_t)QN_UART1, __USART_CLK);  
    

    /*
     **************************
     * IO configuration
     **************************
     */

    SystemIOCfg();

    /*
     **************************
     * Peripheral setting
     **************************
     */

}
コード例 #2
0
ファイル: ae210p.c プロジェクト: aozima/rt-thread
/*
 * All AE210P hardware initialization
 */
void hardware_init(void)
{
	mmu_init();                     /* mmu/cache */
	plf_init();                     /* Perform any platform specific initializations */

#if (defined(CONFIG_CPU_ICACHE_ENABLE) || defined(CONFIG_CPU_DCACHE_ENABLE))
	unsigned int reg;

	/* Invalid ICache */
	nds32_icache_flush();

	/* Invalid DCache */
	nds32_dcache_invalidate();

	/* Enable I/Dcache */
	reg = (__nds32__mfsr(NDS32_SR_CACHE_CTL) & ~CACHE_CTL_MSK) | CACHE_CTL_CACHE_ON;
	__nds32__mtsr(reg, NDS32_SR_CACHE_CTL);
#endif
}
コード例 #3
0
ファイル: app_main.c プロジェクト: haby77/Bruntest_FireBLE
/**
 ****************************************************************************************
 * @brief BLE main function.
 *
 * This function is called right after the booting process has completed.
 ****************************************************************************************
 */
int main(void)
{
    int ble_sleep_st, usr_sleep_st;

    // DC-DC
    dc_dc_enable(QN_DC_DC_ENABLE);

    // QN platform initialization
#if QN_NVDS_WRITE
    plf_init(QN_POWER_MODE, __XTAL, QN_32K_RCO, nvds_tmp_buf, NVDS_TMP_BUF_SIZE);
#else
    plf_init(QN_POWER_MODE, __XTAL, QN_32K_RCO, NULL, 0);
#endif

#if (defined(QN_9020_B1) && (!QN_PMU_VOLTAGE))
    disable_patch_b1();
#endif

    // System initialization, user configuration
    SystemInit();

    // Profiles register
#if (QN_WORK_MODE != WORK_MODE_HCI)
    prf_register();
#endif

    // BLE stack initialization
    // Notes:
    // 1. When the chip works on Network Processor Mode, UART flow control signal is used to implement sleep mode.
    // UART 's flow control feature shall be enabled. Enable this feature in the uart.c file.
    // 2. Controller mode does not support sleep mode.
    // 3. So far client example project does not support sleep mode. It will be implemented later.

    // Check to go normal work mode or test mode.
    // If the input of test control pin is low level, the program will enter into test mode, otherwise the program will
    // enter into work mode which is defined in the user configuration file.
#if (defined(QN_TEST_CTRL_PIN))
    if(gpio_read_pin(QN_TEST_CTRL_PIN) == GPIO_HIGH)
    {
#endif
        // Work mode defined in the usr_config.h
        ble_init((enum WORK_MODE)QN_WORK_MODE, QN_HCI_PORT, QN_HCI_RD, QN_HCI_WR, ble_heap, BLE_HEAP_SIZE, QN_BLE_SLEEP);
#if (defined(QN_TEST_CTRL_PIN))
    }
    else
    {
        // Test mode (controller mode)
        ble_init((enum WORK_MODE)WORK_MODE_HCI, QN_HCI_PORT, QN_HCI_RD, QN_HCI_WR, ble_heap, BLE_HEAP_SIZE, false);
        // In the test mode, the program moniter test control pin. If the input of test control ping changes to low level,
        // it means work mode should be switched to the mode defined in the user configuration file.
        gpio_set_interrupt(QN_TEST_CTRL_PIN, GPIO_INT_HIGH_LEVEL);
        gpio_enable_interrupt(QN_TEST_CTRL_PIN);
    }
#endif

    set_max_sleep_duration(QN_BLE_MAX_SLEEP_DUR);

    // If QN902x works on wireless SoC mode, initialize APP task
#if (QN_WORK_MODE == WORK_MODE_SOC)
    app_init();
#endif

    usr_init();

    sleep_init();
    wakeup_by_sleep_timer(__32K_TYPE);

    GLOBAL_INT_START();

    while(1)
    {
        ke_schedule();

        // Checks for sleep have to be done with interrupt disabled
        GLOBAL_INT_DISABLE_WITHOUT_TUNER();

        // Check whether the chip can enters sleep mode
        //
        // Chip enter sleep condition:
        // +--------+--------+--------+--------+--------+
        // |    USR |        |        |        |        |
        // | BLE    | ACTIVE | IDLE   | SLEEP  | DEEP   |
        // +--------+--------+--------+--------+--------+
        // | ACTIVE | active | active | active | active |
        // | IDLE   | active | idle   | idle   | idle   |
        // | SLEEP  | active | idle   | sleep  | deep   |
        // +--------+--------+--------+--------+--------+

        // Obtain the status of the user program
        usr_sleep_st = usr_sleep();

        // If the user program can be sleep or deep sleep then check ble status
        if(usr_sleep_st != PM_ACTIVE)
        {
            // Obtain the status of ble sleep mode
            ble_sleep_st = ble_sleep(usr_sleep_st);

            // Check if the processor clock can be gated
            if(((ble_sleep_st == PM_IDLE) || (usr_sleep_st == PM_IDLE))
                    && (ble_sleep_st != PM_ACTIVE))
            {
                // Debug
                //led_set(5, LED_OFF);
                //led_set(4, LED_ON);  // led4 is on when enter into gating mode

                enter_sleep(SLEEP_CPU_CLK_OFF,
                            WAKEUP_BY_ALL_IRQ_SOURCE,
                            NULL);

                // Debug
                //led_set(4, LED_OFF);
                //led_set(5, LED_ON);  // led5 is on when enter into active mode
            }

            // Check if the processor can be power down
            else if((ble_sleep_st == PM_SLEEP) && (usr_sleep_st == PM_SLEEP))
            {
                // Debug
                //led_set(5, LED_OFF);
                //led_set(3, LED_ON);  // led3 is on when enter into sleep mode

                enter_sleep(SLEEP_NORMAL,
                            (WAKEUP_BY_OSC_EN | WAKEUP_BY_GPIO),
                            sleep_cb);

                // Debug
                //led_set(3, LED_OFF);
                //led_set(5, LED_ON);  // led5 is on when enter into active mode
            }

            // Check if the system can be deep sleep
            else if((ble_sleep_st == PM_SLEEP) && (usr_sleep_st == PM_DEEP_SLEEP))
            {
                // Debug
                //led_set(5, LED_OFF);
                //led_set(2, LED_ON);  // led2 is on when enter into deep sleep mode

                enter_sleep(SLEEP_DEEP,
                            WAKEUP_BY_GPIO,
                            sleep_cb);

                // Debug
                //led_set(2, LED_OFF);
                //led_set(5, LED_ON);  // led5 is on when enter into active mode
            }
        }

        // Checks for sleep have to be done with interrupt disabled
        GLOBAL_INT_RESTORE_WITHOUT_TUNER();
    }
}