/*
* Common function for mapping DMA-safe memory. May be called by
* bus-specific DMA memory map functions.
*/
int
_dmamem_map(bus_dma_tag_t t, bus_dma_segment_t *segs, int nsegs, size_t size,
caddr_t *kvap, int flags)
{
vaddr_t va, sva;
size_t ssize;
paddr_t pa;
bus_addr_t addr;
int curseg, error;
if (nsegs == 1) {
pa = (*t->_device_to_pa)(segs[0].ds_addr);
if (flags & BUS_DMA_COHERENT)
*kvap = (caddr_t)PHYS_TO_UNCACHED(pa);
else
*kvap = (caddr_t)PHYS_TO_XKPHYS(pa, CCA_CACHED);
return (0);
}
size = round_page(size);
va = uvm_km_valloc(kernel_map, size);
if (va == 0)
return (ENOMEM);
*kvap = (caddr_t)va;
sva = va;
ssize = size;
for (curseg = 0; curseg < nsegs; curseg++) {
for (addr = segs[curseg].ds_addr;
addr < (segs[curseg].ds_addr + segs[curseg].ds_len);
addr += NBPG, va += NBPG, size -= NBPG) {
if (size == 0)
panic("_dmamem_map: size botch");
pa = (*t->_device_to_pa)(addr);
error = pmap_enter(pmap_kernel(), va, pa,
VM_PROT_READ | VM_PROT_WRITE, VM_PROT_READ |
VM_PROT_WRITE | PMAP_WIRED | PMAP_CANFAIL);
if (error) {
pmap_update(pmap_kernel());
uvm_km_free(kernel_map, sva, ssize);
return (error);
}
if (flags & BUS_DMA_COHERENT)
pmap_page_cache(PHYS_TO_VM_PAGE(pa),
PV_UNCACHED);
}
pmap_update(pmap_kernel());
}
return (0);
}
/*
* Common function for mapping DMA-safe memory. May be called by
* bus-specific DMA memory map functions.
*/
int
_dmamem_map(bus_dma_tag_t t, bus_dma_segment_t *segs, int nsegs, size_t size,
caddr_t *kvap, int flags)
{
vaddr_t va, sva;
size_t ssize;
paddr_t pa;
bus_addr_t addr;
int curseg, error, pmap_flags;
const struct kmem_dyn_mode *kd;
if (nsegs == 1) {
pa = (*t->_device_to_pa)(segs[0].ds_addr);
if (flags & (BUS_DMA_COHERENT | BUS_DMA_NOCACHE))
*kvap = (caddr_t)PHYS_TO_XKPHYS(pa, CCA_NC);
else
*kvap = (caddr_t)PHYS_TO_XKPHYS(pa, CCA_CACHED);
return (0);
}
size = round_page(size);
kd = flags & BUS_DMA_NOWAIT ? &kd_trylock : &kd_waitok;
va = (vaddr_t)km_alloc(size, &kv_any, &kp_none, kd);
if (va == 0)
return (ENOMEM);
*kvap = (caddr_t)va;
sva = va;
ssize = size;
pmap_flags = PMAP_WIRED | PMAP_CANFAIL;
if (flags & (BUS_DMA_COHERENT | BUS_DMA_NOCACHE))
pmap_flags |= PMAP_NOCACHE;
for (curseg = 0; curseg < nsegs; curseg++) {
for (addr = segs[curseg].ds_addr;
addr < (segs[curseg].ds_addr + segs[curseg].ds_len);
addr += NBPG, va += NBPG, size -= NBPG) {
if (size == 0)
panic("_dmamem_map: size botch");
pa = (*t->_device_to_pa)(addr);
error = pmap_enter(pmap_kernel(), va, pa,
PROT_READ | PROT_WRITE,
PROT_READ | PROT_WRITE | pmap_flags);
if (error) {
pmap_update(pmap_kernel());
km_free((void *)sva, ssize, &kv_any, &kp_none);
return (error);
}
/*
* This is redundant with what pmap_enter() did
* above, but will take care of forcing other
* mappings of the same page (if any) to be
* uncached.
* If there are no multiple mappings of that
* page, this amounts to a noop.
*/
if (flags & (BUS_DMA_COHERENT | BUS_DMA_NOCACHE))
pmap_page_cache(PHYS_TO_VM_PAGE(pa),
PGF_UNCACHED);
}
pmap_update(pmap_kernel());
}
return (0);
}
/*
* Common function for mapping DMA-safe memory. May be called by
* bus-specific DMA memory map functions.
*/
int
_dmamem_map(bus_dma_tag_t t, bus_dma_segment_t *segs, int nsegs, size_t size,
caddr_t *kvap, int flags)
{
vaddr_t va, sva;
size_t ssize;
paddr_t pa;
bus_addr_t addr;
int curseg, error, pmap_flags;
#if defined(TGT_INDIGO2)
/*
* On ECC MC systems, which do not allow uncached writes to memory
* during regular operation, fail requests for uncached (coherent)
* memory, unless the caller tells us it is aware of this and will
* do the right thing, by passing BUS_DMA_BUS1 as well.
*/
if ((flags & (BUS_DMA_COHERENT | BUS_DMA_BUS1)) == BUS_DMA_COHERENT &&
ip22_ecc)
return EINVAL;
#endif
#ifdef TGT_COHERENT
/* coherent mappings do not need to be uncached on these platforms */
flags &= ~BUS_DMA_COHERENT;
#endif
if (nsegs == 1) {
pa = (*t->_device_to_pa)(segs[0].ds_addr);
if (flags & (BUS_DMA_COHERENT | BUS_DMA_NOCACHE))
*kvap = (caddr_t)PHYS_TO_XKPHYS(pa, CCA_NC);
else
*kvap = (caddr_t)PHYS_TO_XKPHYS(pa, CCA_CACHED);
return (0);
}
size = round_page(size);
va = uvm_km_valloc(kernel_map, size);
if (va == 0)
return (ENOMEM);
*kvap = (caddr_t)va;
sva = va;
ssize = size;
pmap_flags = PMAP_WIRED | PMAP_CANFAIL;
if (flags & (BUS_DMA_COHERENT | BUS_DMA_NOCACHE))
pmap_flags |= PMAP_NOCACHE;
for (curseg = 0; curseg < nsegs; curseg++) {
for (addr = segs[curseg].ds_addr;
addr < (segs[curseg].ds_addr + segs[curseg].ds_len);
addr += NBPG, va += NBPG, size -= NBPG) {
#ifdef DIAGNOSTIC
if (size == 0)
panic("_dmamem_map: size botch");
#endif
pa = (*t->_device_to_pa)(addr);
error = pmap_enter(pmap_kernel(), va, pa,
VM_PROT_READ | VM_PROT_WRITE, VM_PROT_READ |
VM_PROT_WRITE | pmap_flags);
if (error) {
pmap_update(pmap_kernel());
uvm_km_free(kernel_map, sva, ssize);
return (error);
}
/*
* This is redundant with what pmap_enter() did
* above, but will take care of forcing other
* mappings of the same page (if any) to be
* uncached.
* If there are no multiple mappings of that
* page, this amounts to a noop.
*/
if (flags & (BUS_DMA_COHERENT | BUS_DMA_NOCACHE))
pmap_page_cache(PHYS_TO_VM_PAGE(pa),
PV_UNCACHED);
}
pmap_update(pmap_kernel());
}
return (0);
}
