void at91_mci0_hw_init(void) { const struct pio_desc mci_pins[] = { {"MCCK", AT91C_PIN_PD(9), 0, PIO_DEFAULT, PIO_PERIPH_A}, {"MCCDA", AT91C_PIN_PD(0), 0, PIO_DEFAULT, PIO_PERIPH_A}, {"MCDA0", AT91C_PIN_PD(1), 0, PIO_DEFAULT, PIO_PERIPH_A}, {"MCDA1", AT91C_PIN_PD(2), 0, PIO_DEFAULT, PIO_PERIPH_A}, {"MCDA2", AT91C_PIN_PD(3), 0, PIO_DEFAULT, PIO_PERIPH_A}, {"MCDA3", AT91C_PIN_PD(4), 0, PIO_DEFAULT, PIO_PERIPH_A}, {"MCDA4", AT91C_PIN_PD(5), 0, PIO_DEFAULT, PIO_PERIPH_A}, {"MCDA5", AT91C_PIN_PD(6), 0, PIO_DEFAULT, PIO_PERIPH_A}, {"MCDA6", AT91C_PIN_PD(7), 0, PIO_DEFAULT, PIO_PERIPH_A}, {"MCDA7", AT91C_PIN_PD(8), 0, PIO_DEFAULT, PIO_PERIPH_A}, {(char *)0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A}, }; /* Configure the PIO controller */ pmc_enable_periph_clock(AT91C_ID_HSMCI0); pio_configure(mci_pins); /* Enable the clock */ pmc_enable_periph_clock(AT91C_ID_HSMCI0); /* Set of name function pointer */ sdcard_set_of_name = &sdcard_set_of_name_board; }
void at91_spi0_hw_init(void) { /* Configure spi0 PINs */ const struct pio_desc spi0_pins[] = { {"MISO", AT91C_PIN_PA(0), 0, PIO_DEFAULT, PIO_PERIPH_A}, {"MOSI", AT91C_PIN_PA(1), 0, PIO_DEFAULT, PIO_PERIPH_A}, {"SPCK", AT91C_PIN_PA(2), 0, PIO_DEFAULT, PIO_PERIPH_A}, {"NPCS", CONFIG_SYS_SPI_PCS, 1, PIO_PULLUP, PIO_OUTPUT}, {(char *)0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A}, }; /* Configure the spi0 pins */ pio_configure(spi0_pins); #if (AT91C_SPI_PCS_DATAFLASH == AT91C_SPI_PCS0_DATAFLASH) pmc_enable_periph_clock(AT91C_ID_PIOA); #endif #if (AT91C_SPI_PCS_DATAFLASH == AT91C_SPI_PCS1_DATAFLASH) pmc_enable_periph_clock(AT91C_ID_PIOA); pmc_enable_periph_clock(AT91C_ID_PIOC); #endif /* Enable the spi0 clock */ pmc_enable_periph_clock(AT91C_ID_SPI0); }
void at91_mci0_hw_init(void) { /* const struct pio_desc mci_pins[] = { {"MCCK", AT91C_PIN_PA(2), 0, PIO_DEFAULT, PIO_PERIPH_B}, {"MCCDA", AT91C_PIN_PA(1), 0, PIO_PULLUP, PIO_PERIPH_B}, {"MCDA0", AT91C_PIN_PA(0), 0, PIO_PULLUP, PIO_PERIPH_B}, {"MCDA1", AT91C_PIN_PA(4), 0, PIO_PULLUP, PIO_PERIPH_B}, {"MCDA2", AT91C_PIN_PA(5), 0, PIO_PULLUP, PIO_PERIPH_B}, {"MCDA3", AT91C_PIN_PA(6), 0, PIO_PULLUP, PIO_PERIPH_B}, {(char *)0, 0, 0, PIO_DEFAULT, PIO_PERIPH_B}, }; */ /* configure mci0 pins */ writel(((0x01 << 0) | (0x01 << 1) | (0x01 << 2) | (0x01 << 4) | (0x01 << 5) | (0x01 << 6)), AT91C_BASE_PIOA + PIO_BSR); writel(((0x01 << 0) | (0x01 << 1) | (0x01 << 2) | (0x01 << 4) | (0x01 << 5) | (0x01 << 6)), AT91C_BASE_PIOA + PIO_PDR); pmc_enable_periph_clock(AT91C_ID_PIOA); /* Enable the clock */ pmc_enable_periph_clock(AT91C_ID_MCI); }
static void at91_dbgu_hw_init(void) { const struct pio_desc dbgu_pins[] = { {"RXD", AT91C_PIN_PE(16), 0, PIO_DEFAULT, PIO_PERIPH_B}, {"TXD", AT91C_PIN_PE(17), 0, PIO_DEFAULT, PIO_PERIPH_B}, {(char *)0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A}, }; pio_configure(dbgu_pins); pmc_enable_periph_clock(AT91C_ID_PIOE); pmc_enable_periph_clock(AT91C_ID_USART3); }
static void at91_twi0_hw_init(void) { const struct pio_desc twi_pins[] = { {"TWD0", AT91C_PIN_PA(30), 0, PIO_DEFAULT, PIO_PERIPH_A}, {"TWCK0", AT91C_PIN_PA(31), 0, PIO_DEFAULT, PIO_PERIPH_A}, {(char *)0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A}, }; pmc_enable_periph_clock(AT91C_ID_PIOA); pio_configure(twi_pins); pmc_enable_periph_clock(AT91C_ID_TWI0); }
static void at91_twi3_hw_init(void) { const struct pio_desc twi_pins[] = { {"TWD3", AT91C_PIN_PC(25), 0, PIO_DEFAULT, PIO_PERIPH_B}, {"TWCK3", AT91C_PIN_PC(26), 0, PIO_DEFAULT, PIO_PERIPH_B}, {(char *)0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A}, }; pmc_enable_periph_clock(AT91C_ID_PIOC); pio_configure(twi_pins); pmc_enable_periph_clock(AT91C_ID_TWI3); }
void nandflash_hw_init(void) { /* Configure nand pins */ const struct pio_desc nand_pins[] = { {"NANDALE", AT91C_PIN_PE(21), 0, PIO_PULLUP, PIO_PERIPH_A}, {"NANDCLE", AT91C_PIN_PE(22), 0, PIO_PULLUP, PIO_PERIPH_A}, {(char *)0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A}, }; /* Configure the nand controller pins*/ pmc_enable_periph_clock(AT91C_ID_PIOE); pio_configure(nand_pins); /* Enable the clock */ pmc_enable_periph_clock(AT91C_ID_SMC); /* Configure SMC CS3 for NAND/SmartMedia */ writel(AT91C_SMC_SETUP_NWE(1) | AT91C_SMC_SETUP_NCS_WR(1) | AT91C_SMC_SETUP_NRD(2) | AT91C_SMC_SETUP_NCS_RD(1), (ATMEL_BASE_SMC + SMC_SETUP3)); writel(AT91C_SMC_PULSE_NWE(5) | AT91C_SMC_PULSE_NCS_WR(7) | AT91C_SMC_PULSE_NRD(5) | AT91C_SMC_PULSE_NCS_RD(7), (ATMEL_BASE_SMC + SMC_PULSE3)); writel(AT91C_SMC_CYCLE_NWE(8) | AT91C_SMC_CYCLE_NRD(9), (ATMEL_BASE_SMC + SMC_CYCLE3)); writel(AT91C_SMC_TIMINGS_TCLR(3) | AT91C_SMC_TIMINGS_TADL(10) | AT91C_SMC_TIMINGS_TAR(3) | AT91C_SMC_TIMINGS_TRR(4) | AT91C_SMC_TIMINGS_TWB(5) | AT91C_SMC_TIMINGS_RBNSEL(3) | AT91C_SMC_TIMINGS_NFSEL, (ATMEL_BASE_SMC + SMC_TIMINGS3)); writel(AT91C_SMC_MODE_READMODE_NRD_CTRL | AT91C_SMC_MODE_WRITEMODE_NWE_CTRL | AT91C_SMC_MODE_EXNWMODE_DISABLED | AT91C_SMC_MODE_DBW_8 | AT91C_SMC_MODE_TDF_CYCLES(1), (ATMEL_BASE_SMC + SMC_MODE3)); }
void at91_spi0_hw_init(void) { const struct pio_desc spi0_pins[] = { {"MISO", AT91C_PIN_PD(10), 0, PIO_DEFAULT, PIO_PERIPH_A}, {"MOSI", AT91C_PIN_PD(11), 0, PIO_DEFAULT, PIO_PERIPH_A}, {"SPCK", AT91C_PIN_PD(12), 0, PIO_DEFAULT, PIO_PERIPH_A}, {"NPCS", CONFIG_SYS_SPI_PCS, 1, PIO_DEFAULT, PIO_OUTPUT}, {(char *)0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A}, }; pmc_enable_periph_clock(AT91C_ID_PIOD); pio_configure(spi0_pins); pmc_enable_periph_clock(AT91C_ID_SPI0); }
static void at91_dbgu_hw_init(void) { /* Configure DBGU pin */ const struct pio_desc dbgu_pins[] = { {"RXD", AT91C_PIN_PB(30), 0, PIO_DEFAULT, PIO_PERIPH_A}, {"TXD", AT91C_PIN_PB(31), 0, PIO_DEFAULT, PIO_PERIPH_A}, {(char *)0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A}, }; /* Configure the dbgu pins */ pmc_enable_periph_clock(AT91C_ID_PIOB); pio_configure(dbgu_pins); /* Enable clock */ pmc_enable_periph_clock(AT91C_ID_DBGU); }
static void ddramc_init(void) { struct ddramc_register ddramc_reg; unsigned int reg; ddramc_reg_config(&ddramc_reg); /* enable ddr2 clock */ pmc_enable_periph_clock(AT91C_ID_MPDDRC); pmc_enable_system_clock(AT91C_PMC_DDR); /* Init the special register for sama5d3x */ /* MPDDRC DLL Slave Offset Register: DDR2 configuration */ reg = AT91C_MPDDRC_S0OFF_1 | AT91C_MPDDRC_S2OFF_1 | AT91C_MPDDRC_S3OFF_1; writel(reg, (AT91C_BASE_MPDDRC + MPDDRC_DLL_SOR)); /* MPDDRC DLL Master Offset Register */ /* write master + clk90 offset */ reg = AT91C_MPDDRC_MOFF_7 | AT91C_MPDDRC_CLK90OFF_31 | AT91C_MPDDRC_SELOFF_ENABLED | AT91C_MPDDRC_KEY; writel(reg, (AT91C_BASE_MPDDRC + MPDDRC_DLL_MOR)); /* MPDDRC I/O Calibration Register */ /* DDR2 RZQ = 50 Ohm */ /* TZQIO = 4 */ reg = AT91C_MPDDRC_RDIV_DDR2_RZQ_50 | AT91C_MPDDRC_TZQIO_4; writel(reg, (AT91C_BASE_MPDDRC + MPDDRC_IO_CALIBR)); /* DDRAM2 Controller initialize */ ddram_initialize(AT91C_BASE_MPDDRC, AT91C_BASE_DDRCS, &ddramc_reg); }
static int ek_special_hw_init(void) { /* * For on the sam9m10g45ek board, the chip wm9711 stay in the test mode, * so it need do some action to exit mode. */ const struct pio_desc wm9711_pins[] = { {"AC97TX", AT91C_PIN_PD(7), 0, PIO_PULLUP, PIO_OUTPUT}, {"AC97FS", AT91C_PIN_PD(8), 0, PIO_PULLUP, PIO_OUTPUT}, {(char *)0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A}, }; pmc_enable_periph_clock(AT91C_ID_PIOD_E); pio_configure(wm9711_pins); /* * Disable pull-up on: * RXDV(PA15) => PHY normal mode (not Test mode) * ERX0(PA12) => PHY ADDR0 * ERX1(PA13) => PHY ADDR1 => PHYADDR = 0x0 * * PHY has internal pull-down */ writel((0x01 << 12) | (0x01 << 13) | (0x01 << 15), AT91C_BASE_PIOA + PIO_PPUDR); return 0; }
static void sdramc_hw_init(void) { /* Configure sdramc pins */ const struct pio_desc sdramc_pins[] = { {"D16", AT91C_PIN_PC(16), 0, PIO_DEFAULT, PIO_PERIPH_A}, {"D17", AT91C_PIN_PC(17), 0, PIO_DEFAULT, PIO_PERIPH_A}, {"D18", AT91C_PIN_PC(18), 0, PIO_DEFAULT, PIO_PERIPH_A}, {"D19", AT91C_PIN_PC(19), 0, PIO_DEFAULT, PIO_PERIPH_A}, {"D20", AT91C_PIN_PC(20), 0, PIO_DEFAULT, PIO_PERIPH_A}, {"D21", AT91C_PIN_PC(21), 0, PIO_DEFAULT, PIO_PERIPH_A}, {"D22", AT91C_PIN_PC(22), 0, PIO_DEFAULT, PIO_PERIPH_A}, {"D23", AT91C_PIN_PC(23), 0, PIO_DEFAULT, PIO_PERIPH_A}, {"D24", AT91C_PIN_PC(24), 0, PIO_DEFAULT, PIO_PERIPH_A}, {"D25", AT91C_PIN_PC(25), 0, PIO_DEFAULT, PIO_PERIPH_A}, {"D26", AT91C_PIN_PC(26), 0, PIO_DEFAULT, PIO_PERIPH_A}, {"D27", AT91C_PIN_PC(27), 0, PIO_DEFAULT, PIO_PERIPH_A}, {"D28", AT91C_PIN_PC(28), 0, PIO_DEFAULT, PIO_PERIPH_A}, {"D29", AT91C_PIN_PC(29), 0, PIO_DEFAULT, PIO_PERIPH_A}, {"D30", AT91C_PIN_PC(30), 0, PIO_DEFAULT, PIO_PERIPH_A}, {"D31", AT91C_PIN_PC(31), 0, PIO_DEFAULT, PIO_PERIPH_A}, {(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A}, }; /* Configure the SDRAMC PINs */ pmc_enable_periph_clock(AT91C_ID_PIOC); pio_configure(sdramc_pins); }
unsigned int at91_eth1_hw_init(void) { unsigned int base_addr = AT91C_BASE_EMAC; const struct pio_desc macb_pins[] = { {"EMDC", AT91C_PIN_PC(8), 0, PIO_DEFAULT, PIO_PERIPH_A}, {"EMDIO", AT91C_PIN_PC(9), 0, PIO_DEFAULT, PIO_PERIPH_A}, {(char *)0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A}, }; pio_configure(macb_pins); pmc_enable_periph_clock(AT91C_ID_PIOC); pmc_enable_periph_clock(AT91C_ID_EMAC); return base_addr; }
unsigned int at91_twi0_hw_init(void) { unsigned int base_addr = AT91C_BASE_TWI0; const struct pio_desc twi_pins[] = { {"TWD0", AT91C_PIN_PA(30), 0, PIO_DEFAULT, PIO_PERIPH_A}, {"TWCK0", AT91C_PIN_PA(31), 0, PIO_DEFAULT, PIO_PERIPH_A}, {(char *)0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A}, }; pmc_enable_periph_clock(AT91C_ID_PIOA); pio_configure(twi_pins); pmc_enable_periph_clock(AT91C_ID_TWI0); return base_addr; }
unsigned int at91_twi3_hw_init(void) { unsigned int base_addr = AT91C_BASE_TWI3; const struct pio_desc twi_pins[] = { {"TWD3", AT91C_PIN_PC(25), 0, PIO_DEFAULT, PIO_PERIPH_B}, {"TWCK3", AT91C_PIN_PC(26), 0, PIO_DEFAULT, PIO_PERIPH_B}, {(char *)0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A}, }; pmc_enable_periph_clock(AT91C_ID_PIOC); pio_configure(twi_pins); pmc_enable_periph_clock(AT91C_ID_TWI3); return base_addr; }
void at91_spi0_hw_init(void) { /* Configure PIN for SPI0 */ const struct pio_desc spi0_pins[] = { {"SPI0_MISO", AT91C_PIN_PC(0), 0, PIO_DEFAULT, PIO_PERIPH_A}, {"SPI0_MOSI", AT91C_PIN_PC(1), 0, PIO_DEFAULT, PIO_PERIPH_A}, {"SPI0_SPCK", AT91C_PIN_PC(2), 0, PIO_DEFAULT, PIO_PERIPH_A}, {"SPI0_NPCS", CONFIG_SYS_SPI_PCS, 1, PIO_DEFAULT, PIO_OUTPUT}, {(char *)0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A}, }; /* Configure the PIO controller */ pio_configure(spi0_pins); pmc_enable_periph_clock(AT91C_ID_PIOC); pmc_enable_periph_clock(AT91C_ID_SPI0); }
unsigned int at91_eth1_hw_init(void) { unsigned int base_addr = AT91C_BASE_GMAC1; const struct pio_desc macb_pins[] = { {"G1_MDC", AT91C_PIN_PA(22), 0, PIO_DEFAULT, PIO_PERIPH_B}, {"G1_MDIO", AT91C_PIN_PA(23), 0, PIO_DEFAULT, PIO_PERIPH_B}, {(char *)0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A}, }; pio_configure(macb_pins); pmc_enable_periph_clock(AT91C_ID_PIOA); pmc_enable_periph_clock(AT91C_ID_GMAC1); return base_addr; }
void at91_mci0_hw_init(void) { const struct pio_desc mci_pins[] = { {"MCCK",AT91C_PIN_PA(2), 0, PIO_DEFAULT, PIO_PERIPH_B}, {"MCCDA", AT91C_PIN_PA(1), 0, PIO_PULLUP, PIO_PERIPH_B}, {"MCDA0", AT91C_PIN_PA(0), 0, PIO_PULLUP, PIO_PERIPH_B}, {"MCDA1", AT91C_PIN_PA(4), 0, PIO_PULLUP, PIO_PERIPH_B}, {"MCDA2", AT91C_PIN_PA(5), 0, PIO_PULLUP, PIO_PERIPH_B}, {"MCDA3", AT91C_PIN_PA(6), 0, PIO_PULLUP, PIO_PERIPH_B}, {(char *)0, 0, 0, PIO_DEFAULT, PIO_PERIPH_B}, }; pmc_enable_periph_clock(AT91C_ID_PIOA); pio_configure(mci_pins); /* Enable the clock */ pmc_enable_periph_clock(AT91C_ID_MCI); }
void at91_spi0_hw_init(void) { /* Configure spi0 PINs */ const struct pio_desc spi0_pins[] = { {"MISO", AT91C_PIN_PA(25), 0, PIO_DEFAULT, PIO_PERIPH_A}, {"MOSI", AT91C_PIN_PA(26), 0, PIO_DEFAULT, PIO_PERIPH_A}, {"SPCK", AT91C_PIN_PA(27), 0, PIO_DEFAULT, PIO_PERIPH_A}, {"NPCS", CONFIG_SYS_SPI_PCS, 1, PIO_PULLUP, PIO_OUTPUT}, {(char *)0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A}, }; /* Configure the spi0 pins */ pmc_enable_periph_clock(AT91C_ID_PIOA); pio_configure(spi0_pins); /* Enable the spi0 clock */ pmc_enable_periph_clock(AT91C_ID_SPI); }
void at91_mci0_hw_init(void) { const struct pio_desc mci_pins[] = { {"MCI1_CK", AT91C_PIN_PE(18), 0, PIO_DEFAULT, PIO_PERIPH_C}, {"MCI1_CDA", AT91C_PIN_PE(19), 0, PIO_DEFAULT, PIO_PERIPH_C}, {"MCI1_DA0", AT91C_PIN_PE(20), 0, PIO_DEFAULT, PIO_PERIPH_C}, {"MCI1_DA1", AT91C_PIN_PE(21), 0, PIO_DEFAULT, PIO_PERIPH_C}, {"MCI1_DA2", AT91C_PIN_PE(22), 0, PIO_DEFAULT, PIO_PERIPH_C}, {"MCI1_DA3", AT91C_PIN_PE(23), 0, PIO_DEFAULT, PIO_PERIPH_C}, {(char *)0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A}, }; /* Configure the PIO controller */ pio_configure(mci_pins); pmc_enable_periph_clock(AT91C_ID_PIOE); pmc_enable_periph_clock(AT91C_ID_HSMCI1); }
void at91_mci0_hw_init(void) { const struct pio_desc mci_pins[] = { {"MCCK", AT91C_PIN_PA(17), 0, PIO_PULLUP, PIO_PERIPH_A}, {"MCCDA", AT91C_PIN_PA(16), 0, PIO_PULLUP, PIO_PERIPH_A}, {"MCDA0", AT91C_PIN_PA(15), 0, PIO_PULLUP, PIO_PERIPH_A}, {"MCDA1", AT91C_PIN_PA(18), 0, PIO_PULLUP, PIO_PERIPH_A}, {"MCDA2", AT91C_PIN_PA(19), 0, PIO_PULLUP, PIO_PERIPH_A}, {"MCDA3", AT91C_PIN_PA(20), 0, PIO_PULLUP, PIO_PERIPH_A}, {(char *)0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A}, }; /* Configure the PIO controller */ pmc_enable_periph_clock(AT91C_ID_PIOA_B); pio_configure(mci_pins); /* Enable the clock */ pmc_enable_periph_clock(AT91C_ID_HSMCI0); }
static void one_wire_hw_init(void) { const struct pio_desc wire_pio[] = { {"1-Wire", AT91C_PIN_PB(18), 1, PIO_DEFAULT, PIO_OUTPUT}, {(char *)0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A}, }; pmc_enable_periph_clock(AT91C_ID_PIOA_B); pio_configure(wire_pio); }
static void one_wire_hw_init(void) { const struct pio_desc one_wire_pio[] = { {"1-Wire", CONFIG_SYS_ONE_WIRE_PIN, 1, PIO_DEFAULT, PIO_OUTPUT}, {(char *)0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A}, }; pio_configure(one_wire_pio); pmc_enable_periph_clock(AT91C_ID_PIOE); }
static void emac_hw_init(void) { const struct pio_desc macb_pins[] = { {"EMDC", AT91C_PIN_PC(8), 0, PIO_DEFAULT, PIO_PERIPH_A}, {"EMDIO", AT91C_PIN_PC(9), 0, PIO_DEFAULT, PIO_PERIPH_A}, {(char *)0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A}, }; pio_configure(macb_pins); pmc_enable_periph_clock(AT91C_ID_PIOC); }
static void recovery_buttons_hw_init(void) { /* Configure recovery button PINs */ const struct pio_desc recovery_button_pins[] = { {"RECOVERY_BUTTON", CONFIG_SYS_RECOVERY_BUTTON_PIN, 0, PIO_PULLUP, PIO_INPUT}, {(char *)0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A}, }; pmc_enable_periph_clock(AT91C_ID_PIOA); pio_configure(recovery_button_pins); }
static void gmac1_hw_init(void) { const struct pio_desc macb_pins[] = { {"G1_MDC", AT91C_PIN_PA(22), 0, PIO_DEFAULT, PIO_PERIPH_B}, {"G1_MDIO", AT91C_PIN_PA(23), 0, PIO_DEFAULT, PIO_PERIPH_B}, {(char *)0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A}, }; pio_configure(macb_pins); pmc_enable_periph_clock(AT91C_ID_PIOA); }
static void at91_dbgu_hw_init(void) { /* Configure DBGU pins */ const struct pio_desc dbgu_pins[] = { {"RXD", AT91C_PIN_PA(9), 0, PIO_DEFAULT, PIO_PERIPH_A}, {"TXD", AT91C_PIN_PA(10), 0, PIO_DEFAULT, PIO_PERIPH_A}, {(char *)0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A}, }; pmc_enable_periph_clock(AT91C_ID_PIOA_B); pio_configure(dbgu_pins); }
static int phys_enter_power_down(void) { struct mii_bus macb_mii_bus; #if defined(CONFIG_MAC0_PHY) gmac0_hw_init(); macb_mii_bus.name = "GMAC0 KSZ8081RNB"; macb_mii_bus.reg_base = (void *)AT91C_BASE_GMAC; macb_mii_bus.phy_addr = 1; pmc_enable_periph_clock(AT91C_ID_GMAC); if (phy_power_down_mode(&macb_mii_bus)) { dbg_loud("%s: Failed to enter power down mode\n", macb_mii_bus.name); } pmc_disable_periph_clock(AT91C_ID_GMAC); #endif #if defined(CONFIG_MAC1_PHY) gmac1_hw_init(); macb_mii_bus.name = "GMAC1 KSZ8081RNB"; macb_mii_bus.reg_base = (void *)AT91C_BASE_GMAC1; macb_mii_bus.phy_addr = 1; pmc_enable_periph_clock(AT91C_ID_GMAC1); if (phy_power_down_mode(&macb_mii_bus)) { dbg_loud("%s: Failed to enter power down mode\n", macb_mii_bus.name); } pmc_disable_periph_clock(AT91C_ID_GMAC1); #endif return 0; }
static void at91_disable_smd_clock(void) { /* * set pin DIBP to pull-up and DIBN to pull-down * to save power on VDDIOP0 */ pmc_enable_system_clock(AT91C_PMC_SMDCK); pmc_set_smd_clock_divider(AT91C_PMC_SMDDIV); pmc_enable_periph_clock(AT91C_ID_SMD); writel(0xF, (0x0C + AT91C_BASE_SMD)); pmc_disable_periph_clock(AT91C_ID_SMD); pmc_disable_system_clock(AT91C_PMC_SMDCK); }
void at91_mci0_hw_init(void) { const struct pio_desc mci_pins[] = { {"MCCK", AT91C_PIN_PD(9), 0, PIO_DEFAULT, PIO_PERIPH_A}, {"MCCDA", AT91C_PIN_PD(0), 0, PIO_DEFAULT, PIO_PERIPH_A}, {"MCDA0", AT91C_PIN_PD(1), 0, PIO_DEFAULT, PIO_PERIPH_A}, {"MCDA1", AT91C_PIN_PD(2), 0, PIO_DEFAULT, PIO_PERIPH_A}, {"MCDA2", AT91C_PIN_PD(3), 0, PIO_DEFAULT, PIO_PERIPH_A}, {"MCDA3", AT91C_PIN_PD(4), 0, PIO_DEFAULT, PIO_PERIPH_A}, {"MCDA4", AT91C_PIN_PD(5), 0, PIO_DEFAULT, PIO_PERIPH_A}, {"MCDA5", AT91C_PIN_PD(6), 0, PIO_DEFAULT, PIO_PERIPH_A}, {"MCDA6", AT91C_PIN_PD(7), 0, PIO_DEFAULT, PIO_PERIPH_A}, {"MCDA7", AT91C_PIN_PD(8), 0, PIO_DEFAULT, PIO_PERIPH_A}, {(char *)0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A}, }; pmc_enable_periph_clock(AT91C_ID_HSMCI0); pio_configure(mci_pins); pmc_enable_periph_clock(AT91C_ID_HSMCI0); }