int main(int argc, char **argv)
{
if (argc != 3) {
fprintf(stderr, "Usage: %s PORT BAUD\n", argv[0]);
return EXIT_FAILURE;
}
PathName port_name(argv[1]);
int baud = atoi(argv[2]);
MyHandler handler;
#ifdef HAVE_POSIX
TTYPort port(port_name, baud, handler);
#else
SerialPort port(port_name, baud, handler);
#endif
if (!port.Open()) {
fprintf(stderr, "Failed to open COM port\n");
return EXIT_FAILURE;
}
while (true)
Sleep(10000);
return EXIT_SUCCESS;
}
static
void psofed_scan_all_ports(void)
{
struct ibv_device **dev_list;
struct ibv_device *ib_dev = NULL;
int dev_list_count;
int i;
// psofed_dprint(3, "configured port <%s>", port_name(psofed_hca, psofed_port));
dev_list = ibv_get_device_list(&dev_list_count);
if (!dev_list) goto err_no_dev_list;
for (i = 0; i < dev_list_count; i++) {
ib_dev = dev_list[i];
if (!ib_dev) continue;
psofed_scan_hca_ports(ib_dev);
}
ibv_free_device_list(dev_list);
err_no_dev_list:
if (!psofed_port) psofed_port = 1;
psofed_dprint(2, "using port <%s>", port_name(psofed_hca, psofed_port));
}
int main(int argc, char **argv)
{
if (argc != 3) {
fprintf(stderr, "Usage: %s PORT BAUD\n", argv[0]);
return EXIT_FAILURE;
}
PathName port_name(argv[1]);
int baud = atoi(argv[2]);
#ifdef HAVE_POSIX
TTYPort *port = new TTYPort(port_name, baud, *(Port::Handler *)NULL);
#else
SerialPort *port = new SerialPort(port_name, baud, *(Port::Handler *)NULL);
#endif
if (!port->Open()) {
delete port;
fprintf(stderr, "Failed to open COM port\n");
return EXIT_FAILURE;
}
port->SetRxTimeout(0x10000);
char buffer[4096];
while (true) {
int nbytes = port->Read(buffer, sizeof(buffer));
if (nbytes < 0)
break;
fwrite((const void *)buffer, 1, nbytes, stdout);
}
delete port;
return EXIT_SUCCESS;
}
static int i9xx_pipe_crc_auto_source(struct drm_i915_private *dev_priv,
enum pipe pipe,
enum intel_pipe_crc_source *source)
{
struct drm_device *dev = &dev_priv->drm;
struct intel_encoder *encoder;
struct intel_crtc *crtc;
struct intel_digital_port *dig_port;
int ret = 0;
*source = INTEL_PIPE_CRC_SOURCE_PIPE;
drm_modeset_lock_all(dev);
for_each_intel_encoder(dev, encoder) {
if (!encoder->base.crtc)
continue;
crtc = to_intel_crtc(encoder->base.crtc);
if (crtc->pipe != pipe)
continue;
switch (encoder->type) {
case INTEL_OUTPUT_TVOUT:
*source = INTEL_PIPE_CRC_SOURCE_TV;
break;
case INTEL_OUTPUT_DP:
case INTEL_OUTPUT_EDP:
dig_port = enc_to_dig_port(&encoder->base);
switch (dig_port->port) {
case PORT_B:
*source = INTEL_PIPE_CRC_SOURCE_DP_B;
break;
case PORT_C:
*source = INTEL_PIPE_CRC_SOURCE_DP_C;
break;
case PORT_D:
*source = INTEL_PIPE_CRC_SOURCE_DP_D;
break;
default:
WARN(1, "nonexisting DP port %c\n",
port_name(dig_port->port));
break;
}
break;
default:
break;
}
}
drm_modeset_unlock_all(dev);
return ret;
}
static void intel_wait_ddi_buf_idle(struct drm_i915_private *dev_priv,
enum port port)
{
uint32_t reg = DDI_BUF_CTL(port);
int i;
for (i = 0; i < 8; i++) {
udelay(1);
if (I915_READ(reg) & DDI_BUF_IS_IDLE)
return;
}
DRM_ERROR("Timeout waiting for DDI BUF %c idle bit\n", port_name(port));
}
/* On Haswell, DDI port buffers must be programmed with correct values
* in advance. The buffer values are different for FDI and DP modes,
* but the HDMI/DVI fields are shared among those. So we program the DDI
* in either FDI or DP modes only, as HDMI connections will work with both
* of those
*/
void intel_prepare_ddi_buffers(struct drm_device *dev, enum port port, bool use_fdi_mode)
{
struct drm_i915_private *dev_priv = dev->dev_private;
u32 reg;
int i;
const u32 *ddi_translations = ((use_fdi_mode) ?
hsw_ddi_translations_fdi :
hsw_ddi_translations_dp);
DRM_DEBUG_DRIVER("Initializing DDI buffers for port %c in %s mode\n",
port_name(port),
use_fdi_mode ? "FDI" : "DP");
WARN((use_fdi_mode && (port != PORT_E)),
"Programming port %c in FDI mode, this probably will not work.\n",
port_name(port));
for (i=0, reg=DDI_BUF_TRANS(port); i < ARRAY_SIZE(hsw_ddi_translations_fdi); i++) {
I915_WRITE(reg, ddi_translations[i]);
reg += 4;
}
}
static void intel_ddi_mode_set(struct intel_encoder *encoder)
{
struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc);
int port = intel_ddi_get_encoder_port(encoder);
int pipe = crtc->pipe;
int type = encoder->type;
struct drm_display_mode *adjusted_mode = &crtc->config.adjusted_mode;
DRM_DEBUG_KMS("Preparing DDI mode on port %c, pipe %c\n",
port_name(port), pipe_name(pipe));
crtc->eld_vld = false;
if (type == INTEL_OUTPUT_DISPLAYPORT || type == INTEL_OUTPUT_EDP) {
struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base);
struct intel_digital_port *intel_dig_port =
enc_to_dig_port(&encoder->base);
intel_dp->DP = intel_dig_port->saved_port_bits |
DDI_BUF_CTL_ENABLE | DDI_BUF_EMP_400MV_0DB_HSW;
intel_dp->DP |= DDI_PORT_WIDTH(intel_dp->lane_count);
if (intel_dp->has_audio) {
DRM_DEBUG_DRIVER("DP audio on pipe %c on DDI\n",
pipe_name(crtc->pipe));
/* write eld */
DRM_DEBUG_DRIVER("DP audio: write eld information\n");
intel_write_eld(&encoder->base, adjusted_mode);
}
intel_dp_init_link_config(intel_dp);
} else if (type == INTEL_OUTPUT_HDMI) {
struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(&encoder->base);
if (intel_hdmi->has_audio) {
/* Proper support for digital audio needs a new logic
* and a new set of registers, so we leave it for future
* patch bombing.
*/
DRM_DEBUG_DRIVER("HDMI audio on pipe %c on DDI\n",
pipe_name(crtc->pipe));
/* write eld */
DRM_DEBUG_DRIVER("HDMI audio: write eld information\n");
intel_write_eld(&encoder->base, adjusted_mode);
}
intel_hdmi->set_infoframes(&encoder->base, adjusted_mode);
}
}
/***************************************************************
Load
***************************************************************/
static obj_ptr _load_imp(cptr file, obj_ptr env)
{
port_ptr p;
obj_ptr o = NIL;
p = port_open_input_file(file);
while (!port_eof(p))
{
o = obj_read(p);
if (ERRORP(o)) break;
o = obj_eval(o, env);
if (ERRORP(o)) break;
port_skip_while(p, isspace);
}
if (ERRORP(o))
error_add_file_info(o, port_name(p), port_line(p));
port_close(p);
return o;
}
static void parse_ddi_port(struct drm_i915_private *dev_priv, enum port port,
struct bdb_header *bdb)
{
union child_device_config *it, *child = NULL;
struct ddi_vbt_port_info *info = &dev_priv->vbt.ddi_port_info[port];
uint8_t hdmi_level_shift;
int i, j;
bool is_dvi, is_hdmi, is_dp, is_edp, is_crt;
uint8_t aux_channel;
/* Each DDI port can have more than one value on the "DVO Port" field,
* so look for all the possible values for each port and abort if more
* than one is found. */
int dvo_ports[][2] = {
{DVO_PORT_HDMIA, DVO_PORT_DPA},
{DVO_PORT_HDMIB, DVO_PORT_DPB},
{DVO_PORT_HDMIC, DVO_PORT_DPC},
{DVO_PORT_HDMID, DVO_PORT_DPD},
{DVO_PORT_CRT, -1 /* Port E can only be DVO_PORT_CRT */ },
};
/* Find the child device to use, abort if more than one found. */
for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
it = dev_priv->vbt.child_dev + i;
for (j = 0; j < 2; j++) {
if (dvo_ports[port][j] == -1)
break;
if (it->common.dvo_port == dvo_ports[port][j]) {
if (child) {
DRM_DEBUG_KMS("More than one child device for port %c in VBT.\n",
port_name(port));
return;
}
child = it;
}
}
}
if (!child)
return;
aux_channel = child->raw[25];
is_dvi = child->common.device_type & DEVICE_TYPE_TMDS_DVI_SIGNALING;
is_dp = child->common.device_type & DEVICE_TYPE_DISPLAYPORT_OUTPUT;
is_crt = child->common.device_type & DEVICE_TYPE_ANALOG_OUTPUT;
is_hdmi = is_dvi && (child->common.device_type & DEVICE_TYPE_NOT_HDMI_OUTPUT) == 0;
is_edp = is_dp && (child->common.device_type & DEVICE_TYPE_INTERNAL_CONNECTOR);
info->supports_dvi = is_dvi;
info->supports_hdmi = is_hdmi;
info->supports_dp = is_dp;
DRM_DEBUG_KMS("Port %c VBT info: DP:%d HDMI:%d DVI:%d EDP:%d CRT:%d\n",
port_name(port), is_dp, is_hdmi, is_dvi, is_edp, is_crt);
if (is_edp && is_dvi)
DRM_DEBUG_KMS("Internal DP port %c is TMDS compatible\n",
port_name(port));
if (is_crt && port != PORT_E)
DRM_DEBUG_KMS("Port %c is analog\n", port_name(port));
if (is_crt && (is_dvi || is_dp))
DRM_DEBUG_KMS("Analog port %c is also DP or TMDS compatible\n",
port_name(port));
if (is_dvi && (port == PORT_A || port == PORT_E))
DRM_DEBUG_KMS("Port %c is TMDS compabile\n", port_name(port));
if (!is_dvi && !is_dp && !is_crt)
DRM_DEBUG_KMS("Port %c is not DP/TMDS/CRT compatible\n",
port_name(port));
if (is_edp && (port == PORT_B || port == PORT_C || port == PORT_E))
DRM_DEBUG_KMS("Port %c is internal DP\n", port_name(port));
if (is_dvi) {
if (child->common.ddc_pin == 0x05 && port != PORT_B)
DRM_DEBUG_KMS("Unexpected DDC pin for port B\n");
if (child->common.ddc_pin == 0x04 && port != PORT_C)
DRM_DEBUG_KMS("Unexpected DDC pin for port C\n");
if (child->common.ddc_pin == 0x06 && port != PORT_D)
DRM_DEBUG_KMS("Unexpected DDC pin for port D\n");
}
if (is_dp) {
if (aux_channel == 0x40 && port != PORT_A)
DRM_DEBUG_KMS("Unexpected AUX channel for port A\n");
if (aux_channel == 0x10 && port != PORT_B)
DRM_DEBUG_KMS("Unexpected AUX channel for port B\n");
if (aux_channel == 0x20 && port != PORT_C)
DRM_DEBUG_KMS("Unexpected AUX channel for port C\n");
if (aux_channel == 0x30 && port != PORT_D)
DRM_DEBUG_KMS("Unexpected AUX channel for port D\n");
}
if (bdb->version >= 158) {
/* The VBT HDMI level shift values match the table we have. */
hdmi_level_shift = child->raw[7] & 0xF;
if (hdmi_level_shift < 0xC) {
DRM_DEBUG_KMS("VBT HDMI level shift for port %c: %d\n",
port_name(port),
hdmi_level_shift);
info->hdmi_level_shift = hdmi_level_shift;
}
}
}
int main(int argc, char **argv)
{
NarrowString<1024> usage;
usage = "DRIVER PORT BAUD FILE.igc [FLIGHT NR]\n\n"
"Where DRIVER is one of:";
{
const DeviceRegister *driver;
for (unsigned i = 0; (driver = GetDriverByIndex(i)) != NULL; ++i) {
if (driver->IsLogger()) {
NarrowPathName driver_name(driver->name);
usage.AppendFormat("\n\t%s", (const char *)driver_name);
}
}
}
Args args(argc, argv, usage);
PathName driver_name(args.ExpectNext());
PathName port_name(args.ExpectNext());
DeviceConfig config;
config.Clear();
config.baud_rate = atoi(args.ExpectNext());
PathName path(args.ExpectNext());
unsigned flight_id = args.IsEmpty() ? 0 : atoi(args.GetNext());
args.ExpectEnd();
#ifdef HAVE_POSIX
TTYPort port(port_name, config.baud_rate, *(Port::Handler *)NULL);
#else
SerialPort port(port_name, config.baud_rate, *(Port::Handler *)NULL);
#endif
if (!port.Open()) {
fprintf(stderr, "Failed to open COM port\n");
return EXIT_FAILURE;
}
ConsoleOperationEnvironment env;
const struct DeviceRegister *driver = FindDriverByName(driver_name);
if (driver == NULL) {
fprintf(stderr, "No such driver: %s\n", argv[1]);
args.UsageError();
}
if (!driver->IsLogger()) {
fprintf(stderr, "Not a logger driver: %s\n", argv[1]);
args.UsageError();
}
assert(driver->CreateOnPort != NULL);
Device *device = driver->CreateOnPort(config, port);
assert(device != NULL);
if (!device->Open(env)) {
delete device;
fprintf(stderr, "Failed to open driver: %s\n", argv[1]);
return EXIT_FAILURE;
}
if (!device->EnableDownloadMode()) {
delete device;
fprintf(stderr, "Failed to enable download mode\n");
return EXIT_FAILURE;
}
RecordedFlightList flight_list;
if (!device->ReadFlightList(flight_list, env)) {
device->DisableDownloadMode();
delete device;
fprintf(stderr, "Failed to download flight list\n");
return EXIT_FAILURE;
}
if (flight_list.empty()) {
device->DisableDownloadMode();
delete device;
fprintf(stderr, "Logger is empty\n");
return EXIT_FAILURE;
}
PrintFlightList(flight_list);
if (flight_id >= flight_list.size()) {
device->DisableDownloadMode();
delete device;
fprintf(stderr, "Flight id not found\n");
return EXIT_FAILURE;
}
if (!device->DownloadFlight(flight_list[flight_id], path, env)) {
device->DisableDownloadMode();
delete device;
fprintf(stderr, "Failed to download flight\n");
return EXIT_FAILURE;
}
device->DisableDownloadMode();
delete device;
printf("Flight downloaded successfully\n");
return EXIT_SUCCESS;
}
static void intel_ddi_mode_set(struct drm_encoder *encoder,
struct drm_display_mode *mode,
struct drm_display_mode *adjusted_mode)
{
struct drm_crtc *crtc = encoder->crtc;
struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
struct intel_encoder *intel_encoder = to_intel_encoder(encoder);
int port = intel_ddi_get_encoder_port(intel_encoder);
int pipe = intel_crtc->pipe;
int type = intel_encoder->type;
DRM_DEBUG_KMS("Preparing DDI mode for Haswell on port %c, pipe %c\n",
port_name(port), pipe_name(pipe));
intel_crtc->eld_vld = false;
if (type == INTEL_OUTPUT_DISPLAYPORT || type == INTEL_OUTPUT_EDP) {
struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
struct intel_digital_port *intel_dig_port =
enc_to_dig_port(encoder);
intel_dp->DP = intel_dig_port->port_reversal |
DDI_BUF_CTL_ENABLE | DDI_BUF_EMP_400MV_0DB_HSW;
switch (intel_dp->lane_count) {
case 1:
intel_dp->DP |= DDI_PORT_WIDTH_X1;
break;
case 2:
intel_dp->DP |= DDI_PORT_WIDTH_X2;
break;
case 4:
intel_dp->DP |= DDI_PORT_WIDTH_X4;
break;
default:
intel_dp->DP |= DDI_PORT_WIDTH_X4;
WARN(1, "Unexpected DP lane count %d\n",
intel_dp->lane_count);
break;
}
if (intel_dp->has_audio) {
DRM_DEBUG_DRIVER("DP audio on pipe %c on DDI\n",
pipe_name(intel_crtc->pipe));
/* write eld */
DRM_DEBUG_DRIVER("DP audio: write eld information\n");
intel_write_eld(encoder, adjusted_mode);
}
intel_dp_init_link_config(intel_dp);
} else if (type == INTEL_OUTPUT_HDMI) {
struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(encoder);
if (intel_hdmi->has_audio) {
/* Proper support for digital audio needs a new logic
* and a new set of registers, so we leave it for future
* patch bombing.
*/
DRM_DEBUG_DRIVER("HDMI audio on pipe %c on DDI\n",
pipe_name(intel_crtc->pipe));
/* write eld */
DRM_DEBUG_DRIVER("HDMI audio: write eld information\n");
intel_write_eld(encoder, adjusted_mode);
}
intel_hdmi->set_infoframes(encoder, adjusted_mode);
}
}
int pscan_main(int argc UNUSED_PARAM, char **argv)
{
const char *opt_max_port = "1024"; /* -P: default max port */
const char *opt_min_port = "1"; /* -p: default min port */
const char *opt_timeout = "5000"; /* -t: default timeout in msec */
/* We estimate rtt and wait rtt*4 before concluding that port is
* totally blocked. min rtt of 5 ms may be too low if you are
* scanning an Internet host behind saturated/traffic shaped link.
* Rule of thumb: with min_rtt of N msec, scanning 1000 ports
* will take N seconds at absolute minimum */
const char *opt_min_rtt = "5"; /* -T: default min rtt in msec */
const char *result_str;
len_and_sockaddr *lsap;
int s;
unsigned opt;
unsigned port, max_port, nports;
unsigned closed_ports = 0;
unsigned open_ports = 0;
/* all in usec */
unsigned timeout;
unsigned min_rtt;
unsigned rtt_4;
unsigned start, diff;
opt_complementary = "=1"; /* exactly one non-option */
opt = getopt32(argv, "cbp:P:t:T:", &opt_min_port, &opt_max_port, &opt_timeout, &opt_min_rtt);
argv += optind;
max_port = xatou_range(opt_max_port, 1, 65535);
port = xatou_range(opt_min_port, 1, max_port);
nports = max_port - port + 1;
min_rtt = xatou_range(opt_min_rtt, 1, INT_MAX/1000 / 4) * 1000;
timeout = xatou_range(opt_timeout, 1, INT_MAX/1000 / 4) * 1000;
/* Initial rtt is BIG: */
rtt_4 = timeout;
DMSG("min_rtt %u timeout %u", min_rtt, timeout);
lsap = xhost2sockaddr(*argv, port);
printf("Scanning %s ports %u to %u\n Port\tProto\tState\tService\n",
*argv, port, max_port);
for (; port <= max_port; port++) {
DMSG("rtt %u", rtt_4);
/* The SOCK_STREAM socket type is implemented on the TCP/IP protocol. */
set_nport(&lsap->u.sa, htons(port));
s = xsocket(lsap->u.sa.sa_family, SOCK_STREAM, 0);
/* We need unblocking socket so we don't need to wait for ETIMEOUT. */
/* Nonblocking connect typically "fails" with errno == EINPROGRESS */
ndelay_on(s);
DMSG("connect to port %u", port);
result_str = NULL;
start = MONOTONIC_US();
if (connect(s, &lsap->u.sa, lsap->len) == 0) {
/* Unlikely, for me even localhost fails :) */
DMSG("connect succeeded");
goto open;
}
/* Check for untypical errors... */
if (errno != EAGAIN && errno != EINPROGRESS
&& errno != ECONNREFUSED
) {
bb_perror_nomsg_and_die();
}
diff = 0;
while (1) {
if (errno == ECONNREFUSED) {
if (opt & 1) /* -c: show closed too */
result_str = "closed";
closed_ports++;
break;
}
DERR("port %u errno %d @%u", port, errno, diff);
if (diff > rtt_4) {
if (opt & 2) /* -b: show blocked too */
result_str = "blocked";
break;
}
/* Can sleep (much) longer than specified delay.
* We check rtt BEFORE we usleep, otherwise
* on localhost we'll have no writes done (!)
* before we exceed (rather small) rtt */
usleep(rtt_4/8);
open:
diff = MONOTONIC_US() - start;
DMSG("write to port %u @%u", port, diff - start);
if (write(s, " ", 1) >= 0) { /* We were able to write to the socket */
open_ports++;
result_str = "open";
break;
}
}
DMSG("out of loop @%u", diff);
if (result_str)
printf("%5u" "\t" "tcp" "\t" "%s" "\t" "%s" "\n",
port, result_str, port_name(port));
/* Estimate new rtt - we don't want to wait entire timeout
* for each port. *4 allows for rise in net delay.
* We increase rtt quickly (rtt_4*4), decrease slowly
* (diff is at least rtt_4/8, *4 == rtt_4/2)
* because we don't want to accidentally miss ports. */
rtt_4 = diff * 4;
if (rtt_4 < min_rtt)
rtt_4 = min_rtt;
if (rtt_4 > timeout)
rtt_4 = timeout;
/* Clean up */
close(s);
}
if (ENABLE_FEATURE_CLEAN_UP) free(lsap);
printf("%u closed, %u open, %u timed out (or blocked) ports\n",
closed_ports,
open_ports,
nports - (closed_ports + open_ports));
return EXIT_SUCCESS;
}
int main(int argc, char **argv)
{
if (argc != 4) {
fprintf(stderr, "Usage: %s DRIVER PORT BAUD\n"
"Where DRIVER is one of:\n", argv[0]);
const struct DeviceRegister *driver;
for (unsigned i = 0; (driver = GetDriverByIndex(i)) != NULL; ++i)
if (driver->IsLogger())
_ftprintf(stderr, _T("\t%s\n"), driver->name);
return EXIT_FAILURE;
}
PathName driver_name(argv[1]);
PathName port_name(argv[2]);
DeviceConfig config;
config.Clear();
config.baud_rate = atoi(argv[3]);
#ifdef HAVE_POSIX
TTYPort port(port_name, config.baud_rate, *(Port::Handler *)NULL);
#else
SerialPort port(port_name, config.baud_rate, *(Port::Handler *)NULL);
#endif
if (!port.Open()) {
fprintf(stderr, "Failed to open COM port\n");
return EXIT_FAILURE;
}
ConsoleOperationEnvironment env;
RecordedFlightList flight_list;
const struct DeviceRegister *driver = FindDriverByName(driver_name);
if (driver == NULL) {
fprintf(stderr, "No such driver: %s\n", argv[1]);
return EXIT_FAILURE;
}
if (!driver->IsLogger()) {
fprintf(stderr, "Not a logger driver: %s\n", argv[1]);
return EXIT_FAILURE;
}
assert(driver->CreateOnPort != NULL);
Device *device = driver->CreateOnPort(config, port);
assert(device != NULL);
if (!device->Open(env)) {
delete device;
fprintf(stderr, "Failed to open driver: %s\n", argv[1]);
return EXIT_FAILURE;
}
if (!device->EnableDownloadMode()) {
delete device;
fprintf(stderr, "Failed to enable download mode\n");
return EXIT_FAILURE;
}
if (!device->ReadFlightList(flight_list, env)) {
device->DisableDownloadMode();
delete device;
fprintf(stderr, "Failed to download flight list\n");
return EXIT_FAILURE;
}
device->DisableDownloadMode();
delete device;
for (auto i = flight_list.begin(); i != flight_list.end(); ++i) {
const RecordedFlightInfo &flight = *i;
printf("%04u/%02u/%02u %02u:%02u-%02u:%02u\n",
flight.date.year, flight.date.month, flight.date.day,
flight.start_time.hour, flight.start_time.minute,
flight.end_time.hour, flight.end_time.minute);
}
}
void intel_ddi_mode_set(struct drm_encoder *encoder,
struct drm_display_mode *mode,
struct drm_display_mode *adjusted_mode)
{
struct drm_device *dev = encoder->dev;
struct drm_i915_private *dev_priv = dev->dev_private;
struct drm_crtc *crtc = encoder->crtc;
struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(encoder);
int port = intel_hdmi->ddi_port;
int pipe = intel_crtc->pipe;
int p, n2, r2, valid=0;
u32 temp, i;
/* On Haswell, we need to enable the clocks and prepare DDI function to
* work in HDMI mode for this pipe.
*/
DRM_DEBUG_KMS("Preparing HDMI DDI mode for Haswell on port %c, pipe %c\n", port_name(port), pipe_name(pipe));
for (i=0; i < DRM_ARRAY_SIZE(wrpll_tmds_clock_table); i++) {
if (crtc->mode.clock == wrpll_tmds_clock_table[i].clock) {
p = wrpll_tmds_clock_table[i].p;
n2 = wrpll_tmds_clock_table[i].n2;
r2 = wrpll_tmds_clock_table[i].r2;
DRM_DEBUG_KMS("WR PLL clock: found settings for %dKHz refresh rate: p=%d, n2=%d, r2=%d\n",
crtc->mode.clock,
p, n2, r2);
valid = 1;
break;
}
}
if (!valid) {
DRM_ERROR("Unable to find WR PLL clock settings for %dKHz refresh rate\n",
crtc->mode.clock);
return;
}
/* Enable LCPLL if disabled */
temp = I915_READ(LCPLL_CTL);
if (temp & LCPLL_PLL_DISABLE)
I915_WRITE(LCPLL_CTL,
temp & ~LCPLL_PLL_DISABLE);
/* Configure WR PLL 1, program the correct divider values for
* the desired frequency and wait for warmup */
I915_WRITE(WRPLL_CTL1,
WRPLL_PLL_ENABLE |
WRPLL_PLL_SELECT_LCPLL_2700 |
WRPLL_DIVIDER_REFERENCE(r2) |
WRPLL_DIVIDER_FEEDBACK(n2) |
WRPLL_DIVIDER_POST(p));
DELAY(20);
/* Use WRPLL1 clock to drive the output to the port, and tell the pipe to use
* this port for connection.
*/
I915_WRITE(PORT_CLK_SEL(port),
PORT_CLK_SEL_WRPLL1);
I915_WRITE(PIPE_CLK_SEL(pipe),
PIPE_CLK_SEL_PORT(port));
DELAY(20);
if (intel_hdmi->has_audio) {
/* Proper support for digital audio needs a new logic and a new set
* of registers, so we leave it for future patch bombing.
*/
DRM_DEBUG_DRIVER("HDMI audio on pipe %c not yet supported on DDI\n",
pipe_name(intel_crtc->pipe));
}
/* Enable PIPE_DDI_FUNC_CTL for the pipe to work in HDMI mode */
temp = I915_READ(DDI_FUNC_CTL(pipe));
temp &= ~PIPE_DDI_PORT_MASK;
temp &= ~PIPE_DDI_BPC_12;
temp |= PIPE_DDI_SELECT_PORT(port) |
PIPE_DDI_MODE_SELECT_HDMI |
((intel_crtc->bpp > 24) ?
PIPE_DDI_BPC_12 :
PIPE_DDI_BPC_8) |
PIPE_DDI_FUNC_ENABLE;
I915_WRITE(DDI_FUNC_CTL(pipe), temp);
intel_hdmi_set_avi_infoframe(encoder, adjusted_mode);
intel_hdmi_set_spd_infoframe(encoder);
}
