void BSP_rtems_irq_mngt_init(unsigned cpuId)
{
int i;
/*
* connect all exception vectors needed
*/
ppc_exc_set_handler(ASM_EXT_VECTOR, C_dispatch_irq_handler);
ppc_exc_set_handler(ASM_BOOKE_DEC_VECTOR, C_dispatch_irq_handler);
/*
* setup interrupt handlers table
*/
for (i = 0;
i < BSP_IRQ_NUMBER;
i++) {
rtemsIrqTbl[i] = emptyIrq;
rtemsIrqTbl[i].name = i;
}
/*
* initialize interrupt management
*/
if (!BSP_rtems_irq_mngt_set(&initialConfig)) {
BSP_panic("Unable to initialize RTEMS interrupt Management!!! System locked\n");
}
}
rtems_status_code bsp_interrupt_facility_initialize(void)
{
/* Install exception handler */
if (ppc_exc_set_handler( ASM_EXT_VECTOR, C_dispatch_irq_handler)) {
return RTEMS_IO_ERROR;
}
if (ppc_exc_set_handler( ASM_DEC_VECTOR, C_dispatch_irq_handler)) {
return RTEMS_IO_ERROR;
}
if (ppc_exc_set_handler( ASM_E300_SYSMGMT_VECTOR, C_dispatch_irq_handler)) {
return RTEMS_IO_ERROR;
}
return RTEMS_SUCCESSFUL;
}
rtems_status_code bsp_interrupt_facility_initialize(void)
{
rtems_vector_number vector;
#ifndef PPC_EXC_CONFIG_USE_FIXED_HANDLER
/* Install exception handler */
if (ppc_exc_set_handler( ASM_EXT_VECTOR, mpc55xx_external_exception_handler)) {
return RTEMS_IO_ERROR;
}
#endif
/* Initialize interrupt controller */
/* Disable all interrupts */
for (vector = MPC55XX_IRQ_MIN; vector <= MPC55XX_IRQ_MAX; ++vector) {
INTC.PSR [vector].B.PRI = MPC55XX_INTC_DISABLED_PRIORITY;
}
/* Software vector mode */
INTC.MCR.B.VTES = 0;
INTC.MCR.B.HVEN = 0;
/* Set current priority to 0 */
INTC.CPR.B.PRI = 0;
return RTEMS_SUCCESSFUL;
}
rtems_status_code bsp_interrupt_facility_initialize()
{
/* Install exception handler */
if (ppc_exc_set_handler( ASM_EXT_VECTOR, mpc83xx_exception_handler)) {
return RTEMS_IO_ERROR;
}
if (ppc_exc_set_handler( ASM_E300_SYSMGMT_VECTOR, mpc83xx_exception_handler)) {
return RTEMS_IO_ERROR;
}
if (ppc_exc_set_handler( ASM_E300_CRIT_VECTOR, mpc83xx_exception_handler)) {
return RTEMS_IO_ERROR;
}
/* Initialize the interrupt controller */
return mpc83xx_ipic_initialize();
}
void bsp_start( void )
{
rtems_status_code sc = RTEMS_SUCCESSFUL;
uintptr_t intrStackStart;
uintptr_t intrStackSize;
/*
* Note we can not get CPU identification dynamically, so
* force current_ppc_cpu.
*/
current_ppc_cpu = PPC_PSIM;
/*
* initialize the device driver parameters
* assume we are running with 20MHz bus
* this should speed up some tests :-)
*/
BSP_bus_frequency = 20;
bsp_time_base_frequency = 20000000;
bsp_clicks_per_usec = BSP_bus_frequency;
rtems_counter_initialize_converter(bsp_time_base_frequency);
/*
* Initialize the interrupt related settings.
*/
intrStackStart = (uintptr_t) bsp_interrupt_stack_start;
intrStackSize = (uintptr_t) bsp_interrupt_stack_size;
BSP_mem_size = (uint32_t )RamSize;
/*
* Initialize default raw exception handlers.
*/
ppc_exc_initialize(intrStackStart, intrStackSize);
/* Install default handler for the decrementer exception */
sc = ppc_exc_set_handler( ASM_DEC_VECTOR, default_decrementer_exception_handler);
if (sc != RTEMS_SUCCESSFUL) {
BSP_panic("cannot install decrementer exception handler");
}
/* Initalize interrupt support */
bsp_interrupt_initialize();
#if 0
/*
* Setup BATs and enable MMU
*/
/* Memory */
setdbat(0, 0x0<<24, 0x0<<24, 2<<24, _PAGE_RW);
setibat(0, 0x0<<24, 0x0<<24, 2<<24, 0);
/* PCI */
setdbat(1, 0x8<<24, 0x8<<24, 1<<24, IO_PAGE);
setdbat(2, 0xc<<24, 0xc<<24, 1<<24, IO_PAGE);
_write_MSR(_read_MSR() | MSR_DR | MSR_IR);
__asm__ volatile("sync; isync");
#endif
}
void bsp_start(void)
{
rtems_status_code sc = RTEMS_SUCCESSFUL;
ppc_cpu_id_t myCpu;
ppc_cpu_revision_t myCpuRevision;
#if defined(MPC55XX_BOARD_MPC5674FEVB)
unsigned system_clock_divider = 2;
#else
unsigned system_clock_divider = 1;
#endif
null_pointer_protection();
/*
* make sure BSS/SBSS is cleared
*/
memset(&bsp_section_bss_begin [0], 0, (size_t) bsp_section_bss_size);
/*
* Get CPU identification dynamically. Note that the get_ppc_cpu_type()
* function store the result in global variables so that it can be used
* latter...
*/
myCpu = get_ppc_cpu_type();
myCpuRevision = get_ppc_cpu_revision();
/*
* determine clock speed
*/
bsp_clock_speed = mpc55xx_get_system_clock() / system_clock_divider;
/* Time reference value */
bsp_clicks_per_usec = bsp_clock_speed / 1000000;
/* Initialize exceptions */
ppc_exc_vector_base = (uint32_t) mpc55xx_exc_vector_base;
sc = ppc_exc_initialize(
PPC_INTERRUPT_DISABLE_MASK_DEFAULT,
(uintptr_t) bsp_section_work_begin,
Configuration.interrupt_stack_size
);
if (sc != RTEMS_SUCCESSFUL) {
BSP_panic( "Cannot initialize exceptions");
}
ppc_exc_set_handler(ASM_ALIGN_VECTOR, ppc_exc_alignment_handler);
/* Initialize interrupts */
sc = bsp_interrupt_initialize();
if (sc != RTEMS_SUCCESSFUL) {
BSP_panic( "Cannot initialize interrupts");
}
mpc55xx_edma_init();
#ifdef MPC55XX_EMIOS_PRESCALER
mpc55xx_emios_initialize(MPC55XX_EMIOS_PRESCALER);
#endif
}
rtems_status_code bsp_interrupt_facility_initialize(void)
{
/* Install exception handler */
if (ppc_exc_set_handler( ASM_EXT_VECTOR, psim_exception_handler)) {
return RTEMS_IO_ERROR;
}
return RTEMS_SUCCESSFUL;
}
static int ppc_clock_exception_handler_first( BSP_Exception_frame *frame, unsigned number)
{
/* We have to clear the first pending decrementer exception this way */
if (ppc_decrementer_register() >= 0x80000000) {
ppc_clock_exception_handler( frame, number);
}
ppc_exc_set_handler( ASM_DEC_VECTOR, ppc_clock_exception_handler);
return 0;
}
void bsp_start(void)
{
null_pointer_protection();
/*
* make sure BSS/SBSS is cleared
*/
memset(&bsp_section_bss_begin [0], 0, (size_t) bsp_section_bss_size);
/*
* Get CPU identification dynamically. Note that the get_ppc_cpu_type()
* function store the result in global variables so that it can be used
* latter...
*/
get_ppc_cpu_type();
get_ppc_cpu_revision();
/*
* determine clock speed
*/
bsp_clock_speed = mpc55xx_get_system_clock() / MPC55XX_SYSTEM_CLOCK_DIVIDER;
/* Time reference value */
bsp_clicks_per_usec = bsp_clock_speed / 1000000;
/* Initialize exceptions */
ppc_exc_initialize_with_vector_base(
PPC_INTERRUPT_DISABLE_MASK_DEFAULT,
(uintptr_t) bsp_section_work_begin,
rtems_configuration_get_interrupt_stack_size(),
mpc55xx_exc_vector_base
);
#ifndef PPC_EXC_CONFIG_USE_FIXED_HANDLER
ppc_exc_set_handler(ASM_ALIGN_VECTOR, ppc_exc_alignment_handler);
#endif
/* Initialize interrupts */
bsp_interrupt_initialize();
#if MPC55XX_CHIP_FAMILY != 566
mpc55xx_edma_init();
#endif
#ifdef MPC55XX_EMIOS_PRESCALER
mpc55xx_emios_initialize(MPC55XX_EMIOS_PRESCALER);
#endif
}
rtems_status_code bsp_interrupt_facility_initialize(void)
{
rtems_vector_number i = 0;
uint32_t processor_id = ppc_processor_id();
if (ppc_exc_set_handler(ASM_EXT_VECTOR, qoriq_external_exception_handler)) {
return RTEMS_IO_ERROR;
}
if (processor_id == 0) {
/* Core 0 must do the basic initialization */
pic_reset();
for (i = BSP_INTERRUPT_VECTOR_MIN; i <= BSP_INTERRUPT_VECTOR_MAX; ++i) {
volatile uint32_t *base = (volatile uint32_t *) &qoriq.pic;
int offs = vpr_and_dr_offsets [i] << 2;
volatile uint32_t *vpr = base + offs;
*vpr = VPR_MSK | VPR_P | VPR_PRIORITY(1) | VPR_VECTOR(i);
if (!pic_is_ipi(i)) {
volatile uint32_t *dr = base + offs + 4;
*dr = 0x1;
}
}
qoriq.pic.mer03 = 0xf;
qoriq.pic.mer47 = 0xf;
qoriq.pic.svr = SPURIOUS;
qoriq.pic.gcr = GCR_M;
pic_global_timer_init();
}
qoriq.pic.ctpr = 0;
for (i = BSP_INTERRUPT_VECTOR_MIN; i <= BSP_INTERRUPT_VECTOR_MAX; ++i) {
qoriq.pic.iack;
qoriq.pic.eoi = 0;
qoriq.pic.whoami;
}
return RTEMS_SUCCESSFUL;
}
rtems_status_code bsp_interrupt_facility_initialize(void)
{
rtems_vector_number i = 0;
uint32_t processor_id = ppc_processor_id();
#ifndef PPC_EXC_CONFIG_USE_FIXED_HANDLER
if (ppc_exc_set_handler(ASM_EXT_VECTOR, qoriq_external_exception_handler)) {
return RTEMS_IO_ERROR;
}
#endif
if (processor_id == 0) {
/* Core 0 must do the basic initialization */
pic_reset();
for (i = BSP_INTERRUPT_VECTOR_MIN; i <= BSP_INTERRUPT_VECTOR_MAX; ++i) {
volatile qoriq_pic_src_cfg *src_cfg = get_src_cfg(i);
src_cfg->vpr = VPR_MSK | VPR_P | VPR_PRIORITY(1) | VPR_VECTOR(i);
if (!pic_is_ipi(i)) {
src_cfg->dr = 0x1;
}
}
qoriq.pic.mer03 = 0xf;
qoriq.pic.mer47 = 0xf;
qoriq.pic.svr = SPURIOUS;
qoriq.pic.gcr = GCR_M;
pic_global_timer_init();
}
qoriq.pic.ctpr = 0;
for (i = BSP_INTERRUPT_VECTOR_MIN; i <= BSP_INTERRUPT_VECTOR_MAX; ++i) {
qoriq.pic.iack;
qoriq.pic.eoi = 0;
qoriq.pic.whoami;
}
return RTEMS_SUCCESSFUL;
}
rtems_device_driver Clock_initialize( rtems_device_major_number major, rtems_device_minor_number minor, void *arg)
{
/* Current CPU type */
ppc_cpu_id_t cpu_type = get_ppc_cpu_type();
/* Make major/minor available to others such as shared memory driver */
rtems_clock_major = major;
rtems_clock_minor = minor;
/*
* Set default ticker.
*
* The function rtems_clock_tick() returns a status code. This value
* will be discarded since the RTEMS documentation claims that it is
* always successful.
*/
ppc_clock_tick = (void (*)(void)) rtems_clock_tick;
/* Set the decrementer to the maximum value */
ppc_set_decrementer_register( PPC_CLOCK_DECREMENTER_MAX);
/* Decrementer value */
ppc_clock_decrementer_value = bsp_clicks_per_usec * rtems_configuration_get_microseconds_per_tick() - 1;
/* Check decrementer value */
if (ppc_clock_decrementer_value == 0) {
ppc_clock_decrementer_value = PPC_CLOCK_DECREMENTER_MAX;
RTEMS_SYSLOG_ERROR( "decrementer value would be zero, will be set to maximum value instead\n");
}
/* Set the nanoseconds since last tick handler */
rtems_clock_set_nanoseconds_extension( ppc_clock_nanoseconds_since_last_tick);
if (ppc_cpu_is_bookE()) {
/* Set decrementer auto-reload value */
PPC_SET_SPECIAL_PURPOSE_REGISTER( BOOKE_DECAR, ppc_clock_decrementer_value);
/* Install exception handler */
ppc_exc_set_handler( ASM_BOOKE_DEC_VECTOR, ppc_clock_exception_handler_booke);
/* Enable decrementer and auto-reload */
PPC_SET_SPECIAL_PURPOSE_REGISTER_BITS( BOOKE_TCR, BOOKE_TCR_DIE | BOOKE_TCR_ARE);
} else if (cpu_type == PPC_e300c2 || cpu_type == PPC_e300c3) {
/* TODO: Not tested for e300c2 */
/* Enable auto-reload */
PPC_SET_SPECIAL_PURPOSE_REGISTER_BITS( HID0, 0x00000040);
/* Install exception handler */
ppc_exc_set_handler( ASM_DEC_VECTOR, ppc_clock_exception_handler_e300);
} else {
/* Here the decrementer value is actually the interval */
++ppc_clock_decrementer_value;
/* Initialize next time base */
ppc_clock_next_time_base = ppc_time_base() + ppc_clock_decrementer_value;
/* Install exception handler */
ppc_exc_set_handler( ASM_DEC_VECTOR, ppc_clock_exception_handler_first);
}
/* Set the decrementer value */
ppc_set_decrementer_register( ppc_clock_decrementer_value);
return RTEMS_SUCCESSFUL;
}
void bsp_start(void)
{
ppc_cpu_id_t myCpu;
ppc_cpu_revision_t myCpuRevision;
/*
* Get CPU identification dynamically. Note that the get_ppc_cpu_type()
* function store the result in global variables so that it can be used
* later...
*/
myCpu = get_ppc_cpu_type();
myCpuRevision = get_ppc_cpu_revision();
#if defined(HAS_UBOOT) && defined(SHOW_MORE_INIT_SETTINGS)
{
void dumpUBootBDInfo( bd_t * );
dumpUBootBDInfo( &bsp_uboot_board_info );
}
#endif
cpu_init();
if(get_ppc_cpu_revision() >= 0x2014) {
/* Special settings for MPC5200B (B variant) */
uint32_t xlb_cfg = mpc5200.config;
/* XXX: The Freescale documentation for BSDIS seems to be wrong */
xlb_cfg |= XLB_CFG_BSDIS;
xlb_cfg &= ~XLB_CFG_PLDIS;
mpc5200.config = xlb_cfg;
}
bsp_time_base_frequency = XLB_CLOCK / 4;
bsp_clicks_per_usec = (XLB_CLOCK/4000000);
/* Initialize exception handler */
ppc_exc_cache_wb_check = 0;
ppc_exc_initialize(
PPC_INTERRUPT_DISABLE_MASK_DEFAULT,
(uintptr_t) bsp_interrupt_stack_start,
(uintptr_t) bsp_interrupt_stack_size
);
ppc_exc_set_handler(ASM_ALIGN_VECTOR, ppc_exc_alignment_handler);
/* Initalize interrupt support */
bsp_interrupt_initialize();
/*
* If the BSP was built with IRQ benchmarking enabled,
* then intialize it.
*/
#if (BENCHMARK_IRQ_PROCESSING == 1)
BSP_IRQ_Benchmarking_Reset();
#endif
#ifdef SHOW_MORE_INIT_SETTINGS
printk("Exit from bspstart\n");
#endif
}
rtems_device_driver Clock_initialize(
rtems_device_major_number major,
rtems_device_minor_number minor,
void *arg
)
{
uint64_t frequency = bsp_time_base_frequency;
uint64_t us_per_tick = rtems_configuration_get_microseconds_per_tick();
uint32_t interval = (uint32_t) ((frequency * us_per_tick) / 1000000);
/*
* Set default ticker.
*/
ppc_clock_tick = rtems_timecounter_tick;
if (ppc_cpu_is_bookE() != PPC_BOOKE_405) {
/* Decrementer value */
ppc_clock_decrementer_value = interval - 1;
/* Check decrementer value */
if (ppc_clock_decrementer_value == 0) {
ppc_clock_decrementer_value = PPC_CLOCK_DECREMENTER_MAX;
RTEMS_SYSLOG_ERROR( "decrementer value would be zero, will be set to maximum value instead\n");
}
if (ppc_cpu_is_bookE()) {
/* Set decrementer auto-reload value */
PPC_SET_SPECIAL_PURPOSE_REGISTER( BOOKE_DECAR, ppc_clock_decrementer_value);
/* Install exception handler */
ppc_exc_set_handler( ASM_BOOKE_DEC_VECTOR, ppc_clock_exception_handler_booke);
/* Enable decrementer and auto-reload */
PPC_SET_SPECIAL_PURPOSE_REGISTER_BITS( BOOKE_TCR, BOOKE_TCR_DIE | BOOKE_TCR_ARE);
} else {
/* Here the decrementer value is actually the interval */
++ppc_clock_decrementer_value;
/* Initialize next time base */
ppc_clock_next_time_base = ppc_time_base() + ppc_clock_decrementer_value;
/* Install exception handler */
ppc_exc_set_handler( ASM_DEC_VECTOR, ppc_clock_exception_handler_first);
}
/* Set the decrementer value */
ppc_set_decrementer_register( ppc_clock_decrementer_value);
} else {
/* PIT interval value */
ppc_clock_decrementer_value = interval;
/* Install exception handler */
ppc_exc_set_handler(ASM_BOOKE_DEC_VECTOR, ppc_clock_exception_handler_ppc405);
/* Enable PIT and auto-reload */
PPC_SET_SPECIAL_PURPOSE_REGISTER_BITS(PPC405_TCR, BOOKE_TCR_DIE | BOOKE_TCR_ARE);
/* Set PIT auto-reload and initial value */
PPC_SET_SPECIAL_PURPOSE_REGISTER(PPC405_PIT, interval);
}
/* Install timecounter */
ppc_tc.tc_get_timecount = ppc_get_timecount;
ppc_tc.tc_counter_mask = 0xffffffff;
ppc_tc.tc_frequency = frequency;
ppc_tc.tc_quality = RTEMS_TIMECOUNTER_QUALITY_CLOCK_DRIVER;
rtems_timecounter_install(&ppc_tc);
return RTEMS_SUCCESSFUL;
}
void bsp_start( void)
{
rtems_status_code sc = RTEMS_SUCCESSFUL;
unsigned long i = 0;
/*
* Get CPU identification dynamically. Note that the get_ppc_cpu_type() function
* store the result in global variables so that it can be used latter...
*/
get_ppc_cpu_type();
get_ppc_cpu_revision();
/* Basic CPU initialization */
cpu_init();
/*
* Enable instruction and data caches. Do not force writethrough mode.
*/
#ifdef BSP_INSTRUCTION_CACHE_ENABLED
rtems_cache_enable_instruction();
#endif
#ifdef BSP_DATA_CACHE_ENABLED
rtems_cache_enable_data();
#endif
/*
* This is evaluated during runtime, so it should be ok to set it
* before we initialize the drivers.
*/
/* Initialize some device driver parameters */
#ifdef HAS_UBOOT
BSP_bus_frequency = bsp_uboot_board_info.bi_busfreq;
#else /* HAS_UBOOT */
BSP_bus_frequency = BSP_CLKIN_FRQ * BSP_SYSPLL_MF / BSP_SYSPLL_CKID;
#endif /* HAS_UBOOT */
bsp_time_base_frequency = BSP_bus_frequency / 4;
bsp_clicks_per_usec = bsp_time_base_frequency / 1000000;
rtems_counter_initialize_converter(bsp_time_base_frequency);
/* Initialize some console parameters */
for (i = 0; i < console_device_count; ++i) {
ns16550_context *ctx = (ns16550_context *) console_device_table[i].context;
ctx->clock = BSP_bus_frequency;
#ifdef HAS_UBOOT
ctx->initial_baud = bsp_uboot_board_info.bi_baudrate;
#endif
}
/* Initialize exception handler */
#ifndef BSP_DATA_CACHE_ENABLED
ppc_exc_cache_wb_check = 0;
#endif
ppc_exc_initialize(
(uintptr_t) bsp_section_work_begin,
rtems_configuration_get_interrupt_stack_size()
);
/* Install default handler for the decrementer exception */
sc = ppc_exc_set_handler( ASM_DEC_VECTOR, mpc83xx_decrementer_exception_handler);
if (sc != RTEMS_SUCCESSFUL) {
rtems_panic("cannot install decrementer exception handler");
}
/* Initalize interrupt support */
bsp_interrupt_initialize();
#ifdef SHOW_MORE_INIT_SETTINGS
printk("Exit from bspstart\n");
#endif
}
int BSP_rtems_irq_mngt_set(rtems_irq_global_settings* config)
{
int i;
rtems_interrupt_level level;
rtems_irq_connect_data* vchain;
/*
* Store various code accelerators
*/
internal_config = config;
default_rtems_entry = config->defaultEntry;
rtems_hdl_tbl = config->irqHdlTbl;
rtems_interrupt_disable(level);
if ( !BSP_setup_the_pic(config) ) {
printk("PIC setup failed; leaving IRQs OFF\n");
return 0;
}
for ( i = config->irqBase; i < config->irqBase + config->irqNb; i++ ) {
for( vchain = &rtems_hdl_tbl[i];
((int)vchain != -1 && vchain->hdl != default_rtems_entry.hdl);
vchain = (rtems_irq_connect_data*)vchain->next_handler )
{
if (vchain->on)
vchain->on(vchain);
}
if ( vchain != &rtems_hdl_tbl[i] ) {
/* at least one handler registered */
BSP_enable_irq_at_pic(i);
} else {
/* Do NOT disable; there might be boards with cascaded
* interrupt controllers where the BSP (incorrectly) does
* not ignore the cascaded interrupts in BSP_disable_irq_at_pic()!
* Instead, we rely on BSP_setup_the_pic() for a good
* initial configuration.
*
BSP_disable_irq_at_pic(i);
*/
}
}
rtems_interrupt_enable(level);
{
ppc_exc_set_handler(ASM_EXT_VECTOR, C_dispatch_irq_handler);
if ( ppc_cpu_is_bookE() ) {
/* bookE decrementer interrupt needs to be cleared BEFORE
* dispatching the user ISR (because the user ISR is called
* with EE enabled)
* We do this so that existing DEC handlers can be used
* with minor modifications.
*/
ppc_exc_set_handler(ASM_BOOKE_DEC_VECTOR, C_dispatch_dec_handler_bookE);
} else {
ppc_exc_set_handler(ASM_DEC_VECTOR, C_dispatch_irq_handler);
}
}
return 1;
}
void bsp_start( void)
{
rtems_status_code sc = RTEMS_SUCCESSFUL;
unsigned long i = 0;
ppc_cpu_id_t myCpu;
ppc_cpu_revision_t myCpuRevision;
uintptr_t interrupt_stack_start = (uintptr_t) bsp_interrupt_stack_start;
uintptr_t interrupt_stack_size = (uintptr_t) bsp_interrupt_stack_size;
/*
* Get CPU identification dynamically. Note that the get_ppc_cpu_type() function
* store the result in global variables so that it can be used latter...
*/
myCpu = get_ppc_cpu_type();
myCpuRevision = get_ppc_cpu_revision();
/* Basic CPU initialization */
cpu_init();
/*
* Enable instruction and data caches. Do not force writethrough mode.
*/
#ifdef BSP_INSTRUCTION_CACHE_ENABLED
rtems_cache_enable_instruction();
#endif
#ifdef BSP_DATA_CACHE_ENABLED
rtems_cache_enable_data();
#endif
/*
* This is evaluated during runtime, so it should be ok to set it
* before we initialize the drivers.
*/
/* Initialize some device driver parameters */
#ifdef HAS_UBOOT
BSP_bus_frequency = bsp_uboot_board_info.bi_busfreq;
#else /* HAS_UBOOT */
BSP_bus_frequency = BSP_CLKIN_FRQ * BSP_SYSPLL_MF / BSP_SYSPLL_CKID;
#endif /* HAS_UBOOT */
bsp_time_base_frequency = BSP_bus_frequency / 4;
bsp_clicks_per_usec = bsp_time_base_frequency / 1000000;
/* Initialize some console parameters */
for (i = 0; i < Console_Configuration_Count; ++i) {
Console_Configuration_Ports [i].ulClock = BSP_bus_frequency;
#ifdef HAS_UBOOT
Console_Configuration_Ports [i].pDeviceParams =
(void *) bsp_uboot_board_info.bi_baudrate;
#endif
}
/* Initialize exception handler */
#ifndef BSP_DATA_CACHE_ENABLED
ppc_exc_cache_wb_check = 0;
#endif
sc = ppc_exc_initialize(
PPC_INTERRUPT_DISABLE_MASK_DEFAULT,
interrupt_stack_start,
interrupt_stack_size
);
if (sc != RTEMS_SUCCESSFUL) {
BSP_panic("cannot initialize exceptions");
}
/* Install default handler for the decrementer exception */
sc = ppc_exc_set_handler( ASM_DEC_VECTOR, mpc83xx_decrementer_exception_handler);
if (sc != RTEMS_SUCCESSFUL) {
BSP_panic("cannot install decrementer exception handler");
}
/* Initalize interrupt support */
sc = bsp_interrupt_initialize();
if (sc != RTEMS_SUCCESSFUL) {
BSP_panic("cannot intitialize interrupts\n");
}
#ifdef SHOW_MORE_INIT_SETTINGS
printk("Exit from bspstart\n");
#endif
}
