static void mali_boost_update(void)
{
u8 vape;
u32 pll;
if (boost_required) {
vape = mali_dvfs[boost_high].vape_raw;
pll = mali_dvfs[boost_high].clkpll;
pr_err("[Mali] @%u kHz - Boost\n", mali_dvfs[boost_high].freq);
prcmu_abb_write(AB8500_REGU_CTRL2,
AB8500_VAPE_SEL1,
&vape,
1);
prcmu_write(PRCMU_PLLSOC0, pll);
boost_working = true;
} else {
vape = mali_dvfs[boost_low].vape_raw;
pll = mali_dvfs[boost_low].clkpll;
pr_err("[Mali] @%u kHz - Deboost\n", mali_dvfs[boost_low].freq);
prcmu_write(PRCMU_PLLSOC0, pll);
prcmu_abb_write(AB8500_REGU_CTRL2,
AB8500_VAPE_SEL1,
&vape,
1);
boost_working = false;
}
}
void ux500_pm_prcmu_copy_gic_settings(void)
{
u32 er; /* Enable register */
int i;
for (i = 0; i < GIC_NUMBER_SPI_REGS; i++) { /* 4*32 SPI interrupts */
/* +1 due to skip STI and PPI */
er = readl_relaxed(__io_address(U8500_GIC_DIST_BASE) +
GIC_DIST_ENABLE_SET + (i + 1) * 4);
prcmu_write(PRCM_ARMITMSK31TO0 + i * 4, er);
}
}
static void mali_clock_apply(u32 idx)
{
u8 vape;
u32 pll;
vape = mali_dvfs[idx].vape_raw;
pll = mali_dvfs[idx].clkpll;
prcmu_abb_write(AB8500_REGU_CTRL2,
AB8500_VAPE_SEL1,
&vape,
1);
prcmu_write(PRCMU_PLLSOC0, pll);
}
static void ux540_pm_prcmu_copy_gic_settings(void)
{
u32 er; /* Enable register */
int i, j;
u8500_pm_prcmu_copy_gic_settings();
i = U8500_GIC_DIST_SPI_REGS_NB;
for (j = 0; i < U9540_GIC_DIST_SPI_REGS_NB; i++, j++) {
/* +1 due to skip STI and PPI */
er = readl_relaxed(__io_address(U8500_GIC_DIST_BASE) +
GIC_DIST_ENABLE_SET + (i + 1) * 4);
prcmu_write(PRCM_ARMITMSK159TO128 + j * 4, er);
}
}
static void release_link_reset(u8 link)
{
u32 value;
value = prcmu_read(DB8500_PRCM_DSI_SW_RESET);
switch (link) {
case 0:
value |= DB8500_PRCM_DSI_SW_RESET_DSI0_SW_RESETN;
break;
case 1:
value |= DB8500_PRCM_DSI_SW_RESET_DSI1_SW_RESETN;
break;
case 2:
value |= DB8500_PRCM_DSI_SW_RESET_DSI2_SW_RESETN;
break;
default:
break;
}
prcmu_write(DB8500_PRCM_DSI_SW_RESET, value);
}
_mali_osk_errcode_t mali_platform_init()
{
int ret;
is_running = false;
mali_last_utilization = 0;
if (!is_initialized) {
prcmu_write(PRCMU_PLLSOC0, PRCMU_PLLSOC0_INIT);
prcmu_write(PRCMU_SGACLK, PRCMU_SGACLK_INIT);
mali_boost_init();
mali_utilization_workqueue = create_singlethread_workqueue("mali_utilization_workqueue");
if (NULL == mali_utilization_workqueue) {
MALI_DEBUG_PRINT(2, ("%s: Failed to setup workqueue %s\n", __func__, "mali_utilization_workqueue"));
goto error;
}
INIT_WORK(&mali_utilization_work, mali_utilization_function);
//TODO register a notifier block with prcmu opp update func to monitor ape opp
INIT_DELAYED_WORK(&mali_boost_delayedwork, mali_boost_work);
regulator = regulator_get(NULL, "v-mali");
if (IS_ERR(regulator)) {
MALI_DEBUG_PRINT(2, ("%s: Failed to get regulator %s\n", __func__, "v-mali"));
goto error;
}
clk_sga = clk_get_sys("mali", NULL);
if (IS_ERR(clk_sga)) {
regulator_put(regulator);
MALI_DEBUG_PRINT(2, ("%s: Failed to get clock %s\n", __func__, "mali"));
goto error;
}
#if CONFIG_HAS_WAKELOCK
wake_lock_init(&wakelock, WAKE_LOCK_SUSPEND, "mali_wakelock");
#endif
mali_kobject = kobject_create_and_add("mali", kernel_kobj);
if (!mali_kobject) {
pr_err("[Mali] Failed to create kobject interface\n");
}
ret = sysfs_create_group(mali_kobject, &mali_interface_group);
if (ret) {
kobject_put(mali_kobject);
}
prcmu_qos_add_requirement(PRCMU_QOS_APE_OPP, "mali", PRCMU_QOS_DEFAULT_VALUE);
prcmu_qos_add_requirement(PRCMU_QOS_DDR_OPP, "mali", PRCMU_QOS_DEFAULT_VALUE);
pr_info("[Mali] DB8500 GPU OC Initialized (%s)\n", MALI_UX500_VERSION);
is_initialized = true;
}
MALI_SUCCESS;
error:
MALI_DEBUG_PRINT(1, ("SGA initialization failed.\n"));
MALI_ERROR(_MALI_OSK_ERR_FAULT);
}
