コード例 #1
0
ファイル: mapper_BMC70IN1.c プロジェクト: punesemu/puNES
BYTE extcl_cpu_rd_mem_BMC70IN1(WORD address, BYTE openbus, BYTE before) {
	if ((address >= 0x8000) && (bmc70in1.reg[0] == 0x10)) {
		address = (address & 0xFFF0) | bmc70in1_reset;
		return (prg_rom_rd(address));
	}
	return (openbus);
}
コード例 #2
0
ファイル: mapper_74x161x161x32.c プロジェクト: punesemu/puNES
void extcl_cpu_wr_mem_74x161x161x32(WORD address, BYTE value) {
	/* bus conflict */
	const BYTE save = value &= prg_rom_rd(address);
	DBWORD bank;

	if (type == IC74X161X161X32B) {
		if (value & 0x80) {
			mirroring_SCR1();
		} else {
			mirroring_SCR0();
		}
	}

	control_bank_with_AND(0x0F, info.chr.rom[0].max.banks_8k)
	bank = value << 13;
	chr.bank_1k[0] = chr_chip_byte_pnt(0, bank);
	chr.bank_1k[1] = chr_chip_byte_pnt(0, bank | 0x0400);
	chr.bank_1k[2] = chr_chip_byte_pnt(0, bank | 0x0800);
	chr.bank_1k[3] = chr_chip_byte_pnt(0, bank | 0x0C00);
	chr.bank_1k[4] = chr_chip_byte_pnt(0, bank | 0x1000);
	chr.bank_1k[5] = chr_chip_byte_pnt(0, bank | 0x1400);
	chr.bank_1k[6] = chr_chip_byte_pnt(0, bank | 0x1800);
	chr.bank_1k[7] = chr_chip_byte_pnt(0, bank | 0x1C00);

	value = save >> 4;
	control_bank(info.prg.rom[0].max.banks_16k)
	map_prg_rom_8k(2, 0, value);
	map_prg_rom_8k_update();
}
コード例 #3
0
ファイル: mapper_CNROM.c プロジェクト: Dabil/puNES
void extcl_cpu_wr_mem_CNROM(WORD address, BYTE value) {
	DBWORD bank;

	/* bus conflict */
	if (info.mapper.submapper == CNROM_CNFL) {
		value &= prg_rom_rd(address);
	}

	if (mask) {
		if ((value & mask) == state) {
			cnrom_2627.chr_rd_enable = FALSE;
		} else {
			cnrom_2627.chr_rd_enable = TRUE;
		}
		value &= ~mask;
	}

	control_bank(info.chr.rom.max.banks_8k)
	bank = value << 13;

	chr.bank_1k[0] = chr_chip_byte_pnt(0, bank);
	chr.bank_1k[1] = chr_chip_byte_pnt(0, bank | 0x0400);
	chr.bank_1k[2] = chr_chip_byte_pnt(0, bank | 0x0800);
	chr.bank_1k[3] = chr_chip_byte_pnt(0, bank | 0x0C00);
	chr.bank_1k[4] = chr_chip_byte_pnt(0, bank | 0x1000);
	chr.bank_1k[5] = chr_chip_byte_pnt(0, bank | 0x1400);
	chr.bank_1k[6] = chr_chip_byte_pnt(0, bank | 0x1800);
	chr.bank_1k[7] = chr_chip_byte_pnt(0, bank | 0x1C00);
}
コード例 #4
0
ファイル: mapper_Bandai.c プロジェクト: punesemu/puNES
void extcl_cpu_wr_mem_Bandai_161x02x74(WORD address, BYTE value) {
    /* bus conflict */
    const BYTE save = value &= prg_rom_rd(address);
    DBWORD bank;

    control_bank_with_AND(0x03, info.prg.rom[0].max.banks_32k)
    map_prg_rom_8k(4, 0, value);
    map_prg_rom_8k_update();

    b161x02x74_chr_4k_update();
}
コード例 #5
0
ファイル: mapper_Sachen.c プロジェクト: Dabil/puNES
void extcl_cpu_wr_mem_Sachen_sa0037(WORD address, BYTE value) {
	/* bus conflict */
	const BYTE save = value &= prg_rom_rd(address);
	DBWORD bank;

	if (info.prg.rom.max.banks_32k != 0xFFFF) {
		value >>= 3;
		control_bank(info.prg.rom.max.banks_32k)
		map_prg_rom_8k(4, 0, value);
		map_prg_rom_8k_update();
		value = save;
	}
コード例 #6
0
ファイル: mapper_CPROM.c プロジェクト: Dabil/puNES
void extcl_cpu_wr_mem_CPROM(WORD address, BYTE value) {
	DBWORD bank;

	/* bus conflict */
	value &= prg_rom_rd(address);

	control_bank_with_AND(0x03, info.chr.rom.max.banks_4k)
	bank = value << 12;
	chr.bank_1k[4] = chr_chip_byte_pnt(0, bank);
	chr.bank_1k[5] = chr_chip_byte_pnt(0, bank | 0x0400);
	chr.bank_1k[6] = chr_chip_byte_pnt(0, bank | 0x0800);
	chr.bank_1k[7] = chr_chip_byte_pnt(0, bank | 0x0C00);
}
コード例 #7
0
ファイル: mapper_Irem.c プロジェクト: punesemu/puNES
void extcl_cpu_wr_mem_Irem_LROG017(WORD address, BYTE value) {
	/* bus conflict */
	const BYTE save = value &= prg_rom_rd(address);
	DBWORD bank;

	control_bank_with_AND(0x0F, info.prg.rom[0].max.banks_32k)
	map_prg_rom_8k(4, 0, value);
	map_prg_rom_8k_update();

	value = save >> 4;
	control_bank(info.chr.rom[0].max.banks_2k)
	bank = value << 11;
	chr.bank_1k[0] = chr_chip_byte_pnt(0, bank);
	chr.bank_1k[1] = chr_chip_byte_pnt(0, bank | 0x0400);
}
コード例 #8
0
ファイル: mapper_AxROM.c プロジェクト: Dabil/puNES
void extcl_cpu_wr_mem_AxROM(WORD address, BYTE value) {
	/* bus conflict */
	if (info.mapper.submapper == AMROM) {
		value &= prg_rom_rd(address);
	}

	if (value & 0x10) {
		mirroring_SCR0();
	} else {
		mirroring_SCR1();
	}

	control_bank_with_AND(0x0F, info.prg.rom.max.banks_32k)
	map_prg_rom_8k(4, 0, value);
	map_prg_rom_8k_update();
}
コード例 #9
0
ファイル: mapper_GxROM.c プロジェクト: bentley/puNES
void extcl_cpu_wr_mem_GxROM(WORD address, BYTE value) {
    /* bus conflict */
    BYTE save = value &= prg_rom_rd(address);
    DBWORD bank;

    value >>= 4;
    control_bank_with_AND(0x03, info.prg.rom.max.banks_32k)
    map_prg_rom_8k(4, 0, value);
    map_prg_rom_8k_update();

    value = save;
    control_bank_with_AND(0x03, info.chr.rom.max.banks_8k)
    bank = value << 13;
    chr.bank_1k[0] = chr_chip_byte_pnt(0, bank);
    chr.bank_1k[1] = chr_chip_byte_pnt(0, bank | 0x0400);
    chr.bank_1k[2] = chr_chip_byte_pnt(0, bank | 0x0800);
    chr.bank_1k[3] = chr_chip_byte_pnt(0, bank | 0x0C00);
    chr.bank_1k[4] = chr_chip_byte_pnt(0, bank | 0x1000);
    chr.bank_1k[5] = chr_chip_byte_pnt(0, bank | 0x1400);
    chr.bank_1k[6] = chr_chip_byte_pnt(0, bank | 0x1800);
    chr.bank_1k[7] = chr_chip_byte_pnt(0, bank | 0x1C00);
}