void psxRcntWtarget16(int index, u32 value)
{
assert( index < 3 );
PSXCNT_LOG("IOP Counter[%d] writeTarget16 = %lx\n", index, value);
psxCounters[index].target = value & 0xffff;
// protect the target from an early arrival.
// if the target is behind the current count, then set the target overflow
// flag, so that the target won't be active until after the next overflow.
if(psxCounters[index].target <= psxRcntCycles(index))
psxCounters[index].target |= IOPCNT_FUTURE_TARGET;
_rcntSet( index );
}
void psxRcntWtarget16(int index, u32 value)
{
pxAssert( index < 3 );
//DevCon.Warning("IOP Counter[%d] writeTarget16 = %lx", index, value);
psxCounters[index].target = value & 0xffff;
// protect the target from an early arrival.
// if the target is behind the current count, then set the target overflow
// flag, so that the target won't be active until after the next overflow.
if(psxCounters[index].target <= psxRcntCycles(index) || ((psxCounters[index].mode & 0x400) == 0 && !(psxCounters[index].mode & 0x40)))
psxCounters[index].target |= IOPCNT_FUTURE_TARGET;
_rcntSet( index );
}
void psxRcntWtarget32(int index, u32 value)
{
pxAssert( index >= 3 && index < 6);
//DevCon.Warning("IOP Counter[%d] writeTarget32 = %lx mode %x", index, value, psxCounters[index].mode);
psxCounters[index].target = value;
if (!(psxCounters[index].mode & 0x80)) { //Toggle mode
psxCounters[index].mode |= 0x0400; // Interrupt flag set low
}
// protect the target from an early arrival.
// if the target is behind the current count, then set the target overflow
// flag, so that the target won't be active until after the next overflow.
if (psxCounters[index].target <= psxRcntCycles(index) || ((psxCounters[index].mode & 0x400) == 0 && !(psxCounters[index].mode & 0x40)))
psxCounters[index].target |= IOPCNT_FUTURE_TARGET;
_rcntSet( index );
}