static int __devexit ecap_remove(struct platform_device *pdev) { struct ecap_pwm *ep = platform_get_drvdata(pdev); struct resource *r; struct pwmss_platform_data *pdata; int val; if (ep->version == PWM_VERSION_1) { pdata = (&pdev->dev)->platform_data; pm_runtime_get_sync(ep->dev); val = readw(ep->config_mem_base + PWMSS_CLKCONFIG); val &= ~BIT(ECAP_CLK_EN); writew(val, ep->config_mem_base + PWMSS_CLKCONFIG); pm_runtime_put_sync(ep->dev); iounmap(ep->config_mem_base); ep->config_mem_base = NULL; } pwm_unregister(&ep->pwm); iounmap(ep->mmio_base); if (ep->version == PWM_VERSION_1) r = platform_get_resource(pdev, IORESOURCE_MEM, 1); else r = platform_get_resource(pdev, IORESOURCE_MEM, 0); release_mem_region(r->start, resource_size(r)); platform_set_drvdata(pdev, NULL); clk_put(ep->clk); pm_runtime_disable(&pdev->dev); kfree(ep); return 0; }
static int __devexit gpio_pwm_remove(struct platform_device *pdev) { struct gpio_pwm *gp = platform_get_drvdata(pdev); int ret; ret = pwm_unregister(&gp->pwm); hrtimer_cancel(&gp->timer); cancel_work_sync(&gp->work); platform_set_drvdata(pdev, 0); kfree(gp); return 0; }
static int __devexit ecap_remove(struct platform_device *pdev) { struct ecap_pwm *ep = platform_get_drvdata(pdev); struct resource *r; pwm_unregister(&ep->pwm); iounmap(ep->mmio_base); r = platform_get_resource(pdev, IORESOURCE_MEM, 0); release_mem_region(r->start, resource_size(r)); platform_set_drvdata(pdev, NULL); clk_put(ep->clk); kfree(ep); return 0; }
static int __devexit ehrpwm_remove(struct platform_device *pdev) { struct ehrpwm_pwm *ehrpwm = platform_get_drvdata(pdev); struct resource *r; unsigned char i; int val; struct pwmss_platform_data *pdata; if (ehrpwm->version == PWM_VERSION_1) { pdata = (&pdev->dev)->platform_data; pm_runtime_get_sync(ehrpwm->dev); val = readw(ehrpwm->config_mem_base + PWMSS_CLKCONFIG); val &= ~BIT(EPWM_CLK_EN); writew(val, ehrpwm->config_mem_base + PWMSS_CLKCONFIG); pm_runtime_put_sync(ehrpwm->dev); iounmap(ehrpwm->config_mem_base); ehrpwm->config_mem_base = NULL; } for (i = 0; i < NCHAN; i++) { if (pwm_is_registered(&ehrpwm->pwm[i])) pwm_unregister(&ehrpwm->pwm[i]); } for (i = 0; i < 2; i++) if (ehrpwm->irq[i] != -ENXIO) free_irq(ehrpwm->irq[i], ehrpwm); iounmap(ehrpwm->mmio_base); if (ehrpwm->version == PWM_VERSION_1) r = platform_get_resource(pdev, IORESOURCE_MEM, 1); else r = platform_get_resource(pdev, IORESOURCE_MEM, 0); release_mem_region(r->start, resource_size(r)); platform_set_drvdata(pdev, NULL); clk_put(ehrpwm->clk); pm_runtime_disable(ehrpwm->dev); kfree(ehrpwm); return 0; }
static int __devexit ehrpwm_remove(struct platform_device *pdev) { struct ehrpwm_pwm *ehrpwm = platform_get_drvdata(pdev); struct resource *r; unsigned char i; for (i = 0; i < NCHAN; i++) { if (pwm_is_registered(&ehrpwm->pwm[i])) pwm_unregister(&ehrpwm->pwm[i]); } for (i = 0; i < 2; i++) if (ehrpwm->irq[i] != -ENXIO) free_irq(ehrpwm->irq[i], ehrpwm); iounmap(ehrpwm->mmio_base); r = platform_get_resource(pdev, IORESOURCE_MEM, 0); release_mem_region(r->start, resource_size(r)); platform_set_drvdata(pdev, NULL); clk_put(ehrpwm->clk); kfree(ehrpwm); return 0; }
static int kona_pwmc_config(struct pwm_device *p, struct pwm_config *c) { struct kona_pwmc *ap = pwm_get_drvdata(p); int chan = kona_get_chan(ap, p); int ret = 0; if (test_bit(PWM_CONFIG_POLARITY, &c->config_mask)) kona_pwmc_config_polarity(ap, chan, c); if (test_bit(PWM_CONFIG_DUTY_TICKS, &c->config_mask)) kona_pwmc_config_duty_ticks(ap, chan, c); if (test_bit(PWM_CONFIG_PERIOD_TICKS, &c->config_mask)) { ret = kona_pwmc_config_period_ticks(ap, chan, c); if (ret) goto out; if (!test_bit(PWM_CONFIG_DUTY_TICKS, &c->config_mask)) { struct pwm_config d = { .config_mask = PWM_CONFIG_DUTY_TICKS, .duty_ticks = p->duty_ticks, }; kona_pwmc_config_duty_ticks(ap, chan, &d); } } if (!ap->pwm_started && test_bit(PWM_CONFIG_START, &c->config_mask)) { /* Restore duty ticks cater for STOP case. */ struct pwm_config d = { .config_mask = PWM_CONFIG_DUTY_TICKS, .duty_ticks = p->duty_ticks, }; ap->pwm_started = 1; usleep_range(3000, 7000); clk_enable(ap->clk); kona_pwmc_clear_set_bit(ap, pwm_chan_ctrl_info[chan].offset, pwm_chan_ctrl_info[chan]. smooth_type_shift, 1); kona_pwmc_config_duty_ticks(ap, chan, &d); kona_pwmc_start(ap, chan); } if (ap->pwm_started && test_bit(PWM_CONFIG_STOP, &c->config_mask)) { struct pwm_config d = { .config_mask = PWM_CONFIG_DUTY_TICKS, .duty_ticks = 0, }; ap->pwm_started = 0; kona_pwmc_config_duty_ticks(ap, chan, &d); kona_pwmc_clear_set_bit(ap, pwm_chan_ctrl_info[chan].offset, pwm_chan_ctrl_info[chan]. smooth_type_shift, 0); /* turn-off the PWM clock i.e. enabled during pwm_start */ ndelay(410); clk_disable(ap->clk); } out: return ret; } static int kona_pwmc_request(struct pwm_device *p) { struct kona_pwmc *ap = pwm_get_drvdata(p); int chan = kona_get_chan(ap, p); clk_enable(ap->clk); p->tick_hz = clk_get_rate(ap->clk); kona_pwmc_stop(ap, chan); clk_disable(ap->clk); return 0; } static void kona_pwmc_release(struct pwm_device *p) { } static const struct pwm_device_ops kona_pwm_ops = { .request = kona_pwmc_request, .release = kona_pwmc_release, .config = kona_pwmc_config, .owner = THIS_MODULE, }; static int __devinit kona_pwmc_probe(struct platform_device *pdev) { struct kona_pwmc *ap; struct resource *r = platform_get_resource(pdev, IORESOURCE_MEM, 0); int chan; int ret = 0; ap = kzalloc(sizeof(*ap), GFP_KERNEL); if (!ap) { ret = -ENOMEM; goto err_kona_pwmc_alloc; } platform_set_drvdata(pdev, ap); ap->clk = clk_get(&pdev->dev, "pwm_clk"); if (IS_ERR(ap->clk)) { ret = -ENODEV; goto err_clk_get; } ap->iobase = ioremap_nocache(r->start, resource_size(r)); if (!ap->iobase) { ret = -ENODEV; goto err_ioremap; } for (chan = 0; chan < KONA_PWM_CHANNEL_CNT; chan++) { ap->p[chan] = pwm_register(&kona_pwm_ops, &pdev->dev, "%s:%d", "kona_pwmc", chan); if (IS_ERR_OR_NULL(ap->p[chan])) goto err_pwm_register; pwm_set_drvdata(ap->p[chan], ap); kona_pwmc_clear_set_bit(ap, pwm_chan_ctrl_info[chan].offset, pwm_chan_ctrl_info[chan]. smooth_type_shift, 1); } printk(KERN_INFO "PWM: driver initialized properly"); return 0; err_pwm_register: while (--chan > 0) pwm_unregister(ap->p[chan]); iounmap(ap->iobase); err_ioremap: clk_put(ap->clk); err_clk_get: platform_set_drvdata(pdev, NULL); kfree(ap); err_kona_pwmc_alloc: printk(KERN_ERR "%s: error, returning %d\n", __func__, ret); return ret; } static int __devexit kona_pwmc_remove(struct platform_device *pdev) { struct kona_pwmc *ap = platform_get_drvdata(pdev); int chan; for (chan = 0; chan < KONA_PWM_CHANNEL_CNT; chan++) pwm_unregister(ap->p[chan]); clk_put(ap->clk); iounmap(ap->iobase); kfree(ap); return 0; } #ifdef CONFIG_PM static int kona_pwmc_suspend(struct platform_device *pdev, pm_message_t state) { /* TODO: add more resume support in the future */ return 0; } static int kona_pwmc_resume(struct platform_device *pdev) { /* TODO: add more resume support in the future */ return 0; } #else #define kona_pwmc_suspend NULL #define kona_pwmc_resume NULL #endif static const struct of_device_id kona_pwmc_dt_ids[] = { { .compatible = "bcm,pwmc", }, {} };
static int ehrpwm_probe(struct platform_device *pdev) { struct ehrpwm_pwm *ehrpwm = NULL; struct resource *r; int ret = 0; int chan = 0; struct pwmss_platform_data *pdata = (&pdev->dev)->platform_data; int ch_mask = 0; int val; char con_id[PWM_CON_ID_STRING_LENGTH] = "epwmss"; ehrpwm = kzalloc(sizeof(*ehrpwm), GFP_KERNEL); if (!ehrpwm) { dev_err(&pdev->dev, "failed to allocate memory\n"); ret = -ENOMEM; goto err_mem_failure; } ehrpwm->version = pdata->version; if (ehrpwm->version == PWM_VERSION_1) { sprintf(con_id, "%s%d_%s", con_id, pdev->id, "fck"); ehrpwm->clk = clk_get(&pdev->dev, con_id); } else ehrpwm->clk = clk_get(&pdev->dev, "ehrpwm"); pm_runtime_enable(&pdev->dev); ehrpwm->dev = &pdev->dev; if (IS_ERR(ehrpwm->clk)) { ret = PTR_ERR(ehrpwm->clk); goto err_clock_failure; } if (ehrpwm->version == PWM_VERSION_1) { r = platform_get_resource(pdev, IORESOURCE_MEM, 0); if (!r) { dev_err(&pdev->dev, "no memory resource defined\n"); ret = -ENOMEM; goto err_resource_mem_failure; } ehrpwm->config_mem_base = ioremap(r->start, resource_size(r)); if (!ehrpwm->config_mem_base) { dev_err(&pdev->dev, "failed to ioremap() registers\n"); ret = -ENODEV; goto err_free_mem_config; } pm_runtime_get_sync(ehrpwm->dev); val = readw(ehrpwm->config_mem_base + PWMSS_CLKCONFIG); val |= BIT(EPWM_CLK_EN); writew(val, ehrpwm->config_mem_base + PWMSS_CLKCONFIG); pm_runtime_put_sync(ehrpwm->dev); } else ch_mask = pdata->channel_mask; spin_lock_init(&ehrpwm->lock); ehrpwm->ops.config = ehrpwm_pwm_config; ehrpwm->ops.request = ehrpwm_pwm_request; ehrpwm->ops.freq_transition_notifier_cb = ehrpwm_freq_transition_cb; ehrpwm->prescale_val = 1; if (ehrpwm->version == PWM_VERSION_1) r = platform_get_resource(pdev, IORESOURCE_MEM, 1); else r = platform_get_resource(pdev, IORESOURCE_MEM, 0); if (!r) { dev_err(&pdev->dev, "no memory resource defined\n"); ret = -ENODEV; goto err_resource_mem2_failiure; } r = request_mem_region(r->start, resource_size(r), pdev->name); if (!r) { dev_err(&pdev->dev, "failed to request memory resource\n"); ret = -EBUSY; goto err_request_mem2_failure; } ehrpwm->mmio_base = ioremap(r->start, resource_size(r)); if (!ehrpwm->mmio_base) { dev_err(&pdev->dev, "failed to ioremap() registers\n"); ret = -ENODEV; goto err_free_mem2; } ehrpwm->irq[0] = platform_get_irq(pdev, 0); if (ehrpwm->irq[0] == -ENXIO) { dev_err(&pdev->dev, "No IRQ resource\n"); ret = -ENXIO; goto err_free_io; } ret = request_irq(ehrpwm->irq[0], ehrpwm_trip_zone_irq_handler, 0, "ehrpwmTZ", ehrpwm); if (ret) goto err_free_io; ehrpwm->irq[1] = platform_get_irq(pdev, 1); if (ehrpwm->irq[1] == -ENXIO) { dev_err(&pdev->dev, "No IRQ resource\n"); ret = -ENXIO; goto err_request_irq; } ret = request_irq(ehrpwm->irq[1], ehrpwm_event_irq_handler, 0, "ehrpwm_evt", ehrpwm); if (ret) goto err_request_irq; for (chan = 0; chan < NCHAN; chan++) { ehrpwm->pwm[chan].ops = &ehrpwm->ops; pwm_set_drvdata(&ehrpwm->pwm[chan], ehrpwm); ehrpwm->pwm[chan].tick_hz = clk_get_rate(ehrpwm->clk); if (pdata->chan_attrib[chan].max_freq) { int period_ns = NSEC_PER_SEC / pdata->chan_attrib[chan].max_freq; ehrpwm->pwm[chan].max_period_ticks = pwm_ns_to_ticks(&ehrpwm->pwm[chan], period_ns); } if (!(ehrpwm->version == PWM_VERSION_1)) { if (!(ch_mask & (0x1 << chan))) continue; } ret = pwm_register(&ehrpwm->pwm[chan], &pdev->dev, chan); if (ret) goto err_pwm_register; } platform_set_drvdata(pdev, ehrpwm); return 0; err_pwm_register: for (chan = 0; chan < NCHAN; chan++) { if (pwm_is_registered(&ehrpwm->pwm[chan])) pwm_unregister(&ehrpwm->pwm[chan]); } err_request_irq: if (ehrpwm->irq[0] != -ENXIO) free_irq(ehrpwm->irq[0], ehrpwm); err_free_io: iounmap(ehrpwm->mmio_base); err_free_mem2: release_mem_region(r->start, resource_size(r)); err_request_mem2_failure: err_resource_mem2_failiure: if (ehrpwm->version == PWM_VERSION_1) { iounmap(ehrpwm->config_mem_base); ehrpwm->config_mem_base = NULL; } err_free_mem_config: err_resource_mem_failure: clk_put(ehrpwm->clk); pm_runtime_disable(ehrpwm->dev); err_clock_failure: kfree(ehrpwm); err_mem_failure: return ret; }
static int ehrpwm_probe(struct platform_device *pdev) { struct ehrpwm_pwm *ehrpwm = NULL; struct resource *r; int ret = 0; int chan = 0; struct ehrpwm_platform_data *pdata = (&pdev->dev)->platform_data; int ch_mask; ch_mask = pdata->channel_mask; ehrpwm = kzalloc(sizeof(*ehrpwm), GFP_KERNEL); if (!ehrpwm) { dev_err(&pdev->dev, "failed to allocate memory\n"); ret = -ENOMEM; return ret; } ehrpwm->clk = clk_get(&pdev->dev, "ehrpwm"); if (IS_ERR(ehrpwm->clk)) { ret = PTR_ERR(ehrpwm->clk); goto err_free_device; } spin_lock_init(&ehrpwm->lock); ehrpwm->ops.config = ehrpwm_pwm_config; ehrpwm->ops.request = ehrpwm_pwm_request; ehrpwm->ops.freq_transition_notifier_cb = ehrpwm_freq_transition_cb; ehrpwm->prescale_val = 1; r = platform_get_resource(pdev, IORESOURCE_MEM, 0); if (!r) { dev_err(&pdev->dev, "no memory resource defined\n"); ret = -ENODEV; goto err_free_clk; } r = request_mem_region(r->start, resource_size(r), pdev->name); if (!r) { dev_err(&pdev->dev, "failed to request memory resource\n"); ret = -EBUSY; goto err_free_clk; } ehrpwm->mmio_base = ioremap(r->start, resource_size(r)); if (!ehrpwm->mmio_base) { dev_err(&pdev->dev, "failed to ioremap() registers\n"); ret = -ENODEV; goto err_free_mem; } ehrpwm->irq[0] = platform_get_irq(pdev, 0); if (ehrpwm->irq[0] == -ENXIO) { dev_err(&pdev->dev, "No IRQ resource\n"); ret = -ENXIO; goto err_free_io; } ret = request_irq(ehrpwm->irq[0], ehrpwm_trip_zone_irq_handler, 0, "ehrpwmTZ", ehrpwm); if (ret) goto err_free_io; ehrpwm->irq[1] = platform_get_irq(pdev, 1); if (ehrpwm->irq[1] == -ENXIO) { dev_err(&pdev->dev, "No IRQ resource\n"); ret = -ENXIO; goto err_request_irq; } ret = request_irq(ehrpwm->irq[1], ehrpwm_event_irq_handler, 0, "ehrpwm_evt", ehrpwm); if (ret) goto err_request_irq; for (chan = 0; chan < NCHAN; chan++) { ehrpwm->pwm[chan].ops = &ehrpwm->ops; pwm_set_drvdata(&ehrpwm->pwm[chan], ehrpwm); if (!(ch_mask & (0x1 << chan))) continue; ret = pwm_register(&ehrpwm->pwm[chan], &pdev->dev, chan); if (ret) goto err_pwm_register; } platform_set_drvdata(pdev, ehrpwm); return 0; err_pwm_register: for (chan = 0; chan < NCHAN; chan++) { if (pwm_is_registered(&ehrpwm->pwm[chan])) pwm_unregister(&ehrpwm->pwm[chan]); } err_request_irq: if (ehrpwm->irq[0] != -ENXIO) free_irq(ehrpwm->irq[0], ehrpwm); err_free_io: iounmap(ehrpwm->mmio_base); err_free_mem: release_mem_region(r->start, resource_size(r)); err_free_clk: clk_put(ehrpwm->clk); err_free_device: kfree(ehrpwm); return ret; }