int main(void) { volatile uint32_t delay; uint32_t c_val = 0, pt_val = 0; qm_aonpt_config_t cfg; QM_PUTS("\nAlways-on Counter example app\n"); /* Always-on Counter enable, disable and read value */ qm_aonc_disable(QM_SCSS_AON_0); qm_aonc_enable(QM_SCSS_AON_0); c_val = qm_aonc_get_value(QM_SCSS_AON_0); if (c_val) { QM_PRINTF("Always-on Counter value: %lu\n", c_val); } else { QM_PRINTF("ERROR: Could not read aonc value\n"); } /* Request an IRQ and write the Always-on Periodic Timer config */ cfg.count = 0x10000; cfg.int_en = true; cfg.callback = aonpt_example_callback; qm_irq_request(QM_IRQ_AONPT_0, qm_aonpt_isr_0); qm_aonpt_set_config(QM_SCSS_AON_0, &cfg); /* The AON Periodic Timer runs from the RTC clock at 32KHz (rather than * the system clock which is 32MHz) so we need to spin for a few cycles * allow the register change to propagate */ for (delay = 500; delay--;) { } /* Get the value of the Always-on Periodic Timer */ pt_val = qm_aonpt_get_value(QM_SCSS_AON_0); if (pt_val) { QM_PRINTF("Always-on Periodic Timer value: %lu\n", pt_val); } else { QM_PRINTF("ERROR: Could not read Periodic timer value\n\n"); } QM_PUTS("Always-on counter example app complete\n"); return 0; }
static int aon_counter_qmsi_stop(struct device *dev) { qm_aonc_disable(QM_AONC_0); return 0; }